JPH0577087B2 - - Google Patents

Info

Publication number
JPH0577087B2
JPH0577087B2 JP63505642A JP50564288A JPH0577087B2 JP H0577087 B2 JPH0577087 B2 JP H0577087B2 JP 63505642 A JP63505642 A JP 63505642A JP 50564288 A JP50564288 A JP 50564288A JP H0577087 B2 JPH0577087 B2 JP H0577087B2
Authority
JP
Japan
Prior art keywords
clock
delay
signal
output
graph
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP63505642A
Other languages
English (en)
Japanese (ja)
Other versions
JPH01502222A (ja
Inventor
Roorensu Hooru Furoora
Maikeru Ansonii Makuro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Unisys Corp
Original Assignee
Unisys Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US07/068,285 external-priority patent/US4755704A/en
Application filed by Unisys Corp filed Critical Unisys Corp
Publication of JPH01502222A publication Critical patent/JPH01502222A/ja
Publication of JPH0577087B2 publication Critical patent/JPH0577087B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/0248—Skew reduction or using delay lines
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09218—Conductive traces
    • H05K2201/09263—Meander
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/0929—Conductive planes
    • H05K2201/09336—Signal conductors in same plane as power plane
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10689—Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Wire Processing (AREA)
  • Apparatuses For Bulk Treatment Of Fruits And Vegetables And Apparatuses For Preparing Feeds (AREA)
  • Pulse Circuits (AREA)
  • Electric Clocks (AREA)
JP63505642A 1987-06-30 1988-06-20 回路ボード上における自動クロックデスキュ Granted JPH01502222A (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US6828487A 1987-06-30 1987-06-30
US68284 1987-06-30
US68285 1987-06-30
US07/068,285 US4755704A (en) 1987-06-30 1987-06-30 Automatic clock de-skewing apparatus

Publications (2)

Publication Number Publication Date
JPH01502222A JPH01502222A (ja) 1989-08-03
JPH0577087B2 true JPH0577087B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-10-26

Family

ID=26748801

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63505642A Granted JPH01502222A (ja) 1987-06-30 1988-06-20 回路ボード上における自動クロックデスキュ

Country Status (7)

Country Link
EP (1) EP0321552B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPH01502222A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
KR (1) KR920001953B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
AT (1) ATE127250T1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE3854382T2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
MX (1) MX166192B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
WO (1) WO1989000311A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5118975A (en) * 1990-03-05 1992-06-02 Thinking Machines Corporation Digital clock buffer circuit providing controllable delay
US5247613A (en) * 1990-05-08 1993-09-21 Thinking Machines Corporation Massively parallel processor including transpose arrangement for serially transmitting bits of data words stored in parallel
WO1993006657A1 (en) * 1991-09-23 1993-04-01 Digital Equipment Corporation Update synchronizer
US5696951A (en) * 1996-01-03 1997-12-09 Credence Systems Corporation Signal deskewing system for synchronous logic circuit
JP2853738B2 (ja) * 1996-05-30 1999-02-03 日本電気株式会社 クロック位相制御回路
JP4394788B2 (ja) * 1999-05-10 2010-01-06 株式会社アドバンテスト 遅延時間判定装置
DE10330328B4 (de) * 2003-07-04 2006-09-21 Infineon Technologies Ag Verfahren und Vorrichtung zur Verarbeitung von Daten bei unterschiedlichen Taktsignalen

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1501500A (en) * 1975-06-20 1978-02-15 Int Computers Ltd Multilayer printed circuit boards
JPS5580136A (en) * 1978-12-14 1980-06-17 Fujitsu Ltd Clock signal distribution system
EP0173521A3 (en) * 1984-08-29 1988-05-11 Unisys Corporation Automatic signal delay adjustment apparatus
US4637018A (en) * 1984-08-29 1987-01-13 Burroughs Corporation Automatic signal delay adjustment method
JPS61199310A (ja) * 1985-02-28 1986-09-03 Showa Electric Wire & Cable Co Ltd プリント基板型電磁遅延線

Also Published As

Publication number Publication date
KR890702107A (ko) 1989-12-12
JPH01502222A (ja) 1989-08-03
WO1989000311A1 (en) 1989-01-12
KR920001953B1 (ko) 1992-03-07
EP0321552B1 (en) 1995-08-30
EP0321552A1 (en) 1989-06-28
ATE127250T1 (de) 1995-09-15
MX166192B (es) 1992-12-23
DE3854382D1 (de) 1995-10-05
DE3854382T2 (de) 1996-04-25

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees