JPH0573750U - Magnetic disk drive tester - Google Patents

Abstract

(57) [Abstract] [Purpose] High data transfer rate (24M Bit / Se
c or more) Stable write & read test of magnetic disk device. A clock correction circuit 7 for correcting a reference clock input from a magnetic disk device 6 into an accurate clock having a duty ratio of 50%, and a data correction for outputting input serial read data in synchronization with the corrected clock The circuit 8 is provided in the preceding stage of the read circuit to correct the waveform distortion due to the characteristics of the cable between the magnetic disk device 6 and the tester and the characteristics of the driver / receiver IC, and the timing shift between the data and the clock. Therefore, a stable test can be performed even with a magnetic disk device having a high transfer rate.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to a tester for a magnetic disk device, and more particularly to a test system for a magnetic disk device which is an external storage device of a computer.

[0002]

[Prior Art]

 The tester of the conventional magnetic disk device inputs the interface control circuit 11 for handshaking with the magnetic disk device 16, the reference clock RCK and the serial read data RDT as shown in FIG. 2, and outputs the parallel read data. It has a read circuit 12, a write circuit 13 that outputs a write clock WCK and serial write data WDT, an R / W control circuit 14 that detects a read error and generates parallel write data, and an error memory 15 that stores error information. is doing.

Next, the operation will be described. First, the case of writing data in the magnetic disk device 16 will be described.

The R / W control circuit 14 puts the magnetic disk device 16 into a write mode state via the interface control circuit 11 and sends parallel write data to the write circuit 13.

The write circuit 13 synchronizes the parallel write data with the reference clock CK input from the read circuit 12 and sends the serial write data WDT and the write clock WCK to the magnetic disk device 16.

Next, a case of reading data from the magnetic disk device 16 will be described. The R / W control circuit 14 puts the magnetic disk device 16 into a read mode state via the interface control circuit 11. The read circuit 12 receives the serial read data RDT synchronized with the reference clock RCK from the magnetic disk device 16, converts the serial read data RDT into parallel read data, and sends the parallel read data to the R / W control circuit 14.

The R / W control circuit 14 compares the parallel read data with the parallel write data, and if they do not match, writes the error position (the number of bytes from the index) and the error length in the error memory 15 as error information.

[0008]

[Problems to be solved by the device]

 In this conventional magnetic disk device tester, when the data transfer speed becomes high (the reference clock becomes high), the cable between the magnetic disk device and the tester and the characteristic of the driver / receiver IC are received, and the data is received. The duty ratio of the reference clock did not reach 50%, and the read data could not be received correctly.

An object of the present invention is to provide a tester for a magnetic disk device which has a high data transfer rate and can perform a stable write / read test.

[0010]

[Means for Solving the Problems]

 In order to achieve the above object, a tester for a magnetic disk device according to the present invention is a tester for a magnetic disk device whose interface specification is ESDI, and a clock correction circuit for correcting a reference clock input to the tester and an input to the tester. The data correction circuit that outputs the serial read data that is output in synchronization with the corrected clock, the read circuit that inputs the corrected serial data and the clock to generate the parallel read data, and the parallel write data that is corrected It has a write circuit that inputs a clock and outputs serial write data and a write clock, a read / write control circuit that generates parallel write data and detects a read error, and an error memory that stores read error information. is there.

[0011]

[Action]

 As shown in FIG. 1, a clock correction circuit 7 that corrects the reference clock input from the magnetic disk device 6 into an accurate clock with a duty ratio of 50%, and the input serial read data is synchronized with the corrected clock. The data correction circuit 8 that outputs the data is provided in the preceding stage of the read circuit to correct the waveform distortion due to the characteristics of the cable between the magnetic disk device and the tester and the driver / receiver IC, and the timing deviation between the data and the clock. . Therefore, a stable test can be performed even with a magnetic disk device having a high transfer rate.

[0012]

【Example】

 Next, the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention.

In FIG. 1, the tester of the present invention receives from the magnetic disk device 6 a clock correction circuit 7 which inputs the reference clock received from the magnetic disk device 6 and outputs a reference clock having a duty ratio of 50%. A data correction circuit 8 that outputs the serial read data in synchronization with the corrected clock, an interface control circuit 1 that performs a handshake with the magnetic disk device 6, and a corrected reference clock and the serial read data are input. A read circuit 2 that outputs parallel read data, a write circuit 3 that inputs parallel write data and a reference clock and outputs serial write data and a write clock, and a read circuit 2 that detects a read error and generates parallel write data. / W It has a control circuit 4 and an error memory 5 for storing error information.

A case of writing data to the magnetic disk device 6 will be described. The R / W control circuit 4 puts the magnetic disk device 6 into the write mode state via the interface control circuit 1 and sends parallel write data PWDT to the write circuit 3.

The write circuit 3 synchronizes the parallel write data PWDT with the clock RFCK input from the clock correction circuit 7 and sends the serial write data WDT and the write clock WCK to the magnetic disk device 6. At this time, the clock correction circuit 7 corrects the reference clock RCK input from the magnetic disk device 6 to an accurate clock RFCK with a duty ratio of 50% and sends it to the write circuit 3.

Next, a case of reading data from the magnetic disk device 6 will be described. The R / W control circuit 4 puts the magnetic disk device 6 into a read mode state via the interface control circuit 1. The clock correction circuit 7 corrects the reference clock RCK input from the magnetic disk device 6 into an accurate clock RFCK with a duty ratio of 50%, and sends it to the data correction circuit 8 and the read circuit 2 as in the write operation.

The data correction circuit 8 synchronizes the serial read data RDT input from the magnetic disk device 6 with the clock RFCK and sends the corrected serial read data RF DT to the read circuit 2.

The read circuit 2 receives the serial read data RFDT synchronized with the clock RFCK, converts the serial read data RFDT into parallel read data PRDT, and sends the parallel read data PRDT to the R / W control circuit 4.

The R / W control circuit 4 compares the parallel read data PRDT with the parallel write data PWDT, and if they do not match, the error position and the error length are written in the error memory 5 as error information.

[0020]

As described above, according to the present invention, by adding the clock correction circuit and the data correction circuit to the conventional tester, the write & write of the magnetic disk device (interface specification is ESDI) with a high data transfer speed is provided. Lead tests can be performed stably.

Further, the write / read test can be performed even in a magnetic disk device having a transfer rate (24 MBit / Sec or more) exceeding the ESDI standard.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram showing a conventional tester.

[Explanation of symbols]

 1 Interface Control Circuit 2 Read Circuit 3 Write Circuit 4 R / W Control Circuit 5 Error Memory 6 Magnetic Disk Unit 7 Clock Correction Circuit 8 Data Correction Circuit

Claims (1)

[Scope of utility model registration request] 1. A tester for a magnetic disk device whose interface specification is ESDI, wherein a clock correction circuit for correcting a reference clock input to the tester and a serial read data input to the tester are synchronized with the corrected clock. A data correction circuit that outputs, a read circuit that inputs corrected serial data and a clock to generate parallel read data, and a write circuit that inputs parallel write data and a corrected clock to output serial write data and a write clock A tester for a magnetic disk device comprising a circuit, a read / write control circuit for generating parallel write data and detecting a read error, and an error memory for storing read error information.