JPH0570950B2 - - Google Patents

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Publication number
JPH0570950B2
JPH0570950B2 JP59034575A JP3457584A JPH0570950B2 JP H0570950 B2 JPH0570950 B2 JP H0570950B2 JP 59034575 A JP59034575 A JP 59034575A JP 3457584 A JP3457584 A JP 3457584A JP H0570950 B2 JPH0570950 B2 JP H0570950B2
Authority
JP
Japan
Prior art keywords
layer
electrode
mis
conjugated polymer
mis diode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59034575A
Other languages
Japanese (ja)
Other versions
JPS60178669A (en
Inventor
Satoshi Yanagiura
Makoto Tsunoda
Shohei Eto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP59034575A priority Critical patent/JPS60178669A/en
Publication of JPS60178669A publication Critical patent/JPS60178669A/en
Publication of JPH0570950B2 publication Critical patent/JPH0570950B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/549Organic PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Photovoltaic Devices (AREA)

Description

【発明の詳細な説明】 この発明は、絶縁性有機高分子層を設けたMIS
ダイオードの新規な製造方法に関する。
[Detailed Description of the Invention] This invention provides an MIS with an insulating organic polymer layer.
This invention relates to a new method for manufacturing diodes.

〔従来技術〕[Prior art]

第1図は一般的なMISダイオードの断面図で、
1,6はリード線、2は電極となる金属層、3は
絶縁層、4は半導体層、5は電極となる導電層で
あり、金属−絶縁物−半導体(MIS)の順に構成
されたもので、従来より第2図に示すSi−SiO−
金属構造のもの、即ちMOSダイオードが実用化
されている。図において、7はSiO層、8はSi層
である。以前よりSiO2−Si構造に帰因する劣化
が起ると言われていたが、現在ではこの問題の解
明が進み、理想に近いMOS構造が作られるよう
になり、実用性も高まつてきている。これ等の製
法としては、Siの気相成長の方法に酸素、又は酸
素を含むCO2、H2Oなどのガスを導入しSi上に
SiO2を成長させる方法、およびSiH4とO2を反応
させてSiO2を製膜する方法などがある。
Figure 1 is a cross-sectional view of a typical MIS diode.
1 and 6 are lead wires, 2 is a metal layer that becomes an electrode, 3 is an insulating layer, 4 is a semiconductor layer, and 5 is a conductive layer that becomes an electrode, and is configured in the order of metal-insulator-semiconductor (MIS). So, conventionally, Si−SiO− shown in Fig. 2
Metal-structured diodes, ie, MOS diodes, have been put into practical use. In the figure, 7 is a SiO layer and 8 is a Si layer. It has been said for some time that deterioration occurs due to the SiO 2 -Si structure, but now this problem has been elucidated, MOS structures close to the ideal have been created, and their practicality has increased. There is. These manufacturing methods involve introducing oxygen or oxygen-containing gases such as CO 2 or H 2 O into the Si vapor phase growth method.
There are methods such as growing SiO 2 and forming SiO 2 into a film by reacting SiH 4 and O 2 .

有機MISダイオードも最近作られるようになつ
たが、これ等は有機半導体の上に絶縁性の有機高
分子を蒸着法、およびプラズマ重合法などにより
20〜100Å程度の層を堆積し、その上に金属電極
をつけたものである。また、無機半導体の上に上
記の方法で有機高分子を堆積させたMISダイオー
ドも知られている。
Organic MIS diodes have recently begun to be manufactured, but these are made by depositing an insulating organic polymer on an organic semiconductor using a vapor deposition method or a plasma polymerization method.
A layer of about 20 to 100 Å is deposited, and a metal electrode is attached on top of it. Also known is a MIS diode in which an organic polymer is deposited on an inorganic semiconductor using the method described above.

しかし、従来の蒸着法、プラズマ重合法による
絶縁性高分子層の堆積は、ピンホールが出来易
い、層の構造に再現性が無い、層厚のコントロー
ルが困難である、装置が高価格である、操作が難
しくコストが高いなどの欠点を持ち、MISダイオ
ードの絶縁性有機高分子層を堆積させるには不適
当な方法であつた。
However, the deposition of insulating polymer layers by conventional vapor deposition and plasma polymerization methods is prone to pinholes, lacks reproducibility in layer structure, difficult to control layer thickness, and expensive equipment. However, this method has disadvantages such as difficult operation and high cost, and is not suitable for depositing an insulating organic polymer layer for MIS diodes.

〔発明の概要〕[Summary of the invention]

この発明は上記従来のものの欠点を除去するた
めになされたもので、電極となる導電層に半導体
層を設け、この半導体層に電解重合法により絶縁
性有機高分子層を設け、さらにこの絶縁性有機高
分子層に電極となる金属層を設けることにより容
易に、高性能で、かつ性能の安定したMISダイオ
ードの製造方法を得ることを目的とする。
This invention was made in order to eliminate the drawbacks of the above-mentioned conventional ones.A semiconductor layer is provided as a conductive layer that becomes an electrode, an insulating organic polymer layer is provided on this semiconductor layer by an electrolytic polymerization method, and the insulating The purpose of this invention is to obtain a method for easily manufacturing a MIS diode with high performance and stable performance by providing a metal layer serving as an electrode on an organic polymer layer.

〔発明の実施例〕[Embodiments of the invention]

この発明の一実施例に係わる電極となる導電層
に用いる導電材料としては、一般的に電極に用い
る、例えば金および白金等の金属およびカーボン
等があり、単独および各種基板と共に用いる。
The conductive material used for the conductive layer serving as the electrode according to an embodiment of the present invention includes metals commonly used for electrodes, such as gold and platinum, carbon, etc., and is used alone or in conjunction with various substrates.

この発明の一実施例に係わる半導体層に用いる
半導体としては、例えばSi等の無機半導体および
例えばπ−共役系高分子等の有機半導体がある。
ここにおいて、π−共役系高分子とはピロールと
N−置換ピロールの共重合体、ピロールのホモポ
リマー、N−置換ピロールのホモポリマー、ポリ
チエニレン、ポリアニリン、ポリフラン、ポリア
ズレンおよびポリピリジンなどの内の少なくとも
一種である。
Examples of semiconductors used in the semiconductor layer according to an embodiment of the present invention include inorganic semiconductors such as Si and organic semiconductors such as π-conjugated polymers.
Here, the π-conjugated polymer is at least one of a copolymer of pyrrole and N-substituted pyrrole, a homopolymer of pyrrole, a homopolymer of N-substituted pyrrole, polythienylene, polyaniline, polyfuran, polyazulene, and polypyridine. It is.

例えば、上記π−共役系高分子の半導体層を電
極となる導電層に設けるには、上記π−共役系高
分子に相当するモノマーおよび支持電解質を有機
溶媒に溶かし反応溶液とし、上記導電層を作用電
極とし、例えば白金などの対極との間に電流を通
じて電解重合法により作用電極上に所望のπ−共
役系高分子層を析出させ、析出したπ−共役系高
分子層をよく洗滌した後、充分にアニールする。
この場合、析出したπ−共役系高分子層は反応時
に支持電解質のアニオンがドーピングされP型半
導体となる。一方、このP型半導体を脱ドープ
し、さらにカチオンをドープすることにより、n
型半導体とすることができる。ここで、有機溶媒
としては、支持電解質および上記モノマーを溶解
させるものならよく、例えばアセトニトリル、ニ
トロベンゼン、ニトロメタン、N,N−ジメチル
ホルムアミド(DMF)、ジメチルスルホキシド
(DMSO)、ジクロロメタン、テトラヒドロフラ
ン、エチルアルコールおよびメチルアルコール等
の極性溶媒が単独又は2種以上の混合溶媒として
用いられる。支持電解質としては酸化電位および
還元電位が高く、電解重合にそれ自身が酸化又は
還元反応を受けず、かつ溶媒中に溶解させること
によつて溶液に電導性を付与することのできる物
質であり、例えば、過塩素酸テトラアルキルアン
モニウム塩、テトラアルキルアンモニウム、テト
ラフルオロボレート塩、テトラアルキルアンモニ
ウム、ヘキサフルオロホスフエート塩、テトラア
ルキルアンモニウム、パラトルエンスルホネート
塩および水酸化ナトリウム等が用いられるが、勿
論2種以上を併用しても構わない。
For example, in order to provide a semiconductor layer of the above-mentioned π-conjugated polymer on a conductive layer serving as an electrode, a monomer corresponding to the above-mentioned π-conjugated polymer and a supporting electrolyte are dissolved in an organic solvent to form a reaction solution, and the above-mentioned conductive layer is A desired π-conjugated polymer layer is deposited on the working electrode by electrolytic polymerization by passing a current between the working electrode and a counter electrode such as platinum, and the deposited π-conjugated polymer layer is thoroughly washed. , sufficiently annealed.
In this case, the deposited π-conjugated polymer layer is doped with the anion of the supporting electrolyte during the reaction and becomes a P-type semiconductor. On the other hand, by dedoping this P-type semiconductor and further doping with cations, n
type semiconductor. Here, the organic solvent may be any solvent that can dissolve the supporting electrolyte and the above monomers, such as acetonitrile, nitrobenzene, nitromethane, N,N-dimethylformamide (DMF), dimethyl sulfoxide (DMSO), dichloromethane, tetrahydrofuran, ethyl alcohol, and Polar solvents such as methyl alcohol may be used alone or as a mixed solvent of two or more. The supporting electrolyte is a substance that has a high oxidation potential and reduction potential, does not itself undergo an oxidation or reduction reaction during electrolytic polymerization, and can impart conductivity to a solution by dissolving it in a solvent. For example, tetraalkylammonium perchlorate, tetraalkylammonium, tetrafluoroborate salt, tetraalkylammonium, hexafluorophosphate salt, tetraalkylammonium, paratoluenesulfonate salt, sodium hydroxide, etc. are used, but of course there are two types. The above may be used in combination.

この発明の一実施例に用いる絶縁性高分子とし
ては、例えばα−ナフトール、β−ナフトール、
m−キシレノール、2,6−キシレノール、アク
ロレイン、P,P′−ジアミノジフエニルメタン、
4,4−チオジアニリン、O−アミノフエノー
ル、フエノールおよびチオフエノールなどのホモ
ポリマーならびにこれらの少なくとも2種以上の
コポリマーの内のいずれか1種がある。上記絶縁
性高分子を半導体層に設けるには、上記π−共役
系高分子層を析出させた時と同様に、有機溶媒に
上記絶縁性高分子に相当するモノマーおよび支持
電解質を溶かし、半導体層を設けた導電層を作用
電極として、絶縁性高分子層を電解重合法により
半導体層に析出させる。この場合、ヒドロキシル
基の解離を促進させる目的で求核剤として第3級
アミンを併用することもあり、その時は電極間に
は一定の電圧をかけておき、電流の減衰をモニタ
ーしながら適当な所で反応を止めるのが良い。こ
の場合、電極の絶縁層が成膜した部分は、絶縁性
であるのでもはやこの上には成膜は起こらず成膜
が停止する。一方、ピンホールの原因となる絶縁
層が成膜しなかつた電極部分には、選択的に絶縁
層が成膜され、結果的にピンホールが修復され成
膜が停止する。このようにして、電解重合法によ
り絶縁層を成膜すると、ピンホールの生成が防止
され、均一な絶縁層の成膜が可能となり、高性能
で、かつ性能が安定したMISダイオードが製造さ
れ、歩留まりが向上する。
Examples of the insulating polymer used in an embodiment of the present invention include α-naphthol, β-naphthol,
m-xylenol, 2,6-xylenol, acrolein, P,P'-diaminodiphenylmethane,
There are homopolymers such as 4,4-thiodianiline, O-aminophenol, phenol and thiophenol, and any one of copolymers of at least two or more of these. To provide the above-mentioned insulating polymer in the semiconductor layer, in the same way as when depositing the above-mentioned π-conjugated polymer layer, a monomer corresponding to the above-mentioned insulating polymer and a supporting electrolyte are dissolved in an organic solvent. An insulating polymer layer is deposited on the semiconductor layer by an electrolytic polymerization method using the conductive layer provided with this as a working electrode. In this case, a tertiary amine may be used as a nucleophile in order to promote the dissociation of the hydroxyl group. In this case, a constant voltage is applied between the electrodes, and an appropriate voltage is applied while monitoring the current decay. It is better to stop the reaction at that point. In this case, since the portion of the electrode on which the insulating layer is formed is insulative, no film is formed thereon and the film formation is stopped. On the other hand, an insulating layer is selectively formed on the electrode portion where the insulating layer that causes the pinhole has not been formed, and as a result, the pinhole is repaired and the film formation is stopped. In this way, by forming an insulating layer using electrolytic polymerization, the formation of pinholes is prevented, and a uniform insulating layer can be formed, producing a high-performance MIS diode with stable performance. Yield is improved.

この発明の一実施例に係わる電極となる金属層
の金属としては、半導体層がP型の場合は、例え
ばインジウム、ガリウム、インジウム−ガリウム
合金、アルミニウム、銀、スズおよびゲルマニウ
ムなどの仕事関数の小さい金属が、n型の場合に
は、例えば金、白金および銅などの仕事関数の大
きい金属が用いられ、蒸着、スパツタリング、
CVD成長およびメツキなどの方法で被着させる。
When the semiconductor layer is P-type, the metal of the metal layer serving as the electrode according to an embodiment of the present invention may be a metal with a low work function such as indium, gallium, indium-gallium alloy, aluminum, silver, tin, or germanium. When the metal is n-type, a metal with a large work function such as gold, platinum, or copper is used, and the metal is evaporated, sputtered,
Deposited by methods such as CVD growth and plating.

なお、電解重合法によつて得られるMISダイオ
ードの電気的特性は、重合時に用いられるモノマ
ーの種類に大きく依存するためモノマーを適宜選
択する必要がある。
Note that the electrical characteristics of the MIS diode obtained by electrolytic polymerization largely depend on the type of monomer used during polymerization, so it is necessary to select the monomer appropriately.

以下、この発明を実施例につき更に詳しく説明
するが、これに限定するものではない。
Hereinafter, this invention will be explained in more detail with reference to examples, but it is not limited thereto.

実施例 1 3.5cm×7cmのガラス基板上に真空蒸着法によ
つて厚さ1000Åのクロム層を設け、更にこの上に
金(Au)層を2000Åの厚さに真空蒸着法によつ
て設けたものを作用電極とした(有効作用電極面
積は2cm×3.5cm)。
Example 1 A chromium layer with a thickness of 1000 Å was provided on a 3.5 cm x 7 cm glass substrate by vacuum evaporation, and a gold (Au) layer was further provided on this with a thickness of 2000 Å by vacuum evaporation. was used as the working electrode (effective working electrode area: 2 cm x 3.5 cm).

100mlのアセトニトリル中にN−メチルピロー
ル(0.8g)、テトラエチルアンモニウムパークロ
レイト(0.7g)を溶解させた液を反応溶液とし
た。対極として白金(Pt)電極を、参照電極と
してSCE(飽和カロメル電極)を使用し、反応溶
液中に作用電極と共に浸し、窒素ガス雰囲気下で
作用電極を陽極として対極との間に一定電流
(0.15mA)を90分間流し、作用電極上にπ−共
役系高分子層を約4000Åの厚さに析出させ、アセ
トニトリルで洗浄後、空気中80℃で8時間アニー
ルし、π−共役系高分子試料()を得た。
A reaction solution was prepared by dissolving N-methylpyrrole (0.8 g) and tetraethylammonium perchlorate (0.7 g) in 100 ml of acetonitrile. A platinum (Pt) electrode was used as the counter electrode, and a SCE (saturated calomel electrode) was used as the reference electrode. They were immersed together with the working electrode in the reaction solution, and a constant current (0.15 mA) for 90 minutes to deposit a π-conjugated polymer layer with a thickness of about 4000 Å on the working electrode, wash it with acetonitrile, and then anneal it in air at 80°C for 8 hours to separate the π-conjugated polymer sample. I got ().

100mlのアセトニトリルにトリエチルアミン
(0.51g)、テトラエチルアンモニウムパークロレ
イト(0.7g)およびα−ナフトール(0.64g)
を溶解させた液を反応溶液とした。対極として
Pt電極を、参照電極としてSCE(飽和カメロル電
極)を使用し、反応溶液中にπ−共役系高分子試
料()と共に浸し、窒素ガス雰囲気下で作用電
極を陽極として対極との間に一定電圧(0.4V)
を15分間流し、π−共役系高分子試料()表面
に絶縁層を20Åの厚さに析出させ、アセトニトリ
ルで洗浄後乾燥させ、π−共役系高分子試料
()を得た。
Triethylamine (0.51 g), tetraethylammonium perchlorate (0.7 g) and alpha-naphthol (0.64 g) in 100 ml acetonitrile.
The solution in which was dissolved was used as the reaction solution. as the opposite
A Pt electrode was used as a reference electrode (SCE) and immersed in a reaction solution together with a π-conjugated polymer sample ( ), and a constant voltage was applied between the working electrode as an anode and the counter electrode in a nitrogen gas atmosphere. (0.4V)
was allowed to flow for 15 minutes to deposit an insulating layer with a thickness of 20 Å on the surface of the π-conjugated polymer sample (), which was washed with acetonitrile and dried to obtain a π-conjugated polymer sample ().

さらに、π−共役系高分子試料()の上に真
空蒸着法によりインジウム(In)層を約3000Åの
厚さで設けることにより得られたMISダイオード
をMISダイオード試料()とする。
Further, an MIS diode obtained by providing an indium (In) layer with a thickness of about 3000 Å on the π-conjugated polymer sample () by vacuum evaporation is referred to as an MIS diode sample ().

実施例 2 実施例1で得られたπ−共役系高分子試料
()を用いてこの上に実施例1と同様な方法を
用いて絶縁膜を40Åの厚さで析出させたものをπ
−共役系高分子試料()とする。さらにπ−共
役系高分子試料()の上にIn層を約3000Åの厚
さで設けることによつて得られたMISダイオード
をMISダイオード試料(2)とする。
Example 2 Using the π-conjugated polymer sample () obtained in Example 1, an insulating film was deposited on it to a thickness of 40 Å using the same method as in Example 1.
- Conjugated polymer sample (). Further, an MIS diode obtained by providing an In layer with a thickness of about 3000 Å on the π-conjugated polymer sample (2) is referred to as MIS diode sample (2).

実施例 3 実施例1で得られたπ−共役系高分子試料
()を用いてこの上に実施例1と同様な方法を
用いて絶縁層を60Åの厚さで析出させたものをπ
−共役系高分子試料()とする。さらにπ−共
役系高分子試料()の上にIn層を約3000Åの厚
さで設けることによつて得られたMISダイオード
をMISダイオード試料(3)とする。
Example 3 Using the π-conjugated polymer sample () obtained in Example 1, an insulating layer was deposited on it to a thickness of 60 Å using the same method as in Example 1.
- Conjugated polymer sample (). Furthermore, an MIS diode obtained by providing an In layer with a thickness of about 3000 Å on the π-conjugated polymer sample (2) is referred to as MIS diode sample (3).

比較例 1 実施例1で得られたπ−共役系高分子試料
()の上にIn層を役3000Åの厚さで設けること
によつて得られたシヨツトキー・ダイオードを比
較試料(1)とする。
Comparative Example 1 Comparative sample (1) is a Schottky diode obtained by providing an In layer with a thickness of 3000 Å on the π-conjugated polymer sample ( ) obtained in Example 1. .

第3図にMISダイオード試料(1)ないし試料(3)
の、第4図に比較試料(1)の断面図を示す。図にお
いて、9,13はリード線、10はIn電極、11
はポリα−ナフトール層、12はポリN−メチル
ピロール膜、14はAu電極、15はガラス基板
である。
Figure 3 shows MIS diode sample (1) or sample (3).
Figure 4 shows a cross-sectional view of comparative sample (1). In the figure, 9 and 13 are lead wires, 10 is an In electrode, and 11
12 is a poly-α-naphthol layer, 12 is a polyN-methylpyrrole film, 14 is an Au electrode, and 15 is a glass substrate.

第5図はMISダイオード試料(1)ないし試料(3)な
らびに比較試料(1)の電圧Vによる電流Iの変化を
示すI−V特性図である。図中、16は比較試料
の特性、17〜19は各々MISダイオード試料(1)
〜試料(3)の特性である。これによると、この発明
の一実施例により得られたMISダイオードは、絶
縁層のピンホールの生成が防止され、絶縁層の状
態が均一であるので、良好な整流特性が観測さ
れ、しかも他の要因の介入が防げるので、絶縁層
の層厚に依存する特異的変化が見られ、製造時の
層厚制御により所望の特性のMISダイオードを得
ることができることが解る。
FIG. 5 is an IV characteristic diagram showing changes in current I with voltage V for MIS diode samples (1) to (3) and comparative sample (1). In the figure, 16 is the characteristic of the comparison sample, 17 to 19 are each MIS diode sample (1)
-Characteristics of sample (3). According to this, the MIS diode obtained according to an embodiment of the present invention has good rectifying characteristics because the formation of pinholes in the insulating layer is prevented and the state of the insulating layer is uniform. Since the intervention of factors can be prevented, specific changes depending on the layer thickness of the insulating layer can be seen, and it can be seen that MIS diodes with desired characteristics can be obtained by controlling the layer thickness during manufacturing.

〔発明の効果〕〔Effect of the invention〕

以上説明したとおり、この発明は電極となる導
電層に半導体層を設け、この半導体層に電解重合
法により絶縁性有機高分子層を設け、さらにこの
絶縁性有機高分子層に電極となる金属層を設ける
ことにより容易に、高性能で、かつ性能の安定し
たMISダイオードの製造方法を得ることができ
る。なお、上記絶縁性有機高分子層の層厚制御を
容易であり、例えば光センサーおよび光電変換素
子など種々の電子部品の製造に有用である。
As explained above, the present invention provides a semiconductor layer as a conductive layer that becomes an electrode, an insulating organic polymer layer is provided on this semiconductor layer by electrolytic polymerization, and a metal layer that becomes an electrode on this insulating organic polymer layer. By providing this, it is possible to easily obtain a method for manufacturing an MIS diode with high performance and stable performance. The thickness of the insulating organic polymer layer can be easily controlled, and is useful for manufacturing various electronic components such as optical sensors and photoelectric conversion elements.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は一般的なMISダイオードの断面図、第
2図は従来のMOSダイオードの断面図、第3図
はこの発明の一実施例によるMISダイオードの断
面図、第4図は一般的なシヨツトキー・ダイオー
ドの断面図、第5図はこの発明の一実施例のMIS
ダイオードと、一般的なシヨツトキー・ダイオー
ドを比較するための電流I−電圧V特性図であ
る。 図において、1,6はリード線、2は電極とな
る金属層、3は絶縁層、4は半導体層、5は電極
となる導電層、7はSiO層、8はSi層、9,13
はリード線、10はIn電極、11はポリα−ナフ
トール層、12はポリN−メチルピロール膜、1
4はAu電極、15はガラス基板、16は比較試
料の特性、17〜19は各々この発明の一実施例
によるMISダイオード試料(1)〜(3)の特性である。
なお、図中、同一符号は同一または相当部分を示
す。
Fig. 1 is a cross-sectional view of a general MIS diode, Fig. 2 is a cross-sectional view of a conventional MOS diode, Fig. 3 is a cross-sectional view of a MIS diode according to an embodiment of the present invention, and Fig. 4 is a general shot key.・The cross-sectional view of the diode, Figure 5, is an MIS of an embodiment of this invention.
FIG. 3 is a current I-voltage V characteristic diagram for comparing a diode and a general Schottky diode. In the figure, 1 and 6 are lead wires, 2 is a metal layer that becomes an electrode, 3 is an insulating layer, 4 is a semiconductor layer, 5 is a conductive layer that is an electrode, 7 is a SiO layer, 8 is a Si layer, 9, 13
1 is a lead wire, 10 is an In electrode, 11 is a poly-α-naphthol layer, 12 is a poly-N-methylpyrrole film, 1
4 is an Au electrode, 15 is a glass substrate, 16 is a characteristic of a comparative sample, and 17 to 19 are characteristics of MIS diode samples (1) to (3) according to an embodiment of the present invention, respectively.
In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】 1 電極となる導電層に半導体層を設ける工程、
この半導体層に電解重合法により絶縁性有機高分
子層を設ける工程、およびこの絶縁性有機高分子
層に電極となる金属層を設ける工程を施すMISダ
イオードの製造方法。 2 半導体層がπ−共役系高分子層である特許請
求の範囲第1項記載のMISダイオードの製造方
法。 3 π−共役系高分子層が電解重合法により得ら
れる特許請求の範囲第2項記載のMISダイオード
の製造方法。 4 π−共役系高分子がピロールとN−置換ピロ
ールの共重合体、ピロールのホモポリマー、N−
置換ピロールのホモポリマー、ポリチエニレン、
ポリアニリン、ポリフラン、ポリアズレンおよび
ポリピリジンの内の少なくとも一種である特許請
求の範囲第2項又は第3項記載のMISダイオード
の製造方法。 5 π−共役系高分子層に電子受容体および電子
供与体の内の一種がドープされている特許請求の
範囲第2項ないし第4項のいずれかに記載のMIS
ダイオードの製造方法。 6 絶縁性有機高分子層が、α−ナフトール、β
−ナフトール、m−キシレノール、2,6−キシ
レノール、アクロレイン、P,P′−ジアミノジフ
エニルメタン、4,4−チオジアニリン、O−ア
ミノフエノール、フエノールおよびチオフエノー
ルのホモポリマー並びに上記化合物の内の少なく
とも2種のコポリマーの内のいずれか一種である
特許請求の範囲第1項ないし第5項のいずれかに
記載のMISダイオードの製造方法。
[Claims] 1. A step of providing a semiconductor layer on a conductive layer serving as an electrode,
A method for manufacturing an MIS diode, which includes the steps of providing an insulating organic polymer layer on this semiconductor layer by electrolytic polymerization, and providing a metal layer serving as an electrode on this insulating organic polymer layer. 2. The method for manufacturing an MIS diode according to claim 1, wherein the semiconductor layer is a π-conjugated polymer layer. 3. The method for manufacturing an MIS diode according to claim 2, wherein the π-conjugated polymer layer is obtained by an electrolytic polymerization method. 4 The π-conjugated polymer is a copolymer of pyrrole and N-substituted pyrrole, a homopolymer of pyrrole, an N-
Homopolymer of substituted pyrrole, polythienylene,
The method for producing an MIS diode according to claim 2 or 3, wherein the MIS diode is at least one of polyaniline, polyfuran, polyazulene, and polypyridine. 5. The MIS according to any one of claims 2 to 4, wherein the π-conjugated polymer layer is doped with one of an electron acceptor and an electron donor.
How to make a diode. 6 The insulating organic polymer layer contains α-naphthol, β
- homopolymers of naphthol, m-xylenol, 2,6-xylenol, acrolein, P,P'-diaminodiphenylmethane, 4,4-thiodianiline, O-aminophenol, phenol and thiophenol, and at least of the above compounds The method for manufacturing an MIS diode according to any one of claims 1 to 5, wherein the MIS diode is one of two types of copolymers.
JP59034575A 1984-02-24 1984-02-24 Manufacture of mis diode Granted JPS60178669A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59034575A JPS60178669A (en) 1984-02-24 1984-02-24 Manufacture of mis diode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59034575A JPS60178669A (en) 1984-02-24 1984-02-24 Manufacture of mis diode

Publications (2)

Publication Number Publication Date
JPS60178669A JPS60178669A (en) 1985-09-12
JPH0570950B2 true JPH0570950B2 (en) 1993-10-06

Family

ID=12418119

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59034575A Granted JPS60178669A (en) 1984-02-24 1984-02-24 Manufacture of mis diode

Country Status (1)

Country Link
JP (1) JPS60178669A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004524149A (en) * 2001-03-02 2004-08-12 コミツサリア タ レネルジー アトミーク Method for mask-free local grafting of organics onto conductive or semiconductive parts of composite surfaces

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0449226A1 (en) * 1990-03-27 1991-10-02 Seiko Epson Corporation Non-linear resistor switching element, active matrix liquid crystal panel using the same, and method for manufacturing the non-linear resistor switching element

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58107686A (en) * 1981-12-21 1983-06-27 Nippon Telegr & Teleph Corp <Ntt> Macromolecular semiconductor variable capacity element
JPS58206612A (en) * 1982-05-27 1983-12-01 Showa Denko Kk Production of acetylene high-polymer

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58107686A (en) * 1981-12-21 1983-06-27 Nippon Telegr & Teleph Corp <Ntt> Macromolecular semiconductor variable capacity element
JPS58206612A (en) * 1982-05-27 1983-12-01 Showa Denko Kk Production of acetylene high-polymer

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004524149A (en) * 2001-03-02 2004-08-12 コミツサリア タ レネルジー アトミーク Method for mask-free local grafting of organics onto conductive or semiconductive parts of composite surfaces
JP4667715B2 (en) * 2001-03-02 2011-04-13 コミッサリア ア レネルジー アトミーク エ オ ゼネルジ ザルタナテイヴ Method for locally grafting organic matter mask-free onto conductive or semiconductive portions of a composite surface

Also Published As

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