JPH0566809A - Diagnostic system for sequence controller - Google Patents

Abstract

PURPOSE:To obtain the controller diagnostic system having high reliability by executing a program as an input/output signal by inverting a bit of trace data, and comparing its result and the trace data. CONSTITUTION:When a dual object is executed, an instruction at the time of executing an execution object and a dual instruction are executed in a CPU 1. On a data memory 3, data whose bit is inverted completely from the time of executing the execution object is inputted and outputted. In this case, unless there is abnormality in the CPU 1 and the data memory 3, a value obtained by executing a bit inversion of a result of execution coincides with trace data of an execution mode. On the contrary, in the case there is abnormality in the CPU 1 and an AND operation and an OR operation cannot be processed normally, and in the case there is abnormality in the data memory 3 and a certain bit is always turned on and off, the value obtained by executing a bit inversion of a result of execution does not coincide with the trace data of the execution mode. In such a way, a diagnosis of the CPU and the data memory can be executed with high reliability.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sequence controller installed in a manufacturing site such as a steel plant, a chemical plant and a papermaking plant, and more particularly to a diagnostic method for the sequence controller.

[0002]

2. Description of the Related Art FIG. 4 is a diagram showing an embodiment of a conventional sequence controller. The source code 9 created by the editor 10 is converted into the execution object code 7 by the compiler 8 and input into the program memory 2. The CPU 1 controls the data memory 3 according to the execution object code 7 of the program memory 2.
Thus, in the conventional sequence controller, the CPU
There is no special circuit for diagnosing 1 or the data memory 3, and the CPU is diagnosed by checking the execution result of the simple logic created for the diagnosis, or the data memory is diagnosed by the parity check.

[0003]

As described above, the diagnosis of the CPU and the data memory has only a simple method, and has a drawback of low reliability. An object of the present invention is to provide a highly reliable diagnostic method for a sequence controller by using a dual object code of an execution object code and an input / output signal traced in a trace buffer.

[0004]

In the sequence controller, when an operation abnormality occurs, a diagnostic mode is entered and the dual object code of the execution object code generated at the time of compiling the source program is loaded on the program memory. .. As input data for actually operating this dual object, the data traced at the time of execution in the execution mode is bit-inverted and input.

[0005]

[Operation] When the dual object is executed in this state, CP
In U, a dual instruction with the instruction at the time of execution of the execution object is executed. In addition, data whose bit is completely inverted from that when the execution object is executed is input / output to / from the data memory. At this time, if there is no abnormality in the CPU and the data memory, the value obtained by bit-reversing the execution result matches the trace data in the execution mode. On the contrary, if there is something wrong with the CPU, AND
When a certain operation or OR operation cannot be processed normally, or there is an error in the data memory, a certain bit is always ON, always OF
When it becomes F, the bit-inverted value of the execution result does not match the trace data in the execution mode. As a result, the CPU and the data memory are diagnosed.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below based on an embodiment shown in the drawings. FIG. 1 is a block diagram of a sequence controller for explaining an embodiment of the present invention. Editor 1
The source code 9 created with 0 is converted into the execution object code 7 by the compiler 8. At this time, the dual object code 16 is generated by inputting the execution object code 7 into the dual object code conversion program 17. Here, a method of generating the dual object code 16 will be described with reference to FIGS.
Given the circuit diagram 21, this circuit diagram is represented by the logical expression 22 (A · C + B) · D = E. This logical expression and the logical expression of dual are logical expression 2
5

[0007]

[Equation 1]

It is defined as If this formula is expanded according to De Morgan's law, formula 24

[0009]

[Equation 2]

[0010] The circuit diagram of this logical expression is 23. FIG. 3 is a diagrammatic representation of these two circuit diagrams corresponding to the actual object code. Comparing the object codes 26 and 27, the AND instruction and the OR instruction are interchanged. Also, the data part is all inverted. Dual object code conversion program 1 of FIG.
In 7, the code of the AND instruction is converted into the code of the OR instruction and the code of the OR instruction is converted into the code of the AND instruction by using this property. At this time, the data part is not converted. The conversion of the data portion is inverted by the data bit inversion processing program 12 when loading from the trace buffer 11 to the data memory input signal area 3a. In the execution mode, the execution object code 7 is loaded into the program memory 2 and loaded into the data memory input signal area 3a via the signal input device 4 of the operating machine 6. The result of executing the processing is output from the data memory signal output area 3b to the operating machine 6 via the signal output device 5. The input signal, output signal, and internal signal at the time of execution are stored in the trace buffer 11. In the diagnostic mode, the dual object code 16 is loaded into the program memory 2. Further, the input / output signal is bit-inverted by the data bit inversion processing program 12, and the input / output signal area 3 of the data memory is
a and 3b are loaded. The processing result is output to the diagnostic operation result buffer 13. Further trace buffer 1
1 and the result of processing the data in the diagnostic operation result buffer 13 by the bit inversion processing 20 is the comparator 14
And is output to the diagnostic result output device 15. The diagnosis result is normal if the two inputs to the comparator 14 are equal, and if not equal, the CPU 1 or the data memory 3
Or both are abnormal.

[0011]

As described above, according to the present invention, it is possible to provide a highly reliable diagnostic method for a sequence controller.

[Brief description of drawings]

FIG. 1 is a block diagram of a sequence controller having a diagnostic function of the present invention.

FIG. 2 Example of dual conversion of logic circuit

FIG. 3 is a diagram showing a comparison of object codes before and after dual conversion.

FIG. 4 is a block diagram of a conventional sequence controller.

[Explanation of symbols]

 1 CPU 2 Program Memory 3 Data Memory 3a Input Signal 3b Output Signal 3c Internal Signal 4 Signal Input Device 5 Signal Output Device 6 Operating Machine 7 Execution Object Code 8 Compiler 9 Source Code 10 Editor 11 Trace Buffer 12 Data Bit Inversion Processing Program 13 Diagnostics Time operation result buffer 14 Comparator 15 Diagnostic result output device 16 Dual object code 17 Dual object code conversion program 18, 19 Execution mode / diagnostic mode changeover switch 20 Bit inversion process 21 Circuit diagram of logical expression 22 Logical expression 23 Logical Circuit diagram of Expression 24 24 Logical expression 25 Logical expression 22 and dual logical expression 26, 27 Object code

Claims (1)

[Claims] 1. In a sequence controller, an ordinary compiler and a program for converting an execution object code generated by the compiler into a dual object code generate a dual object code of the generated execution object code when compiling the source program, and execute the program. In the mode, the input signal, output signal, and internal signal are traced to the trace buffer, and when abnormal operation is confirmed, the mode is switched to the diagnostic mode, the dual object code is loaded into the program memory, and the bit of the trace data is inverted. A diagnostic method for a sequence controller, characterized in that a CPU and a data memory are diagnosed by executing a program as an input / output signal and comparing the execution result with trace data.