JPH0565048B2 - - Google Patents
Info
- Publication number
- JPH0565048B2 JPH0565048B2 JP61248790A JP24879086A JPH0565048B2 JP H0565048 B2 JPH0565048 B2 JP H0565048B2 JP 61248790 A JP61248790 A JP 61248790A JP 24879086 A JP24879086 A JP 24879086A JP H0565048 B2 JPH0565048 B2 JP H0565048B2
- Authority
- JP
- Japan
- Prior art keywords
- alignment
- semiconductor wafer
- alignment mark
- resist layer
- processed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 claims description 29
- 239000000758 substrate Substances 0.000 claims description 7
- 230000002093 peripheral effect Effects 0.000 claims description 5
- 239000004065 semiconductor Substances 0.000 description 22
- 230000003287 optical effect Effects 0.000 description 9
- 238000007796 conventional method Methods 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
Landscapes
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61248790A JPS63102314A (ja) | 1986-10-20 | 1986-10-20 | 多層レジストプロセスにおけるアライメント方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61248790A JPS63102314A (ja) | 1986-10-20 | 1986-10-20 | 多層レジストプロセスにおけるアライメント方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS63102314A JPS63102314A (ja) | 1988-05-07 |
JPH0565048B2 true JPH0565048B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1993-09-16 |
Family
ID=17183435
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61248790A Granted JPS63102314A (ja) | 1986-10-20 | 1986-10-20 | 多層レジストプロセスにおけるアライメント方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63102314A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0536837U (ja) * | 1991-10-14 | 1993-05-18 | 株式会社アドバンテスト | ウエーハof位置検出装置 |
-
1986
- 1986-10-20 JP JP61248790A patent/JPS63102314A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS63102314A (ja) | 1988-05-07 |
Similar Documents
Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |