JPH056218B2 - - Google Patents

Info

Publication number
JPH056218B2
JPH056218B2 JP5546886A JP5546886A JPH056218B2 JP H056218 B2 JPH056218 B2 JP H056218B2 JP 5546886 A JP5546886 A JP 5546886A JP 5546886 A JP5546886 A JP 5546886A JP H056218 B2 JPH056218 B2 JP H056218B2
Authority
JP
Japan
Prior art keywords
channel
control unit
storage means
data
register element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP5546886A
Other languages
English (en)
Japanese (ja)
Other versions
JPS62212756A (ja
Inventor
Kenichi Murakami
Seiichi Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP5546886A priority Critical patent/JPS62212756A/ja
Publication of JPS62212756A publication Critical patent/JPS62212756A/ja
Publication of JPH056218B2 publication Critical patent/JPH056218B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP5546886A 1986-03-13 1986-03-13 チヤネル制御方式 Granted JPS62212756A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5546886A JPS62212756A (ja) 1986-03-13 1986-03-13 チヤネル制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5546886A JPS62212756A (ja) 1986-03-13 1986-03-13 チヤネル制御方式

Publications (2)

Publication Number Publication Date
JPS62212756A JPS62212756A (ja) 1987-09-18
JPH056218B2 true JPH056218B2 (enrdf_load_html_response) 1993-01-26

Family

ID=12999433

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5546886A Granted JPS62212756A (ja) 1986-03-13 1986-03-13 チヤネル制御方式

Country Status (1)

Country Link
JP (1) JPS62212756A (enrdf_load_html_response)

Also Published As

Publication number Publication date
JPS62212756A (ja) 1987-09-18

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