JPH0561985A - Data processor - Google Patents

Abstract

PURPOSE:To shorten the time until the time to prepare the data of a dot pattern to paint out the internal part from the outline data like a vector font, etc., is made fast and the character, etc., are outputted. CONSTITUTION:When a processor 1 develops the data given by a vector to the dot pattern of each picture element unit and the outline data are written in an image memory 3, the data to paint out the internal part of the outline data are prepared by a painting-out circuit 4 constituted of hardware, and this is outputted to an output device 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data processing device capable of displaying and printing characters and figures given by vector data at high speed.

[0002]

2. Description of the Related Art When displaying or printing characters with a data processing device such as a word processor or a personal computer, it is convenient to reduce, enlarge or rotate the characters. Are being used in vector fonts. In addition, it is becoming common to have graphic data as vectors.
When this vector data is expanded to each dot (pixel) on the screen for display, if it is output as it is,
Only the outline of the character or figure will be displayed. For example, when a vector font "A" is expanded into bit data, only the outline portion becomes data "1" indicating "display", and other than that becomes "no display""0" (actually, actually). Is expanded by software so that when expanded, a large number of horizontal 1-line data "1" s are "1" only at both ends and "0" in the middle. Show.). If the data of FIG. 9 is displayed as it is, it becomes as shown in FIG. Since such a character is hard to see, normally, the data in which the character is filled is displayed as shown in FIG.

When character data is stored in a vector font and the inside of the contour is filled when displaying or printing,
Conventionally, software identifies whether each pixel (dot) to be displayed is inside or outside the contour of the display target character, and if it is inside the contour, the data is changed from “0” to “1” by software. And send it to the display device.
It is displayed as 1. The above is "display"
However, the same applies to the case of "printing".

[0004]

When displaying or printing a character or a graphic, software for identifying whether or not each dot is inside the contour is individually processed by software as in the above-mentioned prior art, and data inside the contour is processed. Was rewritten, CPU
However, there is a problem in that it takes a long time to display and print because the processing load is heavy and the processing takes time.

An object of the present invention is to provide a data processing device capable of outputting characters and graphics in a short time.

[0006]

The above object is to provide a data processing device comprising a processing device for developing data given by a vector into a dot pattern, and an output device for displaying or printing the data stored in the memory, When there is "0" data between the odd-numbered and even-numbered "1" data from one end on one line of the contour data represented by the dot pattern, the data converted to "1" This is achieved by providing an in-contour data filling circuit for writing

[0007]

[Function] Since the data in the contour is filled by the hardware circuit, the burden of filling the CPU is eliminated and the filling work can be performed at high speed. Therefore, characters and figures using vector fonts can be output at high speed. It becomes possible to do.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is an overall configuration diagram of a data processing device to which an in-contour data filling circuit according to an embodiment of the present invention is applied. This data processing device includes a processing device (CPU) 1 for performing various calculations and controlling other circuits, an output device 2 such as a display device and a printer, and an image memory for storing one screen of data to be displayed on the display device. 3, a contour data filling circuit 4 which will be described later in detail, and a bus 5 which interconnects these.

FIG. 2 is a block diagram of the contour data filling circuit 4. The filling circuit 4 is a paint circuit that takes in the contour data output from the CPU 1 side to the bus 5 for each line, and a paint that replaces the in-contour data “0” with “1” from the data fetched by the latch circuit 10. The circuit 11 and the read buffer 1 that temporarily stores the data after the replacement and outputs the data to the output device 2 through the bus 5.
It consists of 2.

FIGS. 3 and 4 are detailed configuration diagrams of the filling circuit 4 shown in FIG. 2. Since these cannot be displayed as one diagram, they are divided into two diagrams (FIG. 3 shows the left half of FIG. Indicates the right half.). The fill circuit is
It is preferable to take in one line of data at a time and perform a logical determination as to whether or not the data is the contour data and replace the contour data “0” with “1”. However, in the present embodiment, Due to the use of a 16-bit CPU, 16 lines of data for each line are fetched from the left end, and data in which contour data is filled is generated and output.

The 16-bit contour data (each bit corresponds to one dot on the display screen) fetched from the bus 5 of FIG. 3 is latched by latch circuits 10a and 10b in units of 8 bits. The 16-bit contour data latched by the latch circuits 10a and 10b is the paint circuit 11 of FIG.
a, 11b, 11c, 11d, and processed in each paint circuit 11a-11d as described later. The latch circuit 11e is provided to control the continuity at each boundary for every 16 bits, and the 16th bit output signal obtained by processing the previous contour data is oD15, The carry-out Co3 and the input signal iD15 of the 16th bit of the previous contour data are set to ii0, ii1, and i, respectively.
Output as i2. The output signals OD0 to OD15 of the paint circuits 11a to 11d are read by the read buffer circuit 1
The output signals of the buffer circuits 12a and 12b are sent to the output device via the bus 5 and sent to the output devices 2a and 12b for temporary storage. The paint circuits 11a to 11d have the same configuration, and a detailed circuit thereof is shown in FIG. This paint circuit consists of 8 OR gates, 12 AND gates, 1
It is composed of three knot circuits.

Next, the operation of the in-contour data filling circuit having the above configuration will be described. For example, suppose that the contour data of 64 bits per line shown in the upper part of FIG. 12 is output to the bus 5 from the CPU side by 16 bits. The data of “1” is the 2nd, 3rd, 5th, 8th, 1 from the left end.
3rd, 28th, 37th, 45th, 57th, 6
It is the first and the others are "0". Among the data of "0", the data inside the contour is between the 5th and 8th
It is possible to fill by replacing the data “0” of this part with “1” and making it the lowest data in FIG. 12 between the 28 th to the 28 th, the 37 th to the 45 th, and the 57 th to the 61 st. .. The data of "1" continues in the second and third, but since this part hits the upper end of the character, "1" is continuous, and the fifth "1" is sandwiched by the fourth "0". Is the beginning of the contour of the next line. This embodiment also deals with the case where two "1" s continue at the upper end of a character. If the developed pattern is such that "0" is always sandwiched even at the upper end as shown in FIG. 9, the circuit configuration for coping with two consecutive "1" s is unnecessary.

In the present embodiment, the first 16 bits (see FIG. 12)
In the above example, the contour data of “011010010001000” is taken into the latch circuit 10 at the rising edge of the control signal WRITE-N and sent to the paint circuit in the subsequent stage. The signals iD0 to iD0 fetched by this latch circuit
Of the iD15, the first four signals iD0 to iD3 are input to the input terminals d, e, f, g of the paint circuit 11d. The signals ii0, ii1, and ii2 output from the latch circuit 11e to the paint circuit 11d are input terminals a, b, and c.
Entered in.

Output signals ii0, ii1, of the latch 11e
The initial values of 112 are all “0”, and the signals iD0 to iD0
iD3 is “0110” in the example of FIG. That is, "0000110" is input to the input terminals a to g of FIG. As a result, the J terminal output of the paint circuit 11d is "0", the K terminal output is "1", the L terminal output is "1", and the M terminal is M.
The terminal output is "0" and the N terminal output (carry output) is "0". The outputs of the J, K, L, and M terminals are sent to the read buffer circuit 12 as the 0th to 3rd output signals oD0 to oD3, respectively, and are temporarily stored therein.

At the d, e, f, and g input terminals of the paint circuit 11c, the following four signals iD4, iD5, iD6, iD7 in the 16-bit contour data (in the example of FIG. 12,
"1001") is input. 1-bit lower output data oD3 (M terminal output of the paint circuit 11d) is input to the a input terminal, and the paint circuit 11 is input to the b input terminal.
The carry output of d (N terminal output) is input, and the 1-bit lower input signal iD3 is input to the c input terminal. In this way, when "0001001" is input to the ag input terminals, the J, K, L, M, N terminal outputs of the paint circuit 11c become "11110". That is, the output signal o
D4 to oD7 are "1111", which is buffer 1
Sent to 2.

In the same manner, the input signal to the terminals a to g of the paint circuit 11b becomes "1010000" and its J to N terminal output becomes "00000", and the signals a to g of the paint circuit 11a are input. Input signal is “000100
When the 16-bit signal processing is completed in this way, the signals oD0 to oD15 stored in the buffer 12 are output.
“0110111100001111” is output to the bus 5 at the rising edge of the control signal READ-N,
It is sent to the output device. Then, the next 16-bit contour data (in the example of FIG. 12, “00000000000010”)
000 ″) is latched by the latch circuit 10. At this time, the outputs (ii0, ii1, ii) of the latch circuit 11e.
2) is (1,1,0), so that J to N of the circuit 11d is
The output of the terminal is "11111". Thereafter, the same processing is repeated, and the result of the lowermost stage of FIG. 12 is obtained.

FIG. 6 is a block diagram of another embodiment of the data processing device to which the above-mentioned filling circuit is applied. In this embodiment, the filling circuit 4 is interposed between the image memory 3 and the CPU 1. In this configuration, C
When the PU 1 writes the contour data in the image memory 3 and outputs the contour data in the memory 3 to the output device 2, the filling circuit 4 takes in the contour data and creates filled data, and the data is output to the output device 2. It is designed to output.

FIG. 7 is a detailed diagram of the above-mentioned painting circuit and its peripheral circuits. In FIG. 7, 9 is a control circuit and 19 is a RAM. Also, the buffer 20 is
It is provided between the CPU data bus and the RAM 19 and cuts off the connection between the CPU data bus and the RAM 19 when receiving a paint mode (PMODE) signal. CS is a chip select signal of RAM 19, OE
Is output enable, WE is write enable,
AS is the address strobe, DS is the data strobe,
RW is a read / write control signal from the CPU, DACK is a signal indicating completion of data reception and writing to the CPU, or a wait signal to the CPU, P
MODE is a painting operation start control signal, and each signal is controlled by the control circuit 9.

The contour data sent from the CPU is temporarily stored in the RAM 19. When the CPU reads the contour data stored in the RAM 19, the P mode signal is output to the control circuit 9. As a result, the buffer 20 cuts off the connection between the RAM 19 and the data bus. In this state, the CPU uses the address bus to RAM 19
When the address is designated, the contour data stored in that address is read from the RAM 19, but this contour data is not output to the data bus as it is, but is sent to the painting circuit 4 and is filled there. Data is created and output on the data bus. In the present embodiment, the filling time is about several hundreds ns to 1 μs.
PU needs to be weighted. Further, the filled data is not stored in the RAM 19 and can be said to be a speed circuit with output priority such as display and printing. FIG. 8 is a configuration diagram of a peripheral circuit according to another embodiment different from FIG. In FIG.
The buffer 21 is turned on in the P mode. In the normal case, the CPU can read and write to the RAM 19, and the CPU first writes the contour data in the RAM 19. When the original data for filling is set in the RAM 19, the CPU sets the P mode signal. As a result, the buffer 20 is turned off (cut off) and the buffer 21 is turned on (conduction).

The CPU issues a read command to the RAM address through the address bus. As a result, the contour data of the address is output from the RAM 19 to the data bus side. However, the contour data is blocked by the buffer 20 and is not output to the data bus of the CPU, but is taken into the filling circuit 4 via the buffer 21. The filling circuit 4 performs the above-described filling work and outputs the filled data to the RAM 19 side via the buffer 21.

The CPU tries to write the data on the data bus of the CPU to the address specified by the write command after waiting for a certain period of time after issuing the read command, but the buffer 20 is cut off. Therefore, what is written by this write command is the data output from the filling circuit 4 through the buffer 21, that is, the filled data. The above-described read / write operation completes the filling of data for one line, one byte, or one word. After that, the same operation is repeated for the necessary lines, and the filled data is stored in RAM1.
Completed within 9. When the P mode is released, the buffer 21 is turned off and the buffer 20 is turned on, the filled data in the RAM 19 is output to the output device side. In this embodiment, the CPU only outputs the P-mode signal,
After that, the painting operation is performed without being aware of the painting work, and the painting circuit 4 executes the painting work by utilizing the read / write bus cycle for the RAM 19 of the CPU, and the painting data is created.

[0022]

According to the present invention, since the contour data is filled in by hardware, it takes only a short time until the data is actually output (displayed or printed), and the software is simplified. This has the effect of reducing the load on the CPU.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a data processing device to which a filling circuit according to an embodiment of the present invention is applied.

FIG. 2 is a configuration diagram of a filling circuit shown in FIG.

FIG. 3 is a detailed configuration diagram (left half) of the painting circuit shown in FIG.

FIG. 4 is a detailed configuration diagram (right half) of the filling circuit shown in FIG.

5 is an internal logic circuit of circuits 11a to 11d shown in FIGS. 3 and 4. FIG.

FIG. 6 is a configuration diagram of a data processing device according to another embodiment of the present invention.

FIG. 7 is a connection configuration diagram of a painting circuit and its peripheral circuit.

FIG. 8 is another connection configuration diagram of the filling circuit and its peripheral circuit.

9 is contour data of symbol A. FIG.

10 is a diagram showing a print example of the contour data of FIG.

11 is a diagram showing a print example of data obtained by painting the contour data of FIG.

FIG. 12 is an explanatory diagram of a painting operation of a painting circuit.

[Explanation of symbols]

1 ... Processing device, 2 ... Output device, 3 ... Image memory, 4
... Fill circuit, 5 ... Bus, 9 ... Control circuit,
10 ... Latch circuit, 11 ... Paint circuit, 12 ... Read buffer circuit, 20, 21 ... Buffer circuit.

Claims (1)

[Claims] 1. A data processing device comprising a processing device for developing data given by a vector into a dot pattern, and an output device for displaying or printing data stored in a memory, wherein a contour represented by the dot pattern. When there is "0" data between the odd-numbered and even-numbered "1" data from one end on one line of data, the data converted into "1" is written in the contour data. A data processing device comprising a filling circuit.