JPH06214749A - Plotting controller - Google Patents

Abstract

PURPOSE:To provide a plotting controller which can operate a high speed plotting circuit for bit block transfer, character plotting and segment plotting without delay. CONSTITUTION:The plotting controller 3 provided with a CPU 1, a main storage 2 and a VRAM 4 is provided with a plotting control circuit 5, a plotting control circuit control register 6 which can automatically be initialized with hardware, an initial value register 7, a plotting processing status signal 8 and a register control circuit 9. Thus, the more comfortable operation environment of a window system can be provided by operating the high speed plotting circuit for bit block transfer, character plotting and segment plotting without delay.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing device, and more particularly to a drawing control device such as a personal computer or a workstation.

[0002]

2. Description of the Related Art Due to recent advances in semiconductor technology, the functions and performances of information processing devices such as personal computers and workstations have been significantly improved year by year. Factors for improving performance include speeding up of a central processing unit (Central Processing Unit, hereinafter abbreviated as CPU), increasing the capacity of memory and external storage means, and improving man-machine interface. Under such a background, one or more rectangular frames called windows are displayed on the screen of the display, and an application program is assigned to each of these windows to operate.
The so-called window system has come into practical use.
Such a window system is characterized by a full graphics drawing process that displays not only images and figures but also characters by graphics. It is known that the performance of the entire window system is greatly affected by the processing performance of the following drawing elements (drawing primitives).

(1) Bit block transfer (2) Character drawing (3) Line segment drawing Bit block transfer is a generalized process for transferring data in an area defined by a rectangle to another rectangular area. It is an important drawing primitive that accounts for 50% or more of the processing of the entire system. Character drawing occupies 20% to 30% of the processing in a general window system. Considering that an application program such as a word processor which mainly displays characters is executed, the importance of the processing performance can be easily understood. Line segment drawing generally accounts for 10% to 30% of the processing. It can be understood that this is also an important drawing primitive considering that the processing rate is further increased when a complicated drawing is displayed by an application program such as CAD (computer-aided design).

The improvement in the performance of the CPU and the increase in the capacity of the storage means have been described above, but these are merely the underlying technologies for bringing the window system closer to a practical base. That is, in the processes (1) to (3) described above, how to draw in the display memory (video random access memory, hereinafter abbreviated as VRAM) at high speed after finishing the preprocessing such as coordinate calculation to be drawn Is the point. In order to speed up the drawing process itself, it is necessary to equip the display system with a mechanism for speeding up drawing. For this reason, many means for high-speed drawing have been invented.

A conventional technique is disclosed in Japanese Patent Laid-Open No. 59-119.
There is a method in which pixel coordinates are specified and an address is calculated by hardware to perform bit block transfer, as in the technique disclosed in Japanese Patent No. 385.

[0006]

In the drawing control device using the above-mentioned conventional technique, various conditions are set in the register because the hardware performs address calculation and the like. Basically, as a condition that needs to be set, what color should be drawn, whether to overwrite the original picture at the transfer destination, or after the logical operation such as XOR of the original color and the color of the drawn data There is setting of an arithmetic expression when writing or performing a logical operation (these are collectively referred to as basic setting). Furthermore, for example, in order to draw an oblique line, it is sufficient to shift the horizontal line segments one by one and connect them.
The address of the starting point, the length of the line segment, the number of times the line segment is displayed, the error correction value of the line segment length, etc. are set. In addition, in the case of bit block transfer, in addition to the basic settings, it must be bit block transfer, the start point address in the transfer source rectangular area and its length,
Bit block transfer is performed by writing the number of times of repeating the transfer (indicating the vertical length of the rectangle) and the start point address of the transfer destination rectangular area to the register of the drawing device. When this operation is performed by software, the CPU needs to read data for each dot, perform a logical operation, and write the data. For this reason, compared with the case where the bit bullet transfer or the straight line drawing is performed only by the software, the conventional technique performs the address calculation by the hardware, so that the operation can be extremely speeded up. In addition to the above, there is a method of accelerating bit block transfer etc. by devising hardware, but it has a feature that the number of registers that need to be set increases as the hardware performs more complicated processing. Setting these registers for each drawing takes too long, so
It is generally known that an initial value is set in a register and only the register that needs to be changed is changed. In this method, it is necessary to rewrite the register to the initial value after performing processing such as bit block transfer. Therefore, the CPU rewrites the value in the wait register until the processing such as the bit block transfer is completed. As the number of registers increases, so does the number of registers that need to be rewritten. Further, although the time to write to the register depends on the speed of the bus, the speed of the bus is not currently high for the operation of the CPU. As a result, conventionally, there is a problem in that the initialization of the register value requires a process that is not directly related to the actual drawing process, which causes a decrease in speed.

[0007]

In order to solve the above problems, the present invention comprises a CPU, a VRAM section for storing data, a drawing control circuit for controlling the VRAM section, and the drawing control circuit control register. Another object of the present invention is to provide a drawing control device, which is an information processing device, including means for automatically initializing the drawing control circuit control register.

[0008]

The means for initializing the drawing control circuit control register monitors the signal output when the drawing control circuit completes the data transfer to the VRAM, and when the drawing is completed, sets the initial value of the drawing control circuit control register. Return to.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the drawing control device of the present invention will be described below with reference to FIGS.

FIG. 1 is a block diagram of the system of the first embodiment using the drawing control apparatus of the present invention. 1 is CPU, 2
Is a main memory device, 3 is a drawing control device of the present invention, and 4 is a VRA.
M, 5 are drawing circuits that perform address calculation and read / write to the VRAM, 6 is a register group that stores information for operating the drawing circuit 5, and 7 is an initial value that stores the initial values of the register group 6 A register, 8 is a signal indicating whether the drawing circuit 5 is operating, and 9 is a register group 6 based on the information of the signal 8.
The register control circuit 10 for controlling the value of 10 is a system bus. Next, how the drawing control device of the present invention operates will be described. First, the CPU 1 writes the initial value of the register group 6 into the initial value register 7 of the drawing control circuit 3.
At this time, the register control circuit 9 writes the same value as the value written in the initial value register 7 into the register group 6. The drawing control device 3 is thus initialized. Then CP
U1 reads the program from the main memory 2 through the bus 10 and determines what drawing is to be performed. After determining the drawing operation, the CPU 1 determines which register in the register group 6 needs to be rewritten. And bus 10
The changed value is written in the register of the register group 6 which needs to be changed. The drawing circuit 5 performs read / write on the VRAM 4 according to the value set in the register group 6 by the CPU 1. At this time, the signal 8 informs the register control circuit 9 that the drawing circuit 5 has started its operation. CPU in this state
When the status is read to the drawing control device 3, the register control circuit 9 returns a signal indicating that the drawing control device 3 is operating to the access of the CPU 1. When the operation of the drawing circuit 5 is completed, the signal 8 notifies the register control circuit 9 of the completion of drawing. The register control circuit 9 initializes the register group 6 based on the value of the initial value register 7. When the CPU reads the status to the drawing control device 3 in this state, the register control circuit 9 returns to the access of the CPU 1 that the drawing control device 3 is ready.

In this embodiment, the value of the initial value register 7 is initialized, but the initial value may be an externally connected ROM or a value specific to the drawing control device.

FIG. 2A is a time chart of the conventional example, and FIG. 2B is a time chart of the first embodiment. 11
Is the I / O write signal for register write,
12 is an I / for checking whether the drawing period has ended
O read signal, 13 is a status signal indicating whether or not during a drawing period, 14 is a RAS (row address strobe) signal indicating VRAM access, 20 is a register setting period for drawing, and 21 is a drawing control circuit which is actually VRAM or the like. Access period, 22 is a period during which the CPU is waiting for the end of drawing, 23 is a period during which the register setting value of the drawing control device is initialized, and 24 is a period during which the CPU is performing pre-processing calculation for the next drawing. , 25 is a period for setting the register for the next drawing. Next, the operation of the CPU in this time chart will be described.

(A) Conventional operation The CPU sets the register for drawing during the register setting period 20. When the register setting is completed, the drawing control device starts to operate and the status 13 is in operation. RA during this time
S14 frequently operates to read / write the VRAM4. While the drawing control device 3 is operating, the CPU repeats the I / O read 12 and waits until the status 13 indicates the end of drawing. When the status 13 indicates the end of drawing,
The CPU initializes the register value changed in the previous drawing 23
To start. After that, the pre-processing calculation 24 for the next drawing is performed, and the process proceeds to the setting 25 of the next drawing register.

(B) Operation of the Present Invention The CPU sets the register for drawing during the register setting period 20. When the register setting is completed, the drawing control device starts to operate and the status 13 is in operation. RA during this time
S14 frequently operates to read / write the VRAM4. While the drawing control device 3 is operating, the CPU performs the preprocessing 24 for the next drawing. When the status 13 indicates the end of drawing, the value of the register is instantly and automatically initialized in the present invention. Then, the CPU completes the pre-processing 24 for drawing, and starts the register setting 25 when the status 13 indicates the end of drawing. At this time, since the CPU does not need to remember the register initialization value, the pre-processing operation for the next drawing can be started earlier than before, and the initialization is not necessary, so that the register setting is required. The time is also greatly reduced.

[0015]

According to the present invention, in the window system, the hardware automatically performs the register setting, which was conventionally required by the software when the drawing control device was used, so that when the software program was created, There is an effect that the burden is reduced, redundant processing is omitted, and the drawing processing speed is increased. That is, it is possible to reduce the time required for window system-specific processing such as window movement, line drawing, and character scrolling in the window system, and to provide a comfortable operating environment to the user of the window system.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a first embodiment of the present invention.

FIG. 2 is a time chart showing the operation of the first exemplary embodiment of the present invention.

[Explanation of symbols]

1 ... CPU, 2 ... main memory device, 3 ... drawing control device, 4 ...
VRAM, 5 ... Drawing control circuit, 6 ... Drawing control circuit control register, 7 ... Initial value storage register, 8 ... Drawing control circuit 5
Of the register control circuit, 10 ... system bus, 11 ... register write I
/ O (aio) write signal, 12 ... I / O (aio) read signal for status read, 13 ... Status signal indicating whether or not during drawing period, 14 ... RAS (row address strobe) signal indicating VRAM access, 20
... Setting register for drawing, 21 ... V of drawing control circuit
RAM access period, 22 ... Draw operation end waiting period, 2
3 ... Register initialization period of drawing control device, 24 ... CPU
Next drawing pre-processing calculation period, 25 ... Next drawing register setting period.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Mariko Hara 292 Yoshida-cho, Totsuka-ku, Yokohama-shi Hitachi, Ltd. Microelectronics Device Development Laboratory

Claims (2)

[Claims] 1. An information processing apparatus comprising a CPU, a VRAM unit for storing data, a drawing control circuit for controlling the VRAM unit, and the drawing control circuit control register, wherein the drawing control circuit control register is provided. A drawing control device comprising means for automatically initializing. 2. An information processing device using the drawing control device according to claim 1.