JPH0548659A - Fsk signal receiver - Google Patents

Fsk signal receiver

Info

Publication number
JPH0548659A
JPH0548659A JP19938391A JP19938391A JPH0548659A JP H0548659 A JPH0548659 A JP H0548659A JP 19938391 A JP19938391 A JP 19938391A JP 19938391 A JP19938391 A JP 19938391A JP H0548659 A JPH0548659 A JP H0548659A
Authority
JP
Japan
Prior art keywords
frequency
signal receiver
fsk signal
local oscillator
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19938391A
Other languages
Japanese (ja)
Other versions
JP2743635B2 (en
Inventor
Michiyasu Katsumata
康易 勝又
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP3199383A priority Critical patent/JP2743635B2/en
Publication of JPH0548659A publication Critical patent/JPH0548659A/en
Application granted granted Critical
Publication of JP2743635B2 publication Critical patent/JP2743635B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To make a local oscillating frequency of a 2-channel direct conversion system FSK signal receiver coincident with a reception frequency automatically. CONSTITUTION:An output of limiter amplifiers 11, 12 of a 2-channel direct conversion system FSK signal receiver and a system clock 16 of a decoder 17 are used to detect a difference of a frequency of an automatic frequency control section 18 and the result is fed back to a local oscillator 3 to make the oscillating frequency of a local oscillator coincident with a reception frequency.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はページャ等のFSK信号
受信機を低消費電力化する2チャネルダイレクトコンバ
ージョン方式FSK信号受信機に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a two-channel direct conversion type FSK signal receiver for reducing the power consumption of an FSK signal receiver such as a pager.

【0002】[0002]

【従来の技術】ページャ等のFSK信号受信機の小型化
および低消費電力化をするために、2チャネルダイレク
トコンバージョン方式FSK信号受信機(direct
conversion receiver)が提案さ
れている。
2. Description of the Related Art In order to reduce the size and power consumption of an FSK signal receiver such as a pager, a two-channel direct conversion FSK signal receiver (direct) is used.
A conversion receiver) has been proposed.

【0003】従来例として、図3に2チャネルダイレク
トコンバージョン方式FSK信号受信機の1例を示す。
アンテナ1で受信した希望波fRFは高周波増幅器2によ
って増幅される。局部発振器3による局部発振波f
LOCAL は、受信周波数とほぼ同一であり、ミクサ5には
LOCAL と等しい位相で、ミクサ6には移相器4によっ
てπ/2変移させた位相で混合される。2チャネルのミ
クサ5,6による出力は、移相器4があるために受信波
の周波数偏移によって相対的な位相差π/2を生じる。
それぞれ後段に接続された高域通過型フィルタ7,8お
よび低域通過型フィルタ9,10で隣接チャネル成分と
ノイズ成分を除去しS/N比をあげ、リミッタアンプ1
1,12によって、充分な振幅を持つ矩形波となる。そ
れぞれch1,ch2とする。
As a conventional example, FIG. 3 shows an example of a 2-channel direct conversion type FSK signal receiver.
The desired wave f RF received by the antenna 1 is amplified by the high frequency amplifier 2. Local oscillation wave f generated by the local oscillator 3
LOCAL is almost the same as the reception frequency, and is mixed in the mixer 5 in a phase equal to f LOCAL and in the mixer 6 in a phase shifted by π / 2 by the phase shifter 4. The outputs from the two-channel mixers 5 and 6 generate a relative phase difference π / 2 due to the frequency shift of the received wave because of the phase shifter 4.
The high-pass filters 7 and 8 and the low-pass filters 9 and 10 respectively connected to the subsequent stages remove adjacent channel components and noise components to increase the S / N ratio, and the limiter amplifier 1
1 and 12 form a rectangular wave having a sufficient amplitude. Let ch1 and ch2 respectively.

【0004】この相対的な位相差π/2を利用して、識
別器13で送信データを復調する。識別器13は、簡単
なJK−FFやD−FF等で構成できる。識別器13の
出力は高周波のノイズ成分を含むため低域通過型フィル
タ14と比較器15で波形成形を行ない、デコーダ17
で復調データを出力する。デコーダ17はシステム・ク
ロック16で動作する。
Utilizing this relative phase difference π / 2, the discriminator 13 demodulates the transmission data. The discriminator 13 can be composed of a simple JK-FF or D-FF. Since the output of the discriminator 13 contains a high-frequency noise component, the low-pass filter 14 and the comparator 15 perform waveform shaping, and the decoder 17
Output demodulated data with. The decoder 17 operates on the system clock 16.

【0005】[0005]

【発明が解決しようとする課題】上述したように従来の
2チャネルダイレクトコンバージョン方式FSK信号受
信機では、高域通過型フィルタ7,8と低域通過型フィ
ルタ9,10の帯域によって局部発振器3の周波数オフ
セットが限定される。周波数オフセットを少なくするた
めには、局部発振器3に精度の高いクリスタルを使用す
る必要がある為、価格上昇につながる。またフィルタの
帯域を広げると受信感度が下がる傾向がある。
As described above, in the conventional 2-channel direct conversion type FSK signal receiver, the local oscillator 3 is controlled by the bands of the high pass filters 7 and 8 and the low pass filters 9 and 10. The frequency offset is limited. In order to reduce the frequency offset, it is necessary to use a highly accurate crystal for the local oscillator 3, which leads to an increase in price. Further, if the band of the filter is widened, the receiving sensitivity tends to decrease.

【0006】本発明はこのような課題を解決するもの
で、高精度のクリスタル等を使うことなく周波数オフセ
ットを少なくすることを目的とするものである。
The present invention solves such a problem, and an object thereof is to reduce the frequency offset without using a highly accurate crystal or the like.

【0007】[0007]

【課題を解決するための手段】本発明は上記課題を解決
するために2チャネルダイレクトコンバージョン方式F
SK信号受信機のリミッタアンプ出力と低周波基準発振
周波数を比較し、その差により局部発振器の発振を制御
して自動的に受信周波数とオフセットがない周波数を発
振させる。
In order to solve the above problems, the present invention provides a two-channel direct conversion system F
The output of the limiter amplifier of the SK signal receiver is compared with the low frequency reference oscillation frequency, and the oscillation of the local oscillator is controlled by the difference between them to automatically oscillate the reception frequency and the frequency having no offset.

【0008】[0008]

【作用】本発明は上記のような構成により次のような作
用を有する。すなわち局部発振器の発振周波数を自動的
に制御することによりフィルタ帯域を広げる必要が無い
ので感度を上げることが出来、また精度の高いクリスタ
ルを使用しないので価格減少につながる。
The present invention has the following actions due to the above-mentioned configuration. That is, since it is not necessary to widen the filter band by automatically controlling the oscillation frequency of the local oscillator, the sensitivity can be increased, and since a crystal with high precision is not used, the price can be reduced.

【0009】[0009]

【実施例】図1は本発明の一実施例の構成を示すもので
ある。図中1−17までは図3の各部と同一である。本
発明では自動周波数制御部18を付加することに特徴が
ある。自動周波数制御部18はリミッタアンプ11,1
2の出力とシステム・クロック16を分周した低周波出
力とを周波数比較する。この場合、2チャネルリミッタ
アンプ11,12の出力のEX−ORとシステム・クロ
ック16を分周した低周波出力とを周波数比較するとさ
らに良い。その周波数差を電圧に変換し、その電圧を局
部発振器3のバリキャップに加え、その容量を変化させ
ることによって、局部発振器3の発振周波数を制御す
る。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows the configuration of an embodiment of the present invention. 1 to 17 are the same as those in FIG. The present invention is characterized by adding the automatic frequency control unit 18. The automatic frequency control unit 18 includes limiter amplifiers 11 and 1
The frequency of the output of 2 is compared with the low frequency output obtained by dividing the system clock 16. In this case, it is better to compare the frequencies of the EX-OR of the outputs of the 2-channel limiter amplifiers 11 and 12 and the low frequency output obtained by dividing the system clock 16. The oscillation frequency of the local oscillator 3 is controlled by converting the frequency difference into a voltage, adding the voltage to the varicap of the local oscillator 3, and changing the capacitance thereof.

【0010】図2に自動周波数制御部18の詳細な構成
を示す。21はEX−OR部であり、識別器13からの
復調データ(NRZデータ)の下に、リミッタアンプ1
1とリミッタアンプ12の出力の排他的論理和を演算し
カウンタ部23へ出力する。22はタイミング・エッジ
出力部であり、比較器15の出力タイミングでシステム
・クロック16の出力を分周してデータレートと等しい
タイミング信号(時間t)のエッジを作りだす。23
は、カウンタ部であり、時間tの間のリミッタアンプ出
力のエッジの個数を数える。24はラッチ部であり、カ
ウンタ部23で数えたデータをラッチする。ラッチされ
たデータ(個数N)は、f=N/tとなり、電圧制御部
25によって周波数差を検知し、周波数オフセットを電
圧オフセットに変換して出力し、この電圧オフセットで
局部発振器3のバリキャップの容量を変化させる。バリ
キャップの容量が変化することによって、局部発振器3
の周波数は受信周波数とのオフセットが無くなる方向に
変化し、受信周波数と一致した周波数で安定する。安定
したデータは、メモリ19に記憶されるため、受信周波
数がオフセットしない限り、収束値はほとんど変化しな
い。
FIG. 2 shows a detailed configuration of the automatic frequency control section 18. Reference numeral 21 denotes an EX-OR unit, which is provided below the demodulated data (NRZ data) from the discriminator 13 and is provided with the limiter amplifier 1
The exclusive OR of 1 and the output of the limiter amplifier 12 is calculated and output to the counter unit 23. A timing edge output unit 22 divides the output of the system clock 16 at the output timing of the comparator 15 to create an edge of a timing signal (time t) equal to the data rate. 23
Is a counter unit, which counts the number of edges of the limiter amplifier output during the time t. A latch unit 24 latches the data counted by the counter unit 23. The latched data (number N) becomes f = N / t, the frequency difference is detected by the voltage control unit 25, the frequency offset is converted into a voltage offset, and the voltage offset is output. Change the capacity of. By changing the capacitance of the varicap, the local oscillator 3
The frequency of changes in the direction in which the offset from the reception frequency disappears and stabilizes at the frequency that matches the reception frequency. Since the stable data is stored in the memory 19, the convergence value hardly changes unless the reception frequency is offset.

【0011】[0011]

【発明の効果】本発明は、上記実施例より明らかなよう
にフィルタの帯域を広げることなく、また局部発振器に
精度の高いクリスタルを使うことなく受信周波数とのオ
フセットをなくし、高感度の受信機を実現することが出
来る。
As is apparent from the above-described embodiment, the present invention eliminates the offset from the reception frequency without widening the band of the filter and without using a crystal with high precision in the local oscillator, and has a high sensitivity. Can be realized.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例における2チャネルダイレクト
コンバージョン方式FSK信号受信機の構成を示すブロ
ック図
FIG. 1 is a block diagram showing a configuration of a 2-channel direct conversion FSK signal receiver according to an embodiment of the present invention.

【図2】実施例における自動周波数制御器部の構成を示
すブロック図
FIG. 2 is a block diagram showing a configuration of an automatic frequency controller unit in the embodiment.

【図3】従来の2チャネルダイレクトコンバージョン方
式FSK信号受信機の構成を示すブロック図
FIG. 3 is a block diagram showing the configuration of a conventional 2-channel direct conversion FSK signal receiver.

【符号の説明】[Explanation of symbols]

1 アンテナ 2 高周波増幅器 3 局部発振器 4 移相器 5,6 ミクサ 7,8 高域通過型フィルタ 9,10 低域通過型フィルタ 11,12 リミッタアンプ 13 識別器 14 低域通過型フィルタ 15 比較器 16 システム・クロック 17 デコーダ 18 自動周波数制御器 19 メモリ 21 EX−ORブロック 22 タイミングエッジ出力部 23 カウンタ 24 ラッチ部 25 電圧制御部 1 Antenna 2 High Frequency Amplifier 3 Local Oscillator 4 Phase Shifter 5,6 Mixer 7,8 High Pass Filter 9,10 Low Pass Filter 11,12 Limiter Amplifier 13 Discriminator 14 Low Pass Filter 15 Comparator 16 System clock 17 Decoder 18 Automatic frequency controller 19 Memory 21 EX-OR block 22 Timing edge output section 23 Counter 24 Latch section 25 Voltage control section

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】受信信号を2分割し、各々を相対的な位相
差を有する局部発振波と混合する混合手段と、混合手段
の出力の相対的な位相差を利用して受信信号を復調する
復調手段と、混合手段の出力と復調手段のシステム・ク
ロックとの周波数差をもとに局部発振器の発振周波数を
制御する制御手段とを有するFSK信号受信装置。
1. A receiving signal is demodulated by dividing a received signal into two and mixing each with a local oscillation wave having a relative phase difference and a relative phase difference between outputs of the mixing means. An FSK signal receiving apparatus having demodulation means and control means for controlling the oscillation frequency of a local oscillator based on the frequency difference between the output of the mixing means and the system clock of the demodulation means.
JP3199383A 1991-08-08 1991-08-08 Signal receiver Expired - Fee Related JP2743635B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3199383A JP2743635B2 (en) 1991-08-08 1991-08-08 Signal receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3199383A JP2743635B2 (en) 1991-08-08 1991-08-08 Signal receiver

Publications (2)

Publication Number Publication Date
JPH0548659A true JPH0548659A (en) 1993-02-26
JP2743635B2 JP2743635B2 (en) 1998-04-22

Family

ID=16406859

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3199383A Expired - Fee Related JP2743635B2 (en) 1991-08-08 1991-08-08 Signal receiver

Country Status (1)

Country Link
JP (1) JP2743635B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100419427B1 (en) * 1996-06-24 2004-05-31 삼성전자주식회사 Method for adjusting frequency of voltage control oscillator in wireless communication system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5922468A (en) * 1982-07-02 1984-02-04 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン Digital data demodulator
JPS6330049A (en) * 1986-07-23 1988-02-08 Hitachi Ltd Msk demodulation circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5922468A (en) * 1982-07-02 1984-02-04 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン Digital data demodulator
JPS6330049A (en) * 1986-07-23 1988-02-08 Hitachi Ltd Msk demodulation circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100419427B1 (en) * 1996-06-24 2004-05-31 삼성전자주식회사 Method for adjusting frequency of voltage control oscillator in wireless communication system

Also Published As

Publication number Publication date
JP2743635B2 (en) 1998-04-22

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