JPS63211915A - Frequency converting circuit - Google Patents

Abstract

PURPOSE:To eliminate the need for a filter eliminating a sum frequency by using a D flip-flop in place of a conventional frequency converter. CONSTITUTION:A signal to be converted of a frequency f2 is inputted a data terminal D of a D flip-flop 8 and a clock terminal CK of the said flip-flop and a local oscillation signal of a frequency f1 satisfying the relation of f1/2<f2<2f1 is inputted to the other terminal, and a signal having a frequency fX being a difference between the frequencies f1 and f2 is outputted from an output terminal Q of the said flip-flop. For example, a local oscillator 4 consists of an oscillation circuit 41 having a crystal vibrator X'tal of 3.3792MHz and a frequency divider 42 frequency-dividing its output into 1/16 and the frequency- division output of f1=211.2KHz is inputted to the terminal CK of the D flip-flop D-FF8. Since the D-FF 8 outputs the frequency fX being a difference between the frequencies f1 and f2, a difference frequency fH'=14.4KHz is outputted with respect to a frequency fH of the f2 and a difference frequency fL'=9.6KHz is outputted with respect to a frequency fL of the f2. Since the frequency of the sum of the both is not generated in this way, a filter eliminating the sum frequency is not required.

Description

[Detailed description of the invention] [Summary] By digitally converting the frequency using a D-type flip-flop (D-FF), only the frequency of the difference between two signals is output, which was indispensable in the past. Eliminates the need for a filter for sum frequency removal.

[Industrial application field]

The present invention relates to a frequency conversion circuit that digitally processes waveforms using D-FFs.

[Conventional technology]

In the superheterodyne receiver, as shown in FIG. 3, a signal f2 received by a receiving antenna 1 and amplified by a radio frequency (RF) amplifier is mixed with an output f+ of a local oscillator 4 by a frequency converter 3.

Since this frequency converter 3 generally uses a bipolar or field effect transistor, the frequency f of the difference between both signals is
Not only 2-f+ (the sum frequency f2+[1 also occurs. This sum frequency [2+ f+ is removed by filter 5,
Only the difference frequency f2 f+ is input to the detection circuit 6.

[Problem that the invention seeks to solve]

The disadvantage of the conventional device described above is that the frequency converter 3 simultaneously generates the sum frequency f 2 + f +, so a filter 5 to remove it is essential, which results in a complicated circuit configuration and requires adjustment. and the temperature characteristic h”J
It is in the point of receiving l.

The present invention eliminates the need for a filter for removing the sum frequency by using a circuit configuration that generates only the frequency of the difference between two signals.

[Means for solving problems]

FIG. 1 is a basic configuration diagram of the present invention, in which the configuration between the RF amplifier 2 and the detection circuit 6 is replaced by a local oscillator 4, a waveform shaping circuit 7, and a D-type flip-flop (D-FF) 8.

That is, the filter 5 of FIG. 3 is not provided, and the frequency converter 3 is replaced by the D-FF 8. The waveform shaping circuit 7 is for converting the output (analog waveform) of the RF amplifier 2 into a pulse waveform, and the output of the local oscillator 4 also has a pulse waveform.

The output of the waveform shaping circuit 7 (frequency fz) is input to the data terminal of the D-FF8, and the output of the local oscillator 4 (frequency f+) is input to the clock terminal CK of the D-FF8. Alternatively, the output of the local oscillator 4 (frequency f+
), and the output (frequency f2) of the waveform shaping circuit 7 is input to the clock terminal CK. When there is a relationship between these two signals, an output having a frequency fx that is the difference between f+ and fl is obtained from the output terminal Q of the D-FF8.

[Effect]

If the periods of f+ and fl are TI and T2, respectively, 'r+ and TI are obtained. Here, if f+, fl satisfy the relationship (11), the period Tx of the output frequency fx is 'l'x=nT
+ = (n±1) T 2 −・−・−(2) However, n is represented by an integer.

The above-mentioned equation (1) can be divided into two parts centered around I. One is.In this case, equation (2) is T" x = n T +
...”(41T x = (n −1)
T 2 ...... (51) These (41 (TI is found from formula 51. At this time, the frequency fx appearing at the output terminal Q is TX TIT2 TI T2 = r summer - fl
・・・・・・(7)

On the other hand, in the division f + < C2 < 2 f + --(8), the frequency fx appearing at the output terminal Q is T x =
nT+
=(9)Tx=(rL+L)T2
・”-QO). Therefore, (9) (10
From equation 1, TIT2 T2 Tl = f 2 - f + ...02
becomes.

FIG. 2(a) shows rl that satisfies equation (8), and FIG. 2(C) shows fl that satisfies equation (3). and,
fd) represents rx in equation (6) obtained as the difference f2-f+ between fl and f+ in (al (b)), and (e) represents (b)
) in (C), and fx in equation (7) obtained as the difference f I - f 2 between fl is shown. In addition, the D-FF of this example
8 is a type that takes in the level of the data terminal at the rising edge of the clock terminal CK.

〔Example〕

FIG. 4 is a configuration diagram showing an embodiment of the present invention.

Local oscillation ra4 is 3.3792M) (oscillation circuit 41 using z crystal oscillator X'tal and its output 1/1
It consists of a frequency divider 42 that divides the frequency into 6, and the divided output rl-
Input 211.2K Hz to terminal CK of D-FF8.

The waveform shaping circuit 7 is realized using a comparator. The detection circuit 6 includes a shift register 61 and an exclusive OR gate 6
2. It is a digital delay detection type consisting of a filter 63.

Here, a guided radio band data receiver is used as an example. Therefore, one narrowing frequency f2 is, for example, fH=225.6K
Hz, r L = 220.8 KHz, and MSK modulation is performed at a transmission rate of 9600 bps. Comparator 7 converts the output of RF amplifier 2 to TTL level.

D-FF8 is the frequency fx (r in this example) of the difference between f+ and f2.
2 f+), so for fH of f2, a difference frequency f H' = 14.4K Hz is output, and f
For fL of 2, a difference frequency fL'=9.6 KHz is output.

Output waveforms (1) to (4) from the D-FF 8 to the filter 63 are shown in FIG. The signal ■ indicates data 0 at fL' and data 1 at fH'. The shift register 61 receives this signal ■
is delayed by 1 pip] time (1/9600 sec). When the gate 62 performs an exclusive OR operation on the delayed signal ■ obtained at this time and the original signal ■, a digital delayed detection output ◎ is obtained, and when this is smoothed by the filter 63, the original data ■ is reproduced.

〔Effect of the invention〕

As described above, according to the present invention, in the frequency conversion process for determining the frequency of the difference between two signals, the sum frequency of the two signals is not generated, so a filter that removes the sum frequency is not used as in the conventional filter. There are advantages.

[Brief explanation of the drawing]

Figure 1 is a basic configuration diagram of the present invention, Figure 2 is an operational waveform diagram of Figure 1, Figure 3 is a configuration diagram of a conventional superhetero gain type receiver, and Figure 4 shows an embodiment of the present invention. The configuration diagram, FIG. 5, is an operating waveform diagram of FIG. 4.

Claims (1)

[Claims] Data terminal (D) of D-type flip-flop (8)
, and a converted signal of frequency f_2 is input to one of the clock terminals (CK) of the flip-flop, and a local oscillation signal of frequency f_1 satisfying the relationship f_1/2<f_2<2f_1 is input to the other,
A frequency conversion circuit characterized in that the output terminal (Q) of the flip-flop outputs a signal having a frequency f_x that is the difference between f and f_2.