JPH0546093B2 - - Google Patents

Info

Publication number
JPH0546093B2
JPH0546093B2 JP58100619A JP10061983A JPH0546093B2 JP H0546093 B2 JPH0546093 B2 JP H0546093B2 JP 58100619 A JP58100619 A JP 58100619A JP 10061983 A JP10061983 A JP 10061983A JP H0546093 B2 JPH0546093 B2 JP H0546093B2
Authority
JP
Japan
Prior art keywords
gas
plasma
frequency power
high frequency
amorphous semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58100619A
Other languages
Japanese (ja)
Other versions
JPS59225517A (en
Inventor
Kenji Maekawa
Yukihisa Takeuchi
Masaaki Mori
Toshiaki Nishizawa
Yasuhide Okamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
NipponDenso Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NipponDenso Co Ltd filed Critical NipponDenso Co Ltd
Priority to JP58100619A priority Critical patent/JPS59225517A/en
Publication of JPS59225517A publication Critical patent/JPS59225517A/en
Publication of JPH0546093B2 publication Critical patent/JPH0546093B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02529Silicon carbide
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02579P-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)

Description

【発明の詳細な説明】 この発明は、グロー放電を伴なう非晶質半導体
の製造手段に係るもので、特に複数の原料ガスか
ら2成分以上の非晶質半導体を製造する装置に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a means for manufacturing an amorphous semiconductor that involves glow discharge, and in particular to an apparatus for manufacturing an amorphous semiconductor of two or more components from a plurality of raw material gases. be.

従来より、非晶質半導体を製造するために、プ
ラズマCVDが使用されている。しかし、a−
SiC:Hのように2成分以上の組成を有する非晶
質半導体を製造する場合、特に大面積膜となつた
時には、位置による組成比、膜厚(成長速度)の
不均一がみられる。
Conventionally, plasma CVD has been used to manufacture amorphous semiconductors. However, a-
When manufacturing an amorphous semiconductor having a composition of two or more components such as SiC:H, especially when a large area film is produced, non-uniformity in composition ratio and film thickness (growth rate) depending on position is observed.

この発明は上記のような点に鑑みなされたもの
で、例えば大面積膜のような場合でも、全体的に
組成比、膜厚等を均一に設定し、その膜質も充分
なものとすることができるようにする特に2成分
以上の組成を有する非晶質半導体の製造方法を提
供しようとするものである。
This invention was made in view of the above points, and it is possible to set the overall composition ratio, film thickness, etc. uniform even in the case of a large-area film, and to ensure that the film quality is sufficient. In particular, it is an object of the present invention to provide a method for manufacturing an amorphous semiconductor having a composition of two or more components.

すなわち、この発明はCH4ガスとSiH4ガスを
プラズマ分解し、基板上に非晶質半導体を堆積す
る方法であつて、 上記基板の設定される真空チヤンバ内において
上記基板を挟んで設定された第1のプラズマ分解
手段の高周波電力を、上記堆積させる非晶質半導
体の膜質劣化を防止すべく低く設定し、 上記CH4ガスとSiH4ガスのうち比較的分解エ
ネルギーの大きいCH4ガスを、上記第1のプラズ
マ分解手段の高周波電力より高い高周波電力を有
する第2のプラズマ分解手段によつて予めプラズ
マ分解して、このCH4ガスをラジカル状態とし、 このラジカル状態とされた上記CH4ガスと上記
SiH4ガスとを上記第1のプラズマ分解手段の設
定された上記真空チヤンバ内へ導入し、これら導
入された混合ガスを上記第1のプラズマ分解手段
にて同時にプラズマ分解するようにしたことを特
徴とする非晶質半導体の製造方法をその要旨とす
るものである。
That is, the present invention is a method of plasma decomposing CH 4 gas and SiH 4 gas to deposit an amorphous semiconductor on a substrate, the method being a method of depositing an amorphous semiconductor on a substrate, the method being a method of depositing an amorphous semiconductor on a substrate, the method being a method of depositing an amorphous semiconductor on a substrate with the substrate sandwiched therebetween in a vacuum chamber in which the substrate is set. The high frequency power of the first plasma decomposition means is set low in order to prevent deterioration of the film quality of the amorphous semiconductor to be deposited. Plasma decomposition is performed in advance by a second plasma decomposition means having a high frequency power higher than the high frequency power of the first plasma decomposition means to convert the CH 4 gas into a radical state, and the CH 4 gas brought into this radical state is and above
SiH 4 gas is introduced into the vacuum chamber in which the first plasma decomposition means is set, and the introduced mixed gas is simultaneously plasma decomposed by the first plasma decomposition means. The gist of this paper is a method for manufacturing an amorphous semiconductor.

以下図面を参照してこの発明の一実施例を説明
する。第1図はその構成を示すもので、高真空状
態のチヤンバ11を備える。このチヤンバ11内
には平行に相対向するようにして平板電極12,
13が設けられている。そして、上側に位置する
平板電極12には、チヤンバ11の上側に開口す
るガス導入口14が設けられ、この導入口14に
は強化耐熱ガラスで構成されるガス導入管15が
設けられているもので、この導入管15の外側に
は高周波誘導コイル16が巻装されている。この
誘導コイル16には、高周波電源17から高周波
電力を供給し、導入管15を介してチヤンバ11
内に導入されるガスを、予めプラズマ分解する。
ここで、この平板電極12には、導入されたガス
をチヤンバ11内に放出するために、全体に均一
にして多数の細孔が形成されている。
An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows its configuration, which includes a chamber 11 in a high vacuum state. Inside this chamber 11, flat plate electrodes 12 are arranged parallel to each other and facing each other.
13 are provided. The flat electrode 12 located on the upper side is provided with a gas introduction port 14 that opens above the chamber 11, and this introduction port 14 is provided with a gas introduction pipe 15 made of reinforced heat-resistant glass. A high frequency induction coil 16 is wound around the outside of this introduction tube 15. High-frequency power is supplied to the induction coil 16 from a high-frequency power source 17, and the induction coil 16 is supplied with high-frequency power to the chamber 11 through the introduction pipe 15.
The gas introduced into the chamber is subjected to plasma decomposition in advance.
Here, in order to release the introduced gas into the chamber 11, a large number of pores are uniformly formed throughout the flat electrode 12.

また、下方の平板電極13はチヤンバ11を介
して接地されているもので、この平板電極13上
に半導体基板18が設定され、下部には基板18
を加熱するヒータ19を設ける。そして、平板電
極12と13に高周波電源20から高周波電力を
供給する。
Further, the lower flat plate electrode 13 is grounded via the chamber 11, and a semiconductor substrate 18 is set on this flat plate electrode 13.
A heater 19 is provided to heat the. Then, high frequency power is supplied to the flat plate electrodes 12 and 13 from a high frequency power source 20.

上記チヤンバ11には、さらに平板電極12お
よび13の間に、母材ガスを導入する導入口21
が形成され、またチヤンバ11内のガスを排出す
る排出口22が設けられている。
The chamber 11 further includes an inlet 21 for introducing base material gas between the flat electrodes 12 and 13.
is formed, and an outlet 22 for discharging the gas inside the chamber 11 is provided.

このように構成される装置において、例えばP
型a−SiC:H非晶質半導体を作成する場合につ
いて以下説明する。まずチヤンバ11は予め1×
10-5Torr以下に真空引きしておく。そして、基
板18の温度が250℃に安定したところで、比較
的分解エネルギーの大きいArベース10%のCH4
ガスを、流量16SCCM(Standard Cubic
Centimenter per minutes:1分当りの標準状態
における流量)、同じくArベース300ppmのB2H6
ガスを流量10SCCMでガス導入管15から導入口
14を介してチヤンバ11内に導入する。また、
母材ガスとなる比較的分解エネルギーの小さい
ArベースSiH4ガスを流量30SCCMでガス導入口
21から導入する。この時、高周波電源17から
誘導コイル16に高周波電力を供給し、ガス導入
管15内に高周波プラズマを発生させ、CH4
B2H6の混合ガスを高周波分解し、CHoラジカル
(n=0〜4)を作る。この場合、誘導コイル1
6に対する高周波電力は30Wである。そして、さ
らに相対向する平行な平板電極12,13間に、
高周波電源20から10Wの高周波電力を供給し、
ガス導入口21から導入されたSiH4と、上記プ
ラズマ分解された平板電極12の細孔を介して導
入されるCH4とB2H6の混合ガスを、同時に高周
波分解しP型a−SiC:Hを作成して基板18上
に堆積する。
In a device configured in this way, for example, P
The case of creating a type a-SiC:H amorphous semiconductor will be described below. First, chamber 11 is 1x in advance.
Evacuate to below 10 -5 Torr. Then, when the temperature of the substrate 18 stabilized at 250°C, Ar-based 10% CH4 , which has a relatively large decomposition energy,
Gas, flow rate 16SCCM (Standard Cubic
Centimeter per minute: flow rate under standard conditions per minute), also based on Ar, 300 ppm B 2 H 6
Gas is introduced into the chamber 11 from the gas introduction pipe 15 through the introduction port 14 at a flow rate of 10 SCCM. Also,
Relatively low decomposition energy as base material gas
Ar-based SiH 4 gas is introduced from the gas inlet 21 at a flow rate of 30 SCCM. At this time, high-frequency power is supplied from the high-frequency power supply 17 to the induction coil 16 to generate high-frequency plasma in the gas introduction pipe 15, and to generate CH 4 and
A mixed gas of B 2 H 6 is subjected to high frequency decomposition to produce CH o radicals (n=0 to 4). In this case, induction coil 1
The high frequency power for 6 is 30W. Further, between the parallel plate electrodes 12 and 13 facing each other,
Supplies 10W of high frequency power from high frequency power supply 20,
SiH 4 introduced from the gas inlet 21 and a mixed gas of CH 4 and B 2 H 6 introduced through the pores of the plasma-decomposed flat plate electrode 12 are simultaneously high-frequency decomposed to form P-type a-SiC. :H is created and deposited on the substrate 18.

このようにして作成された非晶質半導体P型a
−SiC:Hは、従来のCH4とB2H6の混合ガスをプ
ラズマ分解しないものに比較して、光導電率の値
が5〜10倍大きくなるものであり、例えばa−
Si:HのFin型大陽電池のP層として非常に有用
なものとすることができる。
The amorphous semiconductor P type a created in this way
-SiC:H has a photoconductivity value that is 5 to 10 times larger than that of a conventional mixed gas of CH 4 and B 2 H 6 that does not undergo plasma decomposition; for example, a-
It can be made very useful as the P layer of a Si:H Fin-type solar cell.

上記実施例ではCH4およびB2H6ガスを高周波
誘導コイル16によつてプラズマ分解するように
したが、第2図に示すようにチヤンバ11内に平
行電極23および24を設置し、この電極部に高
周波電源17から高周波電力を供給し、ガス導入
口14から導入されるCH4およびB2H6の混合ガ
スを予めプラズマ分解するようにしてもよい。
In the above embodiment, CH 4 and B 2 H 6 gases were subjected to plasma decomposition using the high frequency induction coil 16, but parallel electrodes 23 and 24 were installed in the chamber 11 as shown in FIG. The mixed gas of CH 4 and B 2 H 6 introduced from the gas inlet 14 may be plasma decomposed in advance by supplying high frequency power from the high frequency power source 17 to the gas inlet 14 .

その他、第3図に示すようにガス導入管15の
外周に、間隔を設定して2本の銅帯25a,25
bを巻き付け、この銅帯25a,25b間に高周
波電力源17から高周波電力を供給するようにし
ても同様に実施し得る。
In addition, as shown in FIG.
The same effect can be achieved by winding the copper bands 25a and 25b and supplying high frequency power from the high frequency power source 17 between the copper bands 25a and 25b.

第2図および第3図において、第1図と同一構
成部分は同一符号を付しその説明を省略する。
In FIGS. 2 and 3, the same components as those in FIG. 1 are designated by the same reference numerals, and the explanation thereof will be omitted.

以上のようにこの発明によれば、基板の設定さ
れたチヤンバ内の第1プラズマ分解手段の高周波
電力を、例えば10W程度と低く認定するようにし
ているため、全面に対して組成比、膜厚等の均質
な非晶質半導体を作成し得るものであり、特に光
導電率特性の良好な非晶質半導体を製造すること
のできるようになるものである。なお、プラズマ
分解手段の高周波電力を低くしたことにより比較
的分解エネルギーが大きいため分解が困難となつ
たCH4ガスは、予め第2のプラズマ分解手段によ
つてラジカル状態とされているため、低い電力の
上記第1のプラズマ分解手段によりSiH4ガスと
共にプラズマ分解することが可能となるものであ
る。
As described above, according to the present invention, the high frequency power of the first plasma decomposition means in the chamber where the substrate is set is certified as low, for example, about 10W, so that the composition ratio and film thickness are It is possible to produce a homogeneous amorphous semiconductor such as the above, and in particular, it becomes possible to produce an amorphous semiconductor with good photoconductivity characteristics. Note that by lowering the high-frequency power of the plasma decomposition means, CH 4 gas, which has a relatively large decomposition energy and is difficult to decompose, has been made into a radical state by the second plasma decomposition means in advance, so it has a low The first plasma decomposition means using electric power enables plasma decomposition together with SiH 4 gas.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例に係る製造装置を
説明する構成図、第2図および第3図はそれぞれ
この発明の他の実施例を説明する図である。 11……チヤンバ、12,13……平板電極、
14,21……ガス導入口、15……ガス導入
管、16……高周波誘導コイル、17,20……
高周波電源、18……半導体基板、20……ヒー
タ。
FIG. 1 is a block diagram illustrating a manufacturing apparatus according to one embodiment of the invention, and FIGS. 2 and 3 are diagrams illustrating other embodiments of the invention, respectively. 11... Chamber, 12, 13... Flat electrode,
14, 21... Gas inlet, 15... Gas inlet pipe, 16... High frequency induction coil, 17, 20...
High frequency power supply, 18... semiconductor substrate, 20... heater.

Claims (1)

【特許請求の範囲】 1 CH4ガスとSiH4ガスをプラズマ分解し、基
板上に非晶質半導体を堆積する方法であつて、 上記基板の設定される真空チヤンバ内において
上記基板を挟んで設定された第1のプラズマ分解
手段の高周波電力を、上記堆積させる非晶質半導
体の膜質劣化を防止すべく低く設定し、 上記CH4ガスとSiH4ガスのうち比較的分解エ
ネルギーの大きいCH4ガスを、上記第1のプラズ
マ分解手段の高周波電力より高い高周波電力を有
する第2のプラズマ分解手段によつて予めプラズ
マ分解して、このCH4ガスをラジカル状態とし、 このラジカル状態とされた上記CH4ガスと上記
SiH4ガスとを上記第1のプラズマ分解手段の設
定された上記真空チヤンバ内へ導入し、これら導
入された混合ガスを上記第1のプラズマ分解手段
にて同時にプラズマ分解するようにしたことを特
徴とする非晶質半導体の製造方法。
[Claims] 1. A method for depositing an amorphous semiconductor on a substrate by plasma decomposing CH 4 gas and SiH 4 gas, the method being set with the substrate sandwiched within a vacuum chamber in which the substrate is set. The high frequency power of the first plasma decomposition means is set low to prevent deterioration of the film quality of the amorphous semiconductor to be deposited, and the CH 4 gas, which has a relatively higher decomposition energy between the CH 4 gas and the SiH 4 gas , is used. is plasma decomposed in advance by a second plasma decomposition means having a high frequency power higher than the high frequency power of the first plasma decomposition means to convert the CH 4 gas into a radical state, and the CH 4 gas in the radical state is 4 gas and above
SiH 4 gas is introduced into the vacuum chamber in which the first plasma decomposition means is set, and the introduced mixed gas is simultaneously plasma decomposed by the first plasma decomposition means. A method for manufacturing an amorphous semiconductor.
JP58100619A 1983-06-06 1983-06-06 Apparatus for manufacture of amorphous semiconductor Granted JPS59225517A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58100619A JPS59225517A (en) 1983-06-06 1983-06-06 Apparatus for manufacture of amorphous semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58100619A JPS59225517A (en) 1983-06-06 1983-06-06 Apparatus for manufacture of amorphous semiconductor

Publications (2)

Publication Number Publication Date
JPS59225517A JPS59225517A (en) 1984-12-18
JPH0546093B2 true JPH0546093B2 (en) 1993-07-13

Family

ID=14278852

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58100619A Granted JPS59225517A (en) 1983-06-06 1983-06-06 Apparatus for manufacture of amorphous semiconductor

Country Status (1)

Country Link
JP (1) JPS59225517A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61267315A (en) * 1985-05-22 1986-11-26 Anelva Corp Plasma cvd device
JPS6321821A (en) * 1986-07-15 1988-01-29 Sanyo Electric Co Ltd Method and apparatus for manufacture semiconductor

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5362982A (en) * 1976-11-17 1978-06-05 Toshiba Corp Plasma cvd apparatus
JPS57167631A (en) * 1981-03-13 1982-10-15 Fujitsu Ltd Plasma vapor-phase growing method

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5362982A (en) * 1976-11-17 1978-06-05 Toshiba Corp Plasma cvd apparatus
JPS57167631A (en) * 1981-03-13 1982-10-15 Fujitsu Ltd Plasma vapor-phase growing method

Also Published As

Publication number Publication date
JPS59225517A (en) 1984-12-18

Similar Documents

Publication Publication Date Title
EP0026604A1 (en) A method of vapour phase growth and apparatus therefor
EP0478984A1 (en) Plasma enhanced chemical vapor processing system using hollow cathode effect
AU594107B2 (en) Method for preparation of multi-layer structure film
US4292343A (en) Method of manufacturing semiconductor bodies composed of amorphous silicon
JPS63197329A (en) Method and apparatus for applying amorphous silicon hydride to substrate in plasma chamber
JP2001523038A (en) Annealing method of amorphous film using microwave energy
JPH0546093B2 (en)
JP3259452B2 (en) Electrode used for plasma CVD apparatus and plasma CVD apparatus
JP3084395B2 (en) Semiconductor thin film deposition method
JPH03139824A (en) Depositing method for semiconductor device
JPS5941773B2 (en) Vapor phase growth method and apparatus
JP2608456B2 (en) Thin film forming equipment
JPH02200784A (en) Cvd electrode
JPH0891987A (en) Apparatus for plasma chemical vapor deposition
JPS62159419A (en) Apparatus for forming amorphous semiconductor thin film
JPH03214724A (en) Thin-film manufacturing method
JPH0645258A (en) Manufacture of amorphous semiconductor thin film
JPS63234513A (en) Deposition film formation
JPH07273041A (en) Formation of semiconductor thin film
JPH01730A (en) Method of forming multilayer thin film
JPS61283113A (en) Epitaxial growth method
JPS62119918A (en) Device for plasma chemical vapor deposition
JPH08143394A (en) Plasma chemical vapor deposition device
JPS6189626A (en) Formation of deposited film
JPS62188782A (en) Method and apparatus for producing thin compound film by using plural electric fields