JPH0542200B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a digital color decoder that is applied to convert an analog composite color video signal into a digital signal and obtain component signals through digital signal processing. .

"Background Art and Its Problems" An example of a digital color decoder is shown in FIG. In Figure 1, NTSC is connected to the input terminal indicated by 1.
A/D composite color video signal is supplied to the A/D
Converter 2 digitizes this composite color video signal. As an example, the sampling frequency is 13.5MHz, and one sample is 8 bits.
A digital color video signal formed by the A/D converter 2 is supplied to a synthesis circuit 3 and a color signal separation filter 4. The color signals separated by the color signal separation filter 4 are supplied to the synthesis circuit 3,
The Y (luminance) signal is subtracted from the digital color video signal and taken out at the output of the synthesis circuit 3.

The color signals are supplied to multipliers 5 and 6. 7
indicates a subcarrier signal source for color demodulation, and the subcarrier from the subcarrier signal source 7 is sent to the multiplier 5.
The subcarrier which has been phase-shifted by 90 degrees by the phase shifter 8 is supplied to the multiplier 6. The demodulated outputs of these multipliers 5 and 6 are sent to the low pass filters 9 and 1.
By passing 0 respectively, unnecessary signal components are removed. This demodulated output is U (RY signal component)
signal and V (BY signal component) signal. Also,
When I and Q signals are obtained at the outputs of low-pass filters 9 and 10 depending on the phase of the subcarrier for demodulation, these I and Q signals are supplied to the matrix circuit 11, so that the U signal, A V signal is formed.

The signal processing of the digital color decoder described above will be explained in detail. First, the input analog NTSC signal is E _N = E _I cos (ω _c t + 33°) + E _Q sin (ω _c t + 33°) +
E _y
......, and by sampling E _N (nT) = E _I (nT) cos (ω _c nT + 33° + φ) + E _Q (nT) sin (ω _c nT + 33° + φ) + E _Y ...... Here, φ As shown in Figure 2A and Figure 2B, when the falling edge of the horizontal synchronizing signal HD is taken as the starting point of the horizontal period, the first sample point of the sampling point (Figure 2D) within this horizontal period is The phase for the subcarrier (Figure 2C) is shown. Note that the subcarrier has zero phase at the starting point of this horizontal period. In FIG. 2A, S _B indicates a burst signal. Furthermore, T is the sampling period, E _I is the I signal,
E _Q indicates the Q signal, and ω _c indicates the angular velocity of the subcarrier.

The I-axis and Q-axis are the coordinates rotated by 33 degrees from the U-axis and V-axis as shown in Figure 3, (U = E _B - E _Y /2.03, V = E _R -E _Y /1.14). Then, E _I EQ=−sin33゜ cos33゜ cos33゜ sin33゜U V ...... Therefore, substituting this into the formula and rearranging it, we get E _N (nT) = U (nT) sin (ω _c nT + φ ) +V(nT) cos(ω _c nT+φ)+E _Y (nT) ... Then, the filter 4 removes E _Y (luminance signal), leaving only E _c (carrier color signal).

E _c (nT) = U (nT) sin (ω _c nT + φ) + V (nT) cos (ω _c nT + φ) ... The subcarrier signal source 7 generates a single sine wave of the subcarrier frequency with the same phase as that during encoding. do.

E _RSA (nT) = 2sin (ω _c nT + φ) ... E _RSB (nT) = 2cos (ω _c nT + φ) ... appears at the output of phase shifter 8. In the multipliers 5 and 6, the carrier color signal E _c (nT) from the filter 4 is multiplied by the subcarrier signal of Equation and Equation.

E _RSA (nT) × E _c (nT) = 2U (nT) sin ² (ω _c nT + φ) +2V (nT) sin (ω _c nT + φ)・cos (ω _c nT +
φ) = {U (nT)} + {−U (nT) cos (2ω _c t + 2φ) + V (nT) sin (2ω _c t + 2φ)} ... E _RSB (nT) × E _c (nT) = 2U (nT) )・cos(ω _c nT+φ)・sin(ω _c nT+
φ) +2V(nT)cos ² (ω _c nT+φ) = {V(nT)}+{U(nT) sin(2ω _c nT+2φ) +V(nT) cos(2ω _c nT+2φ)} ... Equation and the number of equations The frequency component of the second term 2ω _c is
removed by low-pass filters 9 and 10,
U(nT) and V(nT) are obtained.

Further, the I signal and Q signal are supplied from the low pass filters 9 and 10 to the matrix circuit 11,
When generating the U and V signals, the subcarrier signal source 7 generates a single sine wave with a subcarrier frequency of the following equation.

E' _RSA (nT) = 2sin (ω _c nT + φ) ... E' _RSB (nT) = 2cos (ω _c nT + φ) ... appears at the output of phase shifter 8. In the multipliers 5 and 6, the carrier color signal E _c (nT) from the filter 4 is multiplied by the subcarrier signal of Equation and Equation.

E′ _RSA (nT)×E _c (nT) = 2E _I (nT) cos(ω _c nT+33°+φ)・sin(ω _c nT+
33゜＋φ) +2E _Q (nT) sin ² (ω _c nT＋33゜＋φ) = {E _Q (nT)} + {E _I (nT) sin (2ω _c nT＋66゜＋2φ
) −E _Q (nT) cos (2ω _c T+66°+2φ)} …… E′ _RSB (nT)×E _c (nT) =2E _I (nT) cos ² (ω _c nT+33°+φ) +2E _Q (nT) sin(ω _c nT+33°+φ)・cos(ω _c nT
+66°+2φ) = {E _I (nT)}+{E _I (nT)cos(2ω _c nT+66°+2φ
) +E _Q (nT) sin (2ω _c nT + 66° + 2φ)} ... The formula and the second terms of each of the formulas are removed by low-pass filters 9 and 10, and E _Q (nT) and E _I
(nT) is obtained. And matrix circuit 11
Accordingly, the coordinate transformation calculation of UV=-sin33° cos33° cos33° sin33° E _I E _Q . . . is performed, and a U signal and a V signal are obtained.

In the above color decoder, the phase of the subcarrier (C in FIG. 2) of the input color video signal and the sampling phase (D in FIG. 2) are fixed in a relationship in which there is a phase difference φ by control A to the A/D converter 2. death,
Control B for the subcarrier signal source 7 generates a subcarrier signal of and or and. Control A is specifically realized by the configuration shown in FIG.

In FIG. 4, reference numeral 21 indicates a clock generation circuit, and the output of this clock generation circuit 21 is supplied to the A/D converter 2 via a variable phase shift circuit 22.
A burst signal being output from the A/D converter 2 is extracted by a burst extraction circuit 23 and supplied to a phase detection circuit 24. The phase shift amount of the variable phase shift circuit 22 is controlled by the detection output of the phase detection circuit 24, so that the phase of the subcarrier signal from the subcarrier signal source 7 and the sampling phase in the A/D converter 2 become the same. In other words, both had the same sampling phase φ.

Control B allows various sampling phases φ
If it is possible to generate a subcarrier signal having a phase corresponding to , control A can be made unnecessary or the burden of control A can be reduced. However, to achieve this, a table method using memory is used, so if you try to increase accuracy by reducing the step of phase change,
There was a problem that led to an increase in memory capacity. Therefore, a subcarrier signal having a predetermined sampling phase φ is generated from the subcarrier signal source 7,
It has been common practice to control the sampling phase using control A as described above.

The conventional digital color encoder mentioned above is
A problem arises in order to control the sampling phase in the A/D converter 2 using the variable phase shift circuit 22 configured as an analog circuit. First, the configuration of the variable phase shift circuit 22 is complicated, making it difficult to perform stable and highly accurate phase shift control. This precludes the realization of a highly accurate and stable device by digitizing the color decoder. Also, the digital color video signal is not composite, but (Y,
I,Q) components,
Since there is no subcarrier, there is no need to control the sampling phase. Therefore, it was necessary to separate A/D converters into those for composites and those for components.

OBJECT OF THE INVENTION The object of the present invention is to provide a digital color decoder that does not require sampling phase control in an A/D converter.

Another object of the present invention is to provide a digital color decoder that does not require a large capacity memory, unlike a structure in which demodulating subcarriers having various phases are formed.

"Summary of the Invention" This invention fixes the sampling phase in an A/D converter and the phase of a subcarrier for demodulation to predetermined values, transforms the coordinates of two demodulated outputs, and demodulates them on a regular detection axis. It is designed to generate two color difference signals that are substantially the same as those shown in FIG.

This invention digitally demodulates a carrier color signal using subcarrier signals whose phases differ by 90 degrees from each other.
a demodulation circuit that generates first and second demodulated outputs;
A circuit that detects the phase shift of the detection axis of the demodulation circuit with respect to the normal detection axis from the first and second demodulation outputs, a circuit that generates coefficients for coordinate transformation from the detected phase shift, and a circuit that generates coefficients for coordinate transformation from the detected phase shift. This digital color decoder includes an arithmetic circuit that coordinates transforms the first and second demodulated outputs.

Embodiment FIG. 5 shows the configuration of an embodiment of the present invention.
In FIG. 5, an input terminal indicated at 12 is supplied with a carrier color signal separated by a filter from the digital composite color video signal. The sampling clock for A/D conversion for forming this digital composite color video signal does not have the sampling phase controlled as in the conventional art.

The carrier color signal is supplied to multipliers 5 and 6, and the respective outputs of these multipliers 5 and 6 are supplied to low-pass filters 9 and 10, and demodulated outputs are supplied to the respective outputs.
Ex and Ey are obtained. The multipliers 5 and 6 are supplied with subcarriers for demodulation generated by a carrier signal source 7 and a phase shifter 8. The phase of this subcarrier for demodulation is fixed to a predetermined phase, and in most cases, the detection axis for demodulation has a phase shift from the normal detection axis.

The demodulated outputs E _x and E _y are supplied to a matrix circuit 13 and a burst extraction circuit 16 for coordinate transformation. The output of this burst extraction circuit 16 is supplied to a phase shift detection circuit 17. This phase shift detection circuit 17 detects the phase shift (θ-φ) of the burst signal. In other words, the burst signal has a phase that matches the -U axis as shown by E _B in FIG. 6, but the demodulation axis is (θ-φ) as shown by the broken line in FIG. If there is a deviation, demodulated outputs E _x and E _y of the burst signal will be generated in accordance with this deviation. Therefore, the phase shift detection circuit 17 detects the phase shift (θ-φ) based on θ-φ=tan ⁻¹ E _y /E _x .

This detected phase shift is supplied to the coefficient generation circuit 18, and the coefficients generated by the coefficient generation circuit 18 are supplied to the matrix circuit 13. A RY signal and a BY signal are obtained at output terminals 14 and 15 of the matrix circuit 13, respectively.

In one embodiment of the invention described above, the carrier signal source 7 and phase shifter 8 generate a subcarrier signal of the following formula.

E″ _RSA (nT) = 2sin (ω _c nT + θ) … E″ _RSB (nT) = 2cos (ω _c nT + θ) … The outputs of multipliers 5 and 6 have E″ _RSA (nT) × E _c (nT ) = {U(nT)cos(θ-φ)+V(nT)sin(θ-
φ)} +{−U(nT)cos(2ω _c nT+θ−φ) +V(nT)sin(2ω _c nT+θ−φ)} …… E″ _RSB (nT)×E _c (nT) = {−U( nT) sin(θ−φ)+V(nT)cos(θ
−φ)} +{U(nT) sin(2ω _c nT+θ−φ) +V(nT) cos(2ω _c nT+θ−φ)} ... Here, φ is the first sample point of the horizontal period, as described above. This is the subcarrier phase at . θ is the phase at the first sample point in the horizontal period of the subcarrier for demodulation. The outputs of low-pass filters 9 and 10 are E _x (nT) = {U (nT) cos (θ - φ) + V (nT) sin
(θ−φ)} ……E _y (nT)={−U(nT)sin(θ−φ)+V(nT)cos
(θ−φ)} ... If (θ−φ)=0, that is, there is no phase shift,
The U signal and V signal themselves are obtained. When expressions and expressions are expressed as a matrix expression, it becomes as follows.

E _x (nT) E _y (nT) = cos (θ−φ) sin (θ−φ) −sin (θ−φ) cos (θ−φ) U (nT) V (nT) …… The formula is reversed. Using matrices, U(nT) V(nT)=cos(θ−φ)−sin(θ−φ) sin(θ−φ) cos(θ−φ)E _x (nT) E _y (nT) …… becomes. By the coordinate transformation shown in this equation, U
signal and V signal are obtained. Matrix circuit 13
is for calculating this equation and has the configuration shown in FIG.

In FIG. 7, multipliers 31 and 32 multiply the signal _Ex by a coefficient cos(θ-φ), and multiply the signal _Ex by a coefficient sin(θ-φ), and the multiplier 33
and 34, the signal E _y is multiplied by the coefficient -sin (θ-φ), and the signal E _y is multiplied by the coefficient cos (θ-φ). The outputs of multipliers 31 and 33 are sent to adder 3
5, and the U signal is taken out at the output terminal 14 of this adder 35. The outputs of the multipliers 32 and 34 are supplied to an adder 36, and the V signal is taken out at the output terminal 15 of the adder 36.

Further, the coefficient generation circuit 18 is constituted by ROMs 37 and 38, as shown in FIG. These ROMs 37 and 38 have a phase shift (θ-φ)
is supplied as the address, cos(θ−φ) and
sin(θ−φ data is generated.(θ
-φ) has an accuracy of 0.5° step, for example, and the ROMs 37 and 38 each have a capacity of 720 words.

Furthermore, the I signal E _I and the Q signal E _Q may be obtained from the signals E _x and E _y by coordinate transformation.
From the above equations and expressions, E _I E _Q = −sin33゜cos33゜ cos33゜sin33゜cos (θ−φ)−sin(θ−φ) sin(θ−φ) cos(θ−φ)E _x E _y ...〓〓 becomes.

"Application Example" The present invention can also be applied to a color decoder for PAL color video signals.

"Effects of the Invention" According to the present invention, it is no longer necessary to control the sampling phase in the A/D converter using an analog variable phase shift circuit, and the precision of the decoder is reduced due to this variable phase shift circuit. This can prevent unstable operation. This invention makes it possible to share an A/D converter for composites and components. Furthermore, according to the present invention, compared to generating two types of continuous wave demodulating subcarriers with an arbitrary phase difference of 90 degrees, it is easier to use small-capacity memory and its peripheral circuits. Therefore, there is an advantage that decoding can be performed.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a digital color decoder to which the present invention can be applied, and FIG.
FIG. 2D is a waveform diagram used to explain the sampling phase of the composite color video signal, FIG. 3 is a vector diagram of the carrier color signal, FIG. 4 is a block diagram for controlling the sampling phase of the A/D converter, and FIG. FIG. 5 is a block diagram of an embodiment of this invention, FIG. 6 is a vector diagram used to explain the operation of an embodiment of this invention, and FIG.
8 and 8 are block diagrams showing the construction of a part of an embodiment of the present invention. 5, 6... Multiplier for demodulation, 7... Carrier signal source, 13... Matrix circuit, 17... Phase shift detection circuit, 18... Coefficient generation circuit.

Claims (1)

[Scope of Claims] 1. A digital color decoder that separates a digital composite color video signal into a luminance signal and a carrier color signal and generates two color difference signals from the carrier color signal, the carrier color signals having a phase difference of 90 degrees with respect to each other.゜A demodulation circuit that performs digital demodulation using different subcarrier signals and generates first and second demodulated outputs, and detects a phase shift of a detection axis of the demodulation circuit with respect to a normal detection axis from the first and second demodulation outputs. a phase shift detection circuit that generates a coefficient for coordinate transformation from the detected phase shift; and an arithmetic circuit that coordinates transforms the first and second demodulated outputs using the coefficient, A digital color decoder that obtains two color difference signals from the arithmetic circuit.