JPH0541835A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To attain high sensitivity and a high SIN processing by mixing signal charges by adjacent n-picture elements and transferring the result in the horizontal direction in a 1st horizontal transfer section while the transfer of the signal charge to other horizontal transfer section is inhibited. CONSTITUTION:When the high SIN operating mode is set by an operating mode setting circuit 15, a share transfer gate 10 is always kept in the closing state with a horizontal driver 14 so that the signal charge from a 1st horizontal transfer section 4 to a 2nd horizontal transfer section 5 is not transferred. Thus, two adjacent picture elements of signal charges are mixed in the 1st horizontal transfer section 4 by unbalancing horizontal transfer clocks ...H1, ...H2. Then the horizontal transfer is implemented and an output signal VO1 is led from an output amplifier 8. On the other hand, since no signal charge is in existence in the 2nd horizontal transfer section 5, no output signal is led out of an output amplifier 9. Since output signals twice those in the usual mode are led out of the output amplifier 8, the light receiving cell area is equivalently increased to increase the signal quantity.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device,
In particular, the present invention relates to a solid-state imaging device including a plurality of horizontal transfer units.

[0002]

2. Description of the Related Art In a solid-state image pickup device, for example, an image pickup device using a CCD solid-state image pickup device, a so-called on-chip in which a microlens is arranged for each pixel has been conventionally used as a technique for realizing high sensitivity and high S / N. Equivalent increase of aperture ratio by microlens High efficiency of charge detector CDS
Techniques such as (correlated double sampling method) for reducing noise by an external circuit are known.

[0003]

However, even if any of the above-mentioned techniques is used, there is no limit to the demand for high S / N ratio, and it is not sufficient at present, and particularly low. There is also a demand for higher sensitivity at the time of illuminance.

By the way, in recent years, a CCD solid-state image pickup device having a plurality of (eg, two) horizontal transfer portions has been put to practical use in order to relax the pattern rule of the horizontal transfer portion in the CCD solid-state image pickup device and reduce the operating frequency. Is being studied (see, for example, Japanese Patent Laid-Open No. 63-17577).

Therefore, it is an object of the present invention to provide a solid-state image pickup device having a structure having a plurality of horizontal transfer sections, which can realize high sensitivity and high S / N.

[0006]

In order to achieve the above object, a solid-state image pickup device according to the present invention is provided with a light receiving section for converting incident light into pixel-by-pixel signal charge and storing the same, and a vertical row from the light receiving section. A vertical transfer unit for vertically transferring the signal charges read out to a plurality of (n) horizontal transfer units for respectively transferring the signal charges transferred from the vertical transfer unit in the horizontal direction;
Of these horizontal transfer units, a transfer gate that selectively transfers a part of the signal charges transferred to the first horizontal transfer unit on the vertical transfer unit side to another horizontal transfer unit, and another transfer gate from the first horizontal transfer unit to the other horizontal transfer unit. Drive for driving the transfer gate and the first horizontal transfer unit so as to mix the signal charges of adjacent n pixels in the first horizontal transfer unit and horizontally transfer them while inhibiting the transfer of the signal charge to the horizontal transfer unit of And means.

[0007]

In the solid-state image pickup device according to the present invention, the signal charges of adjacent n pixels are mixed in the first horizontal transfer unit while inhibiting the transfer of the signal charges from the first horizontal transfer unit to the other horizontal transfer unit. Then, by horizontally transferring, the area of the light receiving cell is equivalently increased and the signal amount is increased, so that high sensitivity and high S / N can be achieved.

[0008]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, a plurality of photosensors 1 which are two-dimensionally arrayed in pixel units to form a light receiving unit for converting incident light into signal charges in pixel units and accumulating, and read from these photosensors 1 in each vertical column An image pickup area 3 is constituted by a vertical CCD (vertical transfer unit) 2 that vertically transfers the generated signal charges. The vertical CCD 2 is responsible for an operation corresponding to vertical scanning, and the vertical transfer clocks φV1 to
4 phase drive by φV4.

On the output side of the vertical CCD 2, the vertical CCD 2
For example, two first and second horizontal CCDs (horizontal transfer units) 4 and 5 for respectively transferring the signal charges transferred from the horizontal direction are arranged in parallel. These horizontal CCDs 4 and 5 are responsible for operations equivalent to horizontal scanning, and the horizontal transfer clock φ
Two-phase drive is performed by H1 and φH2. Horizontal CCD 4,5
Floating diffusion amplifiers 6 and 7 for detecting the transferred signal charges and converting the signal charges into voltage signals are provided on the respective output sides. The voltage signals converted by these floating diffusion amplifiers 6 and 7 are output to the outside as output signals VO1 and VO2 via output amplifiers 8 and 9.

A distribution transfer gate 1 is arranged between the first and second horizontal CCDs 4 and 5 to distribute the signal charges transferred from the vertical CCD 2 to both horizontal CCDs 4 and 5 every other vertical column.
0 is allocated. That is, as is apparent from FIG. 2, the signal charge transferred from the vertical CCD 2 to the first horizontal CCD 4 is sent to the second horizontal CCD 5 through the channel region 11 controlled by the distribution transfer gate 10. Is becoming The distribution transfer gate 10 is opened / closed by a gate pulse φHHG. Channel region 11
A channel stop 12 is formed on both sides of the channel stop 12 to prevent charge transfer from the corresponding first horizontal CCD 4 to the second horizontal CCD 5.

Referring again to FIG. 1, from the timing generator 13, vertical transfer clocks φV1 to φV4 for driving the vertical CCD 2 in four phases, first and second horizontal CCDs 4 and 5 are provided.
Transfer clocks φH1 and φH2 for driving the two-phases and gate pulse φHH for driving the distribution transfer gate 10 to open and close.
Various timing signals such as G are generated. Of the various timing signals generated, the horizontal transfer clock φH1,
The φH2 and the gate pulse φHHG are applied to the first and second horizontal CCDs 4 and 5 and the distribution transfer gate 10 via the horizontal driver 14.

The operation mode setting circuit 15 has one of two operation modes, a high S / N operation mode (first operation mode) and a normal operation mode (second operation mode), which will be described later, regarding horizontal transfer of signal charges. It is for selectively setting one of them, and has a configuration in which any one of the operation modes can be set by switching a switch or the like. This setting mode information is supplied to the timing generator 13. The timing generator 13 controls the application timing of the horizontal transfer clocks φH1 and φH2 and the gate pulse φHHG to the first and second horizontal CCDs 4 and 5 and the distribution transfer gate 10 according to the setting mode information.

The operation of horizontal transfer of signal charges will be described below. First, the transfer operation when the normal operation mode is set by the operation mode setting circuit 15 will be described with reference to FIG. Horizontally adjacent signal charges SC
Both 1 and SC2 are the first horizontal CCD4 rather than the vertical CCD2.
(A). At this time, the distribution transfer gate 10
Is closed. In this state, the signal charges SC1 and SC
The horizontal transfer clocks φH1 and φH2 applied to the gate electrodes of the first horizontal CCD 4 corresponding to 2 are at the same level, and the signal charges SC1 and SC2 are not mixed in the first horizontal CCD 4.

At the next operation timing, the distribution transfer gate 10 is driven to open, so that the signal charge S
Of C1 and SC2, the signal charge SC2 is the channel region 1
1 is transferred to the second horizontal CCD 5 while the signal charge SC1 is blocked from being transferred to the second horizontal CCD 5 by the channel stop 12, so that the first horizontal CCD 5 is transferred.
Stay within 4 (b).

By the above operation, the distribution of the signal charges SC1 and SC2 to the first horizontal CCD 4 and the second horizontal CCD 5 is completed. After this distribution is completed, both horizontal CCDs
Horizontal transfer of the signal charges SC1 and SC2 is performed at 4 and 5 (c), and these signal charges SC1 and SC2 are derived as output signals VO1 and VO2 from the output amplifiers 8 and 9, respectively.

Next, in the operation mode setting circuit 15, a high S /
Transfer operation when N operation mode is set
Will be described with reference to. In this operation mode, the distribution transfer gate 10 is always kept closed by the horizontal driver 14 so that the signal charges are not transferred from the first horizontal CCD 4 to the second horizontal CCD 5. ..

Both the signal charges SC1 and SC2 are vertical CCDs.
2 is transferred to the first horizontal CCD 4, of which the signal charge SC1 is transferred to the second horizontal C by the channel stop 12.
Since the transfer to CD5 is blocked, it remains in the first horizontal CCD 4, and the signal charge SC2 is not transferred to the second horizontal CCD 5 because the distribution transfer gate 10 is in the closed state. Then, it remains in the first horizontal CCD 4 (a).

Next, as shown in the timing chart of FIG. 4, the first horizontal C corresponding to the signal charges SC1 and SC2.
Horizontal transfer clock φH applied to the gate electrode of CD4
By breaking the balance of 1 and φH2, the first horizontal C
The signal charges SC1 and SC2 are mixed in CD4 (b).
Thereafter, horizontal transfer is performed in the first horizontal CCD 4 (c), and the signal charges SC1 + SC2 are transferred to the output amplifier 8
From the output signal VO1.

In this horizontal transfer operation, the first horizontal C
The signal charge transferred by the CD4 is only the signal charge SC1 in the normal operation mode, whereas it is the signal charge SC1 + SC2 by mixing two pixels in the high S / N operation mode. Therefore, the output corresponding to the first horizontal CCD 4 is output. From the amplifier 8, it is possible to derive an output signal twice as high as that in the normal operation mode. On the other hand, since there is no signal charge in the second horizontal CCD 5, no output signal is derived from the output amplifier 9 corresponding to the second horizontal CCD 5.

Here, the case of the normal operation mode and the high S / N ratio
The S / N in the operation mode will be compared. First, in the normal operation mode, as shown in FIG.
Outputs VO1 and VO2 corresponding to the horizontal CCDs 4 and 5
After passing through the S / H (or CDS) circuits 16 and 17, they are simply added by an adder 18 and derived as an image signal. This is an excellent synthesis method in terms of S / N.

Now, assuming that the signal voltage of the outputs VO1 and VO2 after sampling and holding is S and the noise voltage is N,
The signal voltage after synthesis is 2S. On the other hand, with respect to noise, the noise component generated in the output amplifiers 8 and 9 is dominant, and there is no correlation between the noises of the outputs VO1 and VO2, so that it is 2 ^1/2 N after combination. Therefore, as S / N,

## EQU1 ## (S / N) ₁ = 20 log (2 ^1/2 S / N) (1)

On the other hand, in the high S / N operation mode, as shown in FIG.
As shown in (B), by separating the VO2 system from which the output signal is not derived from the main line signal system, the noise component in the output amplifier 9 is predominant.
No noise from the O2 system is added. The signal voltage of the output VO1 after sample-hold is 2S because it is twice as high as that in the normal operation mode, while the noise voltage remains N. Therefore, as S / N,

(2) (S / N) ₂ = 20log (2S / N) (2)

That is, as is clear from the above equations (1) and (2), according to the high S / N operation mode, the S / N is 3 dB (20 log) as compared with the case of the normal operation mode.
2 ^1/2 ) can be improved. Also, this high S /
In the N operation mode, since pixel signals in the horizontal direction are combined,
Although the horizontal resolution is sacrificed as compared with the normal operation mode, high sensitivity and high S / N can be achieved, which is an effective means for improving the sensitivity and S / N especially in low illuminance.

Therefore, when the CCD solid-state image pickup device is applied to a camera, the normal operation mode is usually set, and when it is desired to give priority to the sensitivity even when the horizontal resolution is sacrificed at low illuminance, a high S / It may be used so as to set the N operation mode.

In the above embodiment, the case has been described in which the two operation modes, the normal operation mode and the high S / N operation mode, can be switched. However, high sensitivity and high S / N ratio have been described.
When considering only the N-type, it is needless to say that the solid-state imaging device having only the high S / N operation mode may be used.

[0026]

As described above, according to the present invention,
In a solid-state imaging device including a plurality (n) of horizontal transfer units, the first horizontal transfer unit is prohibited while prohibiting transfer of signal charges from the first horizontal transfer unit on the vertical transfer unit side to other horizontal transfer units. Since the signal charges for the adjacent n pixels are mixed and horizontally transferred, the light receiving cell area is equivalently increased and the signal amount is increased, so that high sensitivity and high S / N can be achieved. There is.

Further, by making it possible to selectively set the two operation modes of the high S / N operation mode and the normal operation mode, it is possible to improve the sensitivity even if the horizontal resolution is sacrificed, especially in the case of low illuminance. And high S / N, high S
It can be used to set the / N operation mode.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an embodiment of the present invention.

FIG. 2 is a plan view of a horizontal transfer unit.

FIG. 3 is an operation explanatory diagram in a high S / N operation mode.

FIG. 4 is a timing chart in a high S / N operation mode.

FIG. 5 is a block diagram showing a configuration of a signal processing system in a normal operation mode (A) and a high S / N operation mode (B).

[Explanation of symbols]

 1 Photosensor 2 Vertical CCD 4 First Horizontal CCD 5 Second Horizontal CCD 8, 9 Output Amplifier 10 Distribution Transfer Gate 11 Channel Area 13 Timing Generator 14 Horizontal Driver 15 Operation Mode Setting Circuit

Claims (2)

[Claims] 1. A light receiving unit for converting incident light into pixel-by-pixel signal charges and storing the signal charges, a vertical transfer unit for vertically transferring the signal charges read from the light receiving unit for each vertical column, and the vertical transfer unit. The plurality of (n) horizontal transfer units that transfer the signal charges transferred from the transfer units in the horizontal direction, and the first horizontal transfer unit on the vertical transfer unit side of the plurality of horizontal transfer units are transferred. A transfer gate for selectively transferring a part of the signal charges to another horizontal transfer unit; and a first horizontal line while inhibiting transfer of the signal charges from the first horizontal transfer unit to the other horizontal transfer unit. A solid-state imaging device comprising: the transfer gate and a driving unit that drives the first horizontal transfer unit to mix and horizontally transfer the signal charges of n adjacent pixels in the transfer unit. 2. The drive means inhibits transfer of signal charges from the first horizontal transfer unit to the other horizontal transfer unit while inhibiting signal charges of n pixels adjacent to each other in the first horizontal transfer unit. And a second operation mode in which signal charges are horizontally transferred in pixel units in each of the plurality of horizontal transfer units while selectively performing the transfer operation of the transfer gate. The solid-state imaging device according to claim 1, wherein