JPH0541340A - Semiconductor device - Google Patents

Abstract

PURPOSE:To decide an erroneous work due to an error of a process name of a product name in photolithography processes easily and reliably and to detect the erroneous work in its early stages. CONSTITUTION:A process name identification pattern 5 consisting of a rectangular form is provided within a semiconductor chip 1, a first process name identification pattern 5A in a first photolithography process and a second process name identification pattern 5B in a second photolithography process, which is continued to the first photolithography process, adjoins each other and process name identification patterns to correspond to photolithography processes are provided in order.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device which enables automation of process identification in a photolithography process.

[0002]

2. Description of the Related Art A photolithography process in a conventional method of manufacturing a semiconductor device will be described with reference to the drawings.

FIG. 5 is a plan view of an example of an identification numerical pattern applied to a conventional photolithography process of a semiconductor device.

In a conventional semiconductor device, as shown in FIG. 5, a product name identifying numerical pattern 8 and a process name identifying numerical pattern 9 are formed on a semiconductor chip 1 for each photolithography process simultaneously with the formation of semiconductor elements. By observing the identification numerical patterns 8 and 9 with an optical microscope and checking whether or not they are the same as the designated product name and process name, it is determined whether or not there is an erroneous operation in the photolithography process. is doing.

[0005]

The problems in this conventional semiconductor device will be described below.

First, if the product name identifying numerical pattern 8 and the process name identifying numerical pattern 9 are formed at different positions in the semiconductor chip 1 for each photolithography process, the occupied area in the semiconductor chip 1 becomes large. Therefore, normally, the process name identifying numerical pattern 9 is formed at the same position as the process name identifying numerical pattern formed in the previous process, and also in order to prevent shape defects and dust due to the overlapping of the patterns. The product name identification numerical pattern 8 is formed only in the first photolithography process. Therefore, the numerical pattern 9 for identifying the process name has a problem that a plurality of numerical patterns are stacked and formed, so that it is difficult to perform the identification by automation, and that the identification also requires a skill for a person using an optical microscope. .. Further, the numerical pattern 8 for product identification also has a problem that the contour becomes unclear each time the etching process or the film forming process is performed as a post-process, and it is difficult to perform microscopic observation and identification by automation.

Secondly, in the case of the gate array product and the standard cell product, as shown in FIG. 5, the chip size is the same, the pattern of the external element region 3 is common, and only the pattern of the internal element region 2 is different. Multiple products may be manufactured simultaneously. From the viewpoint of improving the efficiency of circuit pattern design, it is efficient to arrange the product name identification numerical value pattern 8 and the process name identification numerical value pattern 9 at the same position in the chip. Therefore, in addition to erroneous work in which the photomask in the photolithography process is mistaken in the same product, when the chip size is the same, there is a possibility of erroneous work in which a photomask of another product in the same process is applied. By observing only the region 3 and the numerical pattern 9 for identifying the process name, it is not possible to detect the presence or absence of erroneous work, and therefore it is necessary to observe the internal element region 2. As a result, there has been a problem that a special product requires special microscopic observation, which causes a reduction in work efficiency in the manufacturing process line.

An object of the present invention is to provide a semiconductor device which can be easily identified by microscopic observation and automation, has no erroneous work, and has high work efficiency in a manufacturing process line.

[0009]

According to the present invention, in a semiconductor device having a process name identification pattern, the process name identification pattern has a rectangular shape, and the first process name identification pattern in the first photolithography process and the A process name identification pattern corresponding to the photolithography process is sequentially provided adjacent to the second process name identification pattern in the second photolithography process that is continuous with the first photolithography process.

[0010]

Embodiments of the present invention will now be described with reference to the drawings.

1A and 1B are plan views illustrating a first embodiment of the present invention, and FIG. 1A is a plan view of a semiconductor chip.
(B) is a partial enlarged plan view of the process name identification pattern provided at the corner of the external element region of (a).

In the embodiment of FIG. 1, as shown in FIGS. 1A and 1B, one process name identification pattern 5 has a short side of 2 μm,
It is composed of a group of rectangles 5A, 5B, 5C, ... Each having a long side of 10 μm, and one long side is formed adjacent to each photolithography process. That is, in the first product,
In the first step, the process name identification pattern 5A is formed,
Further, in the next step, the step name identification pattern 5B is formed adjacent to the step name identification pattern 5A, and in the next step, the step name identification pattern 5C is formed adjacent to the step name identification pattern 5B. In this case, if the coordinates of the intersection of the diagonals of the process name identification pattern 5A in the first product are (X _A , Y _A ), the process name identification pattern 5B will have the coordinates (X _A +2 μm, Y
_A ), the process name identification pattern 5C has coordinates (X _A +4 μ
m, Y _A ) respectively. Furthermore, process name identification pattern 5, in the second product, process name identification pattern 5A1 is _{(X A, Y A + 6μm} ) , the process name identification pattern 5B1 is _{(X A + 2μm, Y A} + 6μm) , a step The name identification pattern 5C1 is (X _A +4 μm, Y _A +6 μ
m).

FIG. 2 is a plan view of an example of a process name identification pattern when an error occurs in applying a photomask having only different process names in the photolithography process.

Therefore, as shown in FIG. 2, in the photolithography process, when an error occurs in applying a photomask having only different process names, the process name identification pattern 5C.
Since 5D and 5D are not formed at adjacent positions, an erroneous operation can be detected easily and reliably.

In addition, He-
The number and continuity of the rectangles 5A, 5B, 5C, ... Are detected by scanning the line shown in the laser beam scanning 6 with the Ne laser beam and detecting the intensity waveform of the diffraction and scattered light. Corresponding to the number of photolithography steps that have been broken down, erroneous work identification in the photolithography step can be automated.

FIG. 3 is a plan view of an example of a process name identification pattern when an error occurs between products having the same chip size.

Further, as shown in FIG. 3, in the case of erroneous work detection between products having the same chip size, the process identification patterns 5A1, 5B1, 5C1 and the process name identification pattern 5D1 are not formed consecutively. It can be detected easily and surely. In this case, if the spot light of the laser is applied to a circle having a diameter of 2 μm, the area occupied by the process name identification pattern 5 between products is 64 μm in length × 40 μm in width.

FIG. 4 is a plan view of a process name identification pattern according to the second embodiment of the present invention.

In the second embodiment, as shown in FIG. 4, the first embodiment
Compared with the embodiment described above, the position of the process name identification pattern 5 is laterally displaced by 1 μm, and the area occupied by the process name identification pattern 5 in the semiconductor chip can be reduced. In this case, even if there is no vertical shift, it is possible to discriminate between the two types depending on whether or not the length measured by scanning with the laser beam is an integral multiple of the short side of 2 μm. Therefore, in comparison with the first embodiment, by applying the shift of 1 μm in the X direction in the second embodiment, it is possible to discriminate between the two types without increasing the occupied area. Therefore,
In the case of 10 types and 20 photography processes, the occupation area of the process name identification pattern 5 in the semiconductor chip is 34 in length.
μm × horizontal 42 μm, which is about 1/2 of that of the first embodiment
Can be reduced to

[0020]

As described above, according to the present invention, a rectangular process name identification pattern formed adjacently is used as a pattern for identifying a product and a process in a photolithography process without using a numerical pattern. Depending on the position of the identification pattern, the identification between products is detected in the vertical direction, and the identification of the process sequence is detected in the horizontal direction. Therefore, detection of erroneous work can be easily and surely detected by microscopic observation using the continuity of patterns, and automation of identification is also possible, especially for different product groups with the same chip size. A valid identification is possible.

Since the process name identification pattern of the present invention can also occupy a small area, it has the above effect that it can be used in combination with the product name and process name by the conventional numerical pattern.

[Brief description of drawings]

FIG. 1 is a plan view illustrating a first embodiment of the present invention.

FIG. 2 is a plan view of an example of a process name identification pattern when an error occurs in applying a photomask having only different process names in the photolithography process.

FIG. 3 is a plan view of an example of a process name identification pattern when an error occurs between products having the same chip size.

FIG. 4 is a plan view of a process name identification pattern according to a second embodiment of the present invention.

FIG. 5 is a plan view of an example of an identification numerical pattern applied to a photolithography process of a conventional semiconductor device.

[Explanation of symbols]

 1 Semiconductor Chip 2 Internal Element Area 3 External Element Area 4 Corners 5, 7 Process Name Identification Pattern 6 Laser Scanning 8 Product Name Identification Numerical Pattern 9 Process Name Identification Numerical Pattern

Claims (1)

[Claims] 1. A semiconductor device having a process name identification pattern, wherein the process name identification pattern has a rectangular shape and is continuous with the first process name identification pattern in the first photolithography process and the first photolithography process. A semiconductor device characterized in that a step name identification pattern corresponding to the photolithography step is sequentially provided adjacent to the second step name identification pattern in the second photolithography step.