JPH0535434B2 - - Google Patents

Info

Publication number
JPH0535434B2
JPH0535434B2 JP58189461A JP18946183A JPH0535434B2 JP H0535434 B2 JPH0535434 B2 JP H0535434B2 JP 58189461 A JP58189461 A JP 58189461A JP 18946183 A JP18946183 A JP 18946183A JP H0535434 B2 JPH0535434 B2 JP H0535434B2
Authority
JP
Japan
Prior art keywords
data
cpu
signal
circuit
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58189461A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6080896A (ja
Inventor
Satoru Maeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP58189461A priority Critical patent/JPS6080896A/ja
Publication of JPS6080896A publication Critical patent/JPS6080896A/ja
Publication of JPH0535434B2 publication Critical patent/JPH0535434B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Digital Computer Display Output (AREA)
  • Controls And Circuits For Display Device (AREA)
JP58189461A 1983-10-11 1983-10-11 メモリ制御回路 Granted JPS6080896A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58189461A JPS6080896A (ja) 1983-10-11 1983-10-11 メモリ制御回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58189461A JPS6080896A (ja) 1983-10-11 1983-10-11 メモリ制御回路

Publications (2)

Publication Number Publication Date
JPS6080896A JPS6080896A (ja) 1985-05-08
JPH0535434B2 true JPH0535434B2 (enrdf_load_stackoverflow) 1993-05-26

Family

ID=16241651

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58189461A Granted JPS6080896A (ja) 1983-10-11 1983-10-11 メモリ制御回路

Country Status (1)

Country Link
JP (1) JPS6080896A (enrdf_load_stackoverflow)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5843035A (ja) * 1981-09-08 1983-03-12 Matsushita Electric Ind Co Ltd 記憶表示装置

Also Published As

Publication number Publication date
JPS6080896A (ja) 1985-05-08

Similar Documents

Publication Publication Date Title
US4075620A (en) Video display system
US4644502A (en) Semiconductor memory device typically used as a video ram
US4104624A (en) Microprocessor controlled CRT display system
US4328557A (en) Processor circuit for video data terminal
US5526128A (en) Image producing apparatus with memory unit having an image memory area of changeable storage capacity
US4970501A (en) Method for writing data into an image repetition memory of a data display terminal
KR100273111B1 (ko) 그래픽 메모리 장치의 리프레쉬 제어방법 및 회로
JPH0535434B2 (enrdf_load_stackoverflow)
US5444458A (en) Display data write control device
JPS6338724B2 (enrdf_load_stackoverflow)
JPS6024586A (ja) 表示デ−タの処理回路
JPS6349236B2 (enrdf_load_stackoverflow)
JPS58194090A (ja) デイスプレイ装置
JPH0213317B2 (enrdf_load_stackoverflow)
JPH0316037B2 (enrdf_load_stackoverflow)
JPS6247695A (ja) 画像表示方法
JPS5995589A (ja) Ｃｒｔ表示装置
JPS645310B2 (enrdf_load_stackoverflow)
JPS63141462A (ja) スキヤンコンバ−タ
JPS63210993A (ja) Ｌｃｄ制御方式
JPH0432592B2 (enrdf_load_stackoverflow)
JPS6037595A (ja) テキスト・グラフィック表示方式
JPS6247098A (ja) 表示装置
JPH0474797B2 (enrdf_load_stackoverflow)
JPS62243043A (ja) メモリ駆動回路