JPH0533820B2 - - Google Patents

Info

Publication number
JPH0533820B2
JPH0533820B2 JP62193338A JP19333887A JPH0533820B2 JP H0533820 B2 JPH0533820 B2 JP H0533820B2 JP 62193338 A JP62193338 A JP 62193338A JP 19333887 A JP19333887 A JP 19333887A JP H0533820 B2 JPH0533820 B2 JP H0533820B2
Authority
JP
Japan
Prior art keywords
wire
wiring
ball
wire portion
semiconductor material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62193338A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6437038A (en
Inventor
Toshinori Kogashiwa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tanaka Denshi Kogyo KK
Original Assignee
Tanaka Denshi Kogyo KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tanaka Denshi Kogyo KK filed Critical Tanaka Denshi Kogyo KK
Priority to JP62193338A priority Critical patent/JPS6437038A/ja
Publication of JPS6437038A publication Critical patent/JPS6437038A/ja
Publication of JPH0533820B2 publication Critical patent/JPH0533820B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/113Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/1134Stud bumping, i.e. using a wire-bonding apparatus
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78Apparatus for connecting with wire connectors
    • H01L2224/7825Means for applying energy, e.g. heating means
    • H01L2224/783Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301Capillary

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
JP62193338A 1987-07-31 1987-07-31 Junction of semiconductor materials Granted JPS6437038A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62193338A JPS6437038A (en) 1987-07-31 1987-07-31 Junction of semiconductor materials

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62193338A JPS6437038A (en) 1987-07-31 1987-07-31 Junction of semiconductor materials

Publications (2)

Publication Number Publication Date
JPS6437038A JPS6437038A (en) 1989-02-07
JPH0533820B2 true JPH0533820B2 (de) 1993-05-20

Family

ID=16306232

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62193338A Granted JPS6437038A (en) 1987-07-31 1987-07-31 Junction of semiconductor materials

Country Status (1)

Country Link
JP (1) JPS6437038A (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2738568B2 (ja) * 1989-09-06 1998-04-08 新光電気工業株式会社 半導体チップモジュール
US7713782B2 (en) * 2006-09-22 2010-05-11 Stats Chippac, Inc. Fusible I/O interconnection systems and methods for flip-chip packaging involving substrate-mounted stud-bumps
US9847309B2 (en) 2006-09-22 2017-12-19 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming vertical interconnect structure between semiconductor die and substrate

Also Published As

Publication number Publication date
JPS6437038A (en) 1989-02-07

Similar Documents

Publication Publication Date Title
EP0532297B1 (de) Flip-Chip-Verfahren zur Verbindung eines Halbleiterchips
US5514912A (en) Method for connecting semiconductor material and semiconductor device used in connecting method
US4914814A (en) Process of fabricating a circuit package
JP3227444B2 (ja) 多層構造のフレキシブル配線板とその製造方法
JPH02123685A (ja) 金を含むワイヤを半田に接着する方法
JP2000036511A (ja) 電子部品の製造方法
JPH0758722B2 (ja) 半導体装置のチップボンディング方法
TWI337056B (en) An electronic parts packaging structure
JPH0136254B2 (de)
JPS60154537A (ja) 半導体デバイスの製作方法
JPH0533820B2 (de)
JPH05218133A (ja) 半導体素子実装基板および実装方法
JP2000294699A (ja) 半導体装置の絶縁性放熱板およびその製造方法
JPS5825242A (ja) 半導体装置の製法
JPS61181136A (ja) ダイボンデイング方法
JPS63168028A (ja) 微細接続構造
JP2979880B2 (ja) 複合リードフレームおよびその製造方法
JPH0350736A (ja) 半導体チップのバンプ製造方法
JPS63168031A (ja) 半導体装置
JPH0656860B2 (ja) 超電導装置
JPH08236575A (ja) 半導体装置及びその製造方法
JPH07122562A (ja) バンプ形成方法及びワイヤボンディング方法並びにバンプ構造及びワイヤボンディング構造
JPH0158866B2 (de)
JPH0565052B2 (de)
JPH0465534B2 (de)