JPH05326357A - Method for forming contact hole - Google Patents

Abstract

PURPOSE:To prevent that a resist film is reduced and that the controllability of the thermal deformation of a resist pattern becomes bad by a method wherein the title method is provided with the following: a press wherein an exposure operation is performed to the out-of-focus position and, in addition, an exposure operation and a developing operation are performed to the position of a focal point; and a process wherein UV rays are irradiated under a prescribed condition. CONSTITUTION:A out-of-focus exposure operation which is provided with a light intensity distribution 5 is performed only to a part in which a contact hole is former in a substrate, to be treated, which has been coated with a photoresist film 3 on a wafer which has been covered with an interlayer insulating film 2 on a semiconductor substrate 1. After that, a contact-hole pattern is exposed and developed; a contact-hole resist pattern 42 can be obtained without reducing the resist film. Then, before the interlayer insulating film 2 is RIE-treated, a resist taper angle is controlled and the smoothing treatment of a sidewall is executed under a prescribed UV curing condition; the taper working operation of the interlayer insulating film 2 is executed surely and with good controllability. Thereby, the contact hole can be adjusted with good accuracy, and a sidewall angle can be adjusted to an arbitray angle within a range of about 50 to 85 deg..

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming connection holes such as contact holes and through holes for connecting metal wirings in a semiconductor manufacturing process.

[0002]

2. Description of the Related Art In the conventional case where a contact hole or a through hole formed in an interlayer insulating film has a large hole diameter of 2 to 3 .mu.m, it is sufficient to form it vertically.
However, along with the miniaturization of the element size, it has recently become necessary to reduce the hole diameter to 0.5 to 1 μm.
However, if the cross-sectional shape of such a small hole diameter is kept vertical as in the conventional case, the ratio of the hole depth to the hole diameter, that is, the aspect ratio of the hole exceeds 1, so that the upper wiring formed after the hole forming step is formed. In the forming process, the wiring material tends to be less likely to adhere to the side wall of the hole,
The connection between metal wirings such as aluminum is insufficient, and as a result, the yield of semiconductor devices is significantly reduced. In order to avoid such an inconvenience in the case of a fine hole, the sectional shape of the hole is usually processed into a tapered shape in which the diameter of the hole on the surface side gradually widens or a stepped hole shape in which the hole diameter is widened in two or three stages. It is generally known that it is good.

As a processing method for obtaining a contact hole or a through hole having such a shape, (1) RIE has been used so far.
Processing method and wet etching method (or plasma etching method)
And (2) a taper or step processing method utilizing recession of the resist mask during RIE processing has been devised. In the processing method (1), 1/2 to 2/3 of the layer to be processed
After vertically machining to a depth of about a depth by the RIE processing method, the remaining isotropically processed by the wet etching method or the plasma etching method to form a tapered hole shape in which the hole diameter on the surface side of the processed layer is widened. It is known that almost the same result can be obtained even if the processing order is reversed. Since this method does not require any special measures for the cross-sectional shape of the resist pattern, it can be said that this method is the simplest method for obtaining a tapered hole shape, but because an isotropic etching method such as a wet etching method is used. In principle, we are not good at precisely controlling the size and cross-sectional shape of holes, so it is suitable for processing contact holes or through holes with a hole diameter of 1 μm or less that requires high-precision dimension controllability. It has the drawback of being difficult.

On the other hand, as a method included in the category of the above processing method (2), (A) a method of not controlling the cross-sectional shape of the resist pattern particularly, and (B) a whole surface exposure method or ( C) It is roughly classified into heat flow method and the like. In the method (A), after forming a hole pattern in the resist film by a usual method, the interlayer insulating film under the resist film is subjected to RIE processing.
At this time, (a) the insulating film is efficiently etched, and the resist film is hardly etched (for example,
CHF ₃ ), first, etching is performed vertically up to a depth in the middle of the insulating film, then (b) both the insulating film and the resist film are efficiently etched, and the remaining depth is set in the mixed gas atmosphere of CHF ₃ and O _2. RIE processing is performed on the insulating film. Through the above steps, a contact hole having a tapered cross-sectional shape in which the opening diameter on the insulating film surface side is widened is completed. In the above step (b), the reason why it is processed into a tapered shape is that in the process of etching the resist film at the same time as the insulating film,
This is because the resist pattern edge gradually recedes. The receding amount of the edge: ΔT has a relation of approximately ΔT = ER / tan θR between the inclination angle of the resist pattern cross section: θR and the etching amount of the resist film: ER. Therefore, in order to obtain a desired amount of edge receding in a short time and stably obtain a dimensional accuracy and a well-controlled tapered cross-sectional profile, while precisely maintaining the hole diameter on the resist film at a desired value, Moreover, it is understood that the resist pattern inclination angle θR needs to be controlled to an appropriate value.

In the above method (A), the dimensional accuracy can be maintained well, but the inclination angle θR of the resist pattern is generally as large as 80 to 85 °.
In order to obtain 2 .mu.m, the etching amount ER of the resist film becomes considerably large at 1.1 to 2.3 .mu.m, so it is necessary to set the resist coating film thickness to 2.5 .mu.m or more. It is not easy to form a contact hole with a hole diameter of 1 μm or less in such a thick resist film with high accuracy, and it takes a long time to process the resist receding amount of 0.2 μm, and a slight fluctuation of θR Since the value of ΔT fluctuates greatly, there is a drawback that it is difficult to process a highly accurate contact hole with good reproducibility.

On the other hand, in the whole surface exposure method of (B), prior to the pattern exposure, the entire surface of the resist is exposed with a small exposure amount which is a fraction of the exposure amount of the pattern exposure to develop the resist surface layer portion. By increasing the dissolution rate with respect to the liquid, the hole after development is made to have a tapered cross-sectional shape. With this method, it is possible to obtain a near-ideal hole shape with a relatively simple process, but on the other hand, it is impossible in principle to prevent film slippage of the resist coating film due to the entire surface exposure process. Moreover, when this method was applied to an actual LSI wafer that had unevenness on the surface, and had aluminum wiring parts with high reflectance and non-aluminum wiring parts with low reflectance mixedly, it corresponded to the local condition of the wafer. A local piece of the reflected light intensity causes a local piece in the resist film slip, and as a result, a portion where the resist film thickness is too thin to withstand as a mask for the etching process in the next step may occur. This method requires a thick resist film thickness in advance as in the method (A) in consideration of the resist film slippage that occurs during the development process, and as described above, the hole shape and the resist film thickness are affected by the underlying substrate. It has been pointed out that it is easy and the dimensional accuracy is difficult to obtain.

In the heat flow method (C), a resist hole pattern having a cylindrical cross section is formed by an ordinary exposure method, and then the wafer is heated by a heating device such as a hot plate to make cresol novolac which is the main component of the resist material. Basically, the cross-sectional shape of the resist pattern is deformed from a cylindrical shape to a tapered shape by heating the resin pattern to 140 ° C. to 180 ° C., which is higher than the thermal deformation temperature of the resin, to thermally deform the resist pattern. Although this method is simple in process, it uses the thermal deformation of the resist, and therefore the state of thermal deformation is greatly affected by slight differences in the underlying step, hole diameter, resist film thickness, etc. The controllability is poor, and results with good reproducibility cannot be expected for controlling the hole diameter and hole taper shape. Therefore, although it can be used as a relatively large hole forming method having a hole diameter of 1.5 μm or more, it is not practically applicable as a fine hole forming method of 1 μm or less in which strict controllability of the hole diameter is required.

On the other hand, the FLEX method is known as an exposure method similar to the exposure method of the present invention (JP-A-58-174).
46, JP-A-63-42122, JP-A-63-17
7420). This exposure method is similar to the non-focus exposure / focal exposure of the present invention in that the exposure is performed while changing the focus, but the FLEX method is used as described in the specification of the patent application. The purpose of the invention is to expand the "effective focus latitude", which is quite different from the purpose of the present invention.

FIG. 4 is a diagram for explaining the steps of the overall exposure method, which is a typical example of the prior art, and will be sequentially described in the order of steps. In FIG. 4, 1 is a substrate, 2 is an interlayer insulating film, 3 is a resist film, 21 is an interlayer insulating film formed by a total exposure method that causes film loss in the interlayer film by RIE processing, and 23 is caused by insufficient resist film thickness. The amount of reduction of the interlayer film, 31 is the resist film after hole formation where the overall exposure film reduction has occurred, and 41 is the hole resist pattern formed by the overall exposure method with a large reduction of the resist film.

That is, as shown in FIG. 4A, a wafer having a semiconductor substrate 1 covered with an interlayer insulating film 2 and a photoresist film 3 applied on a wafer is shown in FIG. 4B. As described above, after exposing the entire surface of the resist film 3 with a weak exposure amount which is a fraction of the exposure amount when the contact hole is formed thereafter, the main exposure for forming the contact hole is performed by a known method. Then, development is performed to form a desired contact hole resist pattern 41. In this method, a large film loss ΔTB occurs in the resist film 3 in principle.
The amount of film reduction largely depends on the total exposure amount, and when the side wall inclination angle θR of the contact hole resist pattern 41 is adjusted to a desired angle of about 60 °, the amount of film reduction is 50% of the resist coating film thickness. The film thickness of the resist film 31 after the contact hole resist pattern 41 is formed is reduced to half, and an essential defect of the method occurs that the resist film thickness is insufficient in subsequent interlayer film processing steps.

Before performing the RIE process on the interlayer insulating film 2, as shown in FIG.
By making good use of the balance between the heat flow of the resist pattern and the photo-curing reaction under the special UV curing condition as shown in (c), the resist taper angle is controlled and the side wall smoothing process is performed, whereby the interlayer insulating film is formed. The taper machining can be performed more reliably and with good controllability.

After the contact hole resist pattern 41 is formed by the steps described above, the interlayer insulating film 2 is etched by the RIE processing apparatus as shown in FIG. 4D, and a desired tapered contact hole or through hole is formed. A series of steps is completed by obtaining the holes.
In the case of the conventional full-face exposure method shown in FIG. 4D, the reduction of the resist film cannot be avoided in principle.
In the process of IE processing, due to the insufficient thickness of the resist film 31,
The resist film disappears during the RIE process, and as a result, the exposed interlayer insulating film 21 is shaved and thinned, which is apt to cause a fatal defect that the risk of causing interlayer insulating failure increases.

[0013]

SUMMARY OF THE INVENTION The present invention solves the above-mentioned problem of the reduction of the resist film due to the entire surface exposure, which is the greatest drawback of the conventional technique, and the resist pattern thermal deformation, which is the greatest disadvantage of the conventional technique. It is an object of the present invention to provide a method of forming a connection hole using a novel resist profile control technology for tapering a connection hole, which solves the problem of poor controllability.

[0014]

In order to solve the above problems, the present invention provides a projection exposure method during a step of forming a connection hole for connecting metal wires by forming a hole in an interlayer insulating film in a semiconductor device manufacturing process. In the light exposure step using, a first step of developing after performing exposure at a non-focus position and then at a focus position, changing the focus position at least twice at the same position, and then developing. This is followed by a second step of irradiating with UV light while gradually raising the substrate temperature.

[0015]

By using the method of forming a connection hole according to the present invention, a submicron size hole can be accurately formed,
In addition, the side wall angle of the hole can be adjusted to any angle within the range of approximately 50 ° to 85 °. Therefore,
It is possible to stably form a so-called tapered hole having a side wall of a contact hole or a through hole which is usually used for connection between metal layers of an LSI with a wide process margin. Alternatively, the coverage of the wiring metal inside the through hole is improved, the connection resistance of the hole is reduced, the connection reliability is improved, and the connection yield is significantly improved. As a result, the LSI manufacturing yield is significantly increased. Has the advantage of being improved.

[0016]

Embodiments of the present invention will now be described in detail with reference to the drawings.

FIG. 1 is a cross-sectional view for explaining the principle and steps of the present invention, which will be sequentially described in the order of steps. In FIG. 1, 1 is a substrate, 2 is an interlayer insulating film, 3 is a resist film, 5 is a light intensity distribution during non-focus exposure, and 22 is an interlayer insulating film after the interlayer insulating film is processed according to the present invention in which no film reduction occurs. A film, 32 is a resist film after formation of holes according to the present invention in which the resist film is not reduced in principle, and 42 is a hole resist pattern formed by the present invention with no reduction in resist film.

That is, as shown in FIG. 1A, only a portion where a contact hole of a substrate to be processed in which a photoresist film 3 is coated on a wafer in which a semiconductor substrate 1 is covered with an interlayer insulating film 2 is formed. After performing the non-focus exposure having the light intensity distribution 5, the desired contact hole pattern is exposed, and subsequently, the development process is performed under the same conditions as described in the related art to obtain the desired contact hole resist pattern 42. To get In this method, since only the resist film around the contact hole is exposed, the resist film thickness after resist development in FIG. 1B is, in principle, almost equal to the coating film thickness, which will be described with reference to FIG. 4B. The reduction of the resist film as described above does not occur. In FIG. 1A, a reduced projection exposure apparatus usually called a stepper is used for the method of exposing the contact hole on the photoresist film. In particular, in the present invention, it is done prior to the contact hole exposure,
In addition, the method of performing non-focus exposure and the conditions therefor, which form the basis of the present invention, will be described in detail below.

FIG. 2 shows the relationship between the relative exposure amount of non-focus exposure for controlling the taper shape of the contact hole resist pattern and the side wall inclination angle θR of the resist pattern. Here, the relative exposure amount is a relative exposure amount when the threshold exposure amount defined by the minimum exposure amount required for opening holes in the positive photoresist film under a predetermined developing condition is 1. In this case, it is appropriate that the relative exposure amount of the focus exposure performed after the non-focus exposure for the contact hole having the designed value of 0.5 to 1 μm is about 3 times. In addition, it is preferable that the range of non-focus exposure required to taper the resist pattern be determined so that the diameter is about three times the designed size of the contact hole. When non-focus exposure is performed with a g-line stepper with NA 0.54, the exposure position is -1.5 to-.
2.5 μm (the direction of focusing on the side away from the substrate to be exposed is the minus focus position) is suitable.
FIG. 2 shows the relationship between the exposure amount of non-focus exposure and the side wall inclination angle θR of the contact hole resist pattern obtained thereby under the above conditions. If the amount of non-focus exposure is 2 or less, θR is approximately 85 °,
At higher exposure doses, θR starts to decrease depending on the exposure dose, and when the relative exposure dose is 4, the taper angle can be about 70 °. If the non-focus exposure amount is increased more than that, the side wall angle can be gradually reduced (a larger taper angle can be obtained).
(1) Throughput decreases. (2) The contact hole diameter becomes too large, and the dimensional accuracy is significantly deteriorated. Values around 4 generally give the most reasonable results, since such drawbacks become noticeable.

From this state, a tapered contact hole can be obtained by RIE processing the interlayer insulating film 3 as shown in FIG. 1D. In this case, the side wall angle θE is controlled to a desired value. Difficult to do. The side wall of the tapered hole is not smooth. Therefore, before performing the RIE process on the interlayer insulating film 2, by utilizing the balance between the heat flow of the resist pattern and the photo-curing reaction under the special UV curing condition as shown in FIG. By controlling the resist taper angle and smoothing the side wall, the taper process of the interlayer insulating film can be performed more reliably and with good controllability.

Therefore, the processing condition dependency of the UV curing conditions will be described based on the measured data. Figure 3-
(A) shows a typical example of a chart of UV curing treatment conditions. The standard processing conditions for UV curing are as follows.

The substrate is placed on a substrate holder heated to 110 ° C., the substrate holder is gradually heated to 180 ° C. at a constant rate, and finally held at 180 ° C. for 40 s.
At this time, three levels of 0.5, 1.0 and 1.5 ° C./s were selected as the substrate heating rate. During this time, UV light is irradiated in the air atmosphere. Two 2.5 KW high-pressure mercury lamps were used as UV light sources, no irradiation for the first 10 s, weak light I ₁ (illuminance: about 30 mW / cm ² ) in the next step, and then intermediate intensity I _{2 for} 10 s. (Illuminance: 300 mW / c
m ² ) light irradiation, finally strong light I ₃ (illuminance: 600 mW
/ Cm ² ), after cooling the substrate, the substrate is taken out and the process is completed. At this time, the processing time with the weak light I ₁ is a value obtained by multiplying the temperature difference of 70 ° C. from 110 ° C. to 180 ° C. by each heating rate.

Here, the sidewall angle θ of the contact hole resist pattern cured by the above UV curing conditions.
Experimental data of R on the temperature rise rate dependence are shown in FIG. In this case, the resist film is a positive photoresist consisting of cresol novolac resin and o-naphthoquinonediazide photosensitizer: TSMR-V3 (Tokyo Ohka, trade name)
Was applied to a thickness of 2 μm. In FIG. 3 (b), the curve b1 shows that the non-focus exposure / focus exposure does not form a tapered resist pattern, but only the focus exposure causes the inclination angle θR of the side wall of the hole to be 85 °, which is almost tapered. In this case, the side wall angle hardly changes even if UV curing is performed. On the other hand, the side wall angle θR of the hole resist pattern after development is 70 ° by the non-focus exposure (relative exposure amount: 3) / focus exposure (relative exposure amount: 3) indicated by the curve b2 (see FIG. 2). In the above, the UV treatment tends to make the resist pattern more likely to taper (small θR). In particular, it can be seen that as the heating rate is increased to 1 or 1.5 ° C./s, θR becomes smaller and the taper becomes easier. On the other hand, the amount of change in the diameter of the contact hole (the diameter of the resist pattern in contact with the substrate) with respect to the UV cure processing conditions has the relationship shown in FIG. Here, the curve c-1 is before UV curing treatment, c-2 is the heating rate of 0.5 ° C./s, c-3 is 1 ° C./s, and c-4 is the heating rate of 1.5 ° C./s. Is the case. When the heating rate is slowed down to 0.5 ° C./s, the resist is cured with almost no change in the pore size, whereas the heating rate is increased to 1 ° C./s or 1.5 ° C./s. Accordingly, the contact hole diameter is reduced. The reduction amount is almost constant regardless of the hole diameter, and is approximately 0.2 μm at 1 ° C./s.
At 1.5 ° C / s, it is about 0.3 µm. Therefore, this method is used as a method of adjusting the resist pattern diameter of the contact hole to a smaller one by opening a slightly larger contact hole at the exposure stage and changing the temperature rising rate during the subsequent UV curing treatment. it can. This can be said to be an extremely effective method as a method of forming a minute contact hole that is difficult to form by the conventional light exposure technique in view of the technical difficulty in forming a contact hole having a small hole diameter. As described above, the hole diameter and the side wall inclination angle can be adjusted by changing the temperature rising rate during UV curing. That is, the curing of the resist film surface layer portion by the UV light irradiation by the crosslinking reaction and the heat of the resist material by the substrate heating are performed. This occurs as a result of the balance of deformation.If the heating rate is slowed down, the curing reaction becomes dominant and the heat flow decreases, and if the heating rate is increased, the heat flow takes precedence and the thermal deformation occurs. This is because it becomes easier. In this UV curing process, it is important to control the UV irradiation intensity (I ₁ in FIG. 3A) during the temperature rise as well as the above-mentioned temperature rise rate. The above result is an example in the case of an irradiation intensity of 30 mW / cm ² , and in the case of 20 mW / cm ² , the heating rate is reduced by about 20%, and in the case of 40 mW / cm ² , it is similarly increased by about 20%. , Similar results are obtained. Also UV
The rate of the curing reaction and the heat distortion temperature are slightly different depending on the type of resist, so that when the type of resist is changed, it is necessary to finely adjust the processing conditions as well. The UV irradiation I ₂ and I ₃ in the second step and the third step improve the heat resistance and the dry etching resistance by reliably curing the resist film after controlling the side wall angle and the hole diameter of the contact hole resist pattern. It can be omitted if the conditions for the interlayer insulating film RIE to be subsequently performed are mild and the substrate temperature does not rise to about 120 ° C. or more during the etching process.

After the contact hole resist pattern 42 is formed by the steps described above, the interlayer insulating film 2 is etched by the RIE processing apparatus as shown in FIG. 1D, and the desired tapered contact hole or through hole is formed. A series of steps is completed by obtaining the holes.
Here, the interlayer insulating film 2 is generally PSG, BPSG, plasma TEOS, ozone TE having a thickness of about 0.5 to 1.5 μm.
It is composed of a silicon oxide film such as OS and SOG.

In selecting the etching conditions for the interlayer insulating film made of the above materials, if the etching rate ER of the resist film, the etching rate ES of the interlayer insulating film, and the inclination angle θR of the resist pattern are determined, after the interlayer insulating film RIE is processed. Angle of the contact hole sidewall θE is approximately; tan θR = ES
・ It is determined by tan θR / ER. That is, the etching selection ratio of the interlayer film having a thickness of 1 μm to the resist: 1 (ES / E
When RIE processing is performed under the condition of R = 1), the inclination angle θE of the contact hole side wall after the RIE processing becomes equal to the inclination angle θR of the resist pattern, and the reduction amount of the resist film is 1 μm.
It turns out that it is m. Further, if the selection ratio is reduced from the above equation, a desirable result is obtained in that the sidewall inclination angle θE after RIE processing can be made small, but on the other hand, it causes an inconvenient result that the amount of resist film slippage increases. There is an off relationship. Therefore, in this step, loss of the resist film is unavoidable in principle, and thus a thick resist film is generally required.

Now, specific examples will be described below.

Concrete Example 1 A positive photoresist TSMR-V3 is applied to a thickness of 2 μm on a processed LSI wafer substrate in which a first metal wiring layer is covered with a second interlayer insulating film, which is called a stepper. 1/5 times g-line (exposure wavelength 43
6 nm) A reduced projection exposure apparatus is used to accurately superimpose the desired through-hole reticle (original pattern image) image on the pattern of the first metal layer already formed on the resist film on the substrate, and through-hole pattern. To burn. At this time, the image formation position of the reticle image was adjusted to the position (minus) about 2 μm away from the resist surface, and the non-focus exposure was performed with the exposure amount of 1400 ms (700 mJ / cm ² ). Only the position is adjusted again near the surface of the resist surface (focal position 0 μm), and the focus exposure is performed with an exposure amount of 950 ms (450 mJ / cm ² ).
Then, a resist developing solution consisting of a tetramethylammonium hydroxide aqueous solution having a concentration of 2.38% is dropped onto the substrate, and post-exposure bake is performed at 110 ° C. for 90 s by a method known as a static paddle development method. Development processing, pure water rinsing, drying, and post-baking processing are sequentially performed for about 90 seconds. Here, the design size (mask size) of the through hole used is 0.6 μm diameter, but the finished size of the through hole resist pattern formed under these conditions is about 0.8 μm and the sidewall inclination angle θR is about 70 °. Is. Next, by using a UV curing device, as shown in FIG.
Among the processing conditions described in 1., the substrate heating rate is 1 ° C./s.
And The diameter of the resist pattern after this treatment is about 0.6.
The μm and the inclination angle θR were about 60 ° C.

Then, a through hole is formed in the interlayer insulating film by the RIE apparatus. The average thickness of the interlayer film is about 0.8μ
At m 2, it is composed of plasma TEOS, ozone TEOS, an ECR deposited film, and a silicon oxide composite film such as SOG. The etching process is usually performed in the following two steps. In the first step, the interlayer insulating film is etched by about 400 nm under the following conditions. The main processing conditions are as follows. Etching gas composition ratio; CHF3
/ O2 = 100/20 SCCM, pressure; 50 mTorr, high frequency output; 1200 W. The etching rate under these conditions is
Interlayer film: 25 nm / min, resist: 9 nm / min
The inclination angle of the side wall of the through hole after etching 400 nm is almost vertical. Next, as a second step, the interlayer film is etched by about 700 nm under the following conditions. The main processing conditions are as follows. Etching gas composition ratio; CHF3 / O2 = 50/50 SCCM, pressure ;: 50 mTorr, high frequency output; 1200 W. The etching rate under these conditions is: interlayer film: 30 nm / min,
Resist: 30 nm / min. The amount of resist film reduction due to the main etching process is about 900 nm. After that, the remaining resist film is removed by using O2 plasma ashing and a resist stripping solution, and the through hole processing step is completed. The size of the through hole processed in the interlayer insulating film is about 0.
6 μm and the sidewall inclination angle is almost exactly 60 ° C.

(Specific Example 2) The specific example 2 is the same as the specific example 1 except for the exposure conditions described below. First, the exposure amount is 700 ms at the focus position -2 μm, and then-
Exposure amount 700ms by changing focus position to 1.5μm
And non-focus exposure are divided into two and exposed. Further, exposure is performed at a focus position of −0.2 μm with an exposure amount of 450 ms, then the focus position is changed to +0.3 μm, and the exposure is performed at an exposure amount of 450 ms and the focus position exposure is divided into two. In this case, the shape of the finally obtained through hole is not much different from that of the concrete example 1, but the focus margin is improved as a whole, and more stable pattern formation can be performed. That is, through the substrate step at the time of forming the through hole in the second interlayer film for connecting the first metal layer and the second metal layer to the third interlayer film connecting the second metal layer and the third metal layer. The substrate step when forming holes is usually larger. In this way, as the manufacturing process of the LSI progresses, the step difference of the substrate generally becomes severe. Therefore, the non-focus exposure and the focus exposure are changed by changing the focus position respectively.
When the exposure is divided into several or more exposures, it is particularly effective in forming a tapered contact hole or through hole on the substrate having a large substrate step difference as described above. In the present embodiment, two times of divided exposures and a total of four times of exposures were performed, but depending on the situation of the substrate step,
A more stable pattern formation is possible by performing the divided exposure 5 to 6 times or more.

Further, regarding the order of the non-focus exposure and the focus exposure, the method of performing the non-focus exposure first has been described so far, but even if the exposure order is exchanged, basically no great difference occurs. However, in this case, it should be noted that when the exposure order is changed and the non-focus exposure is performed later, the obtained resist pattern side wall angle tends to be slightly larger than that of the embodiment shown in FIG. .. Therefore, it is desirable to carry out the non-focus exposure first unless other problems occur.

(Specific Example 3) After the resist pattern is formed under the same conditions as in the specific example 1, the RIE process is performed directly without performing the UV cure process. That is,
This means that the RIE process is performed with the sidewall inclination angle of the resist pattern kept at 70 ° immediately after the pattern formation. RI at this time
In the E processing, the first step is the same as that of the concrete example 1, and the interlayer insulating film is processed by changing only the composition ratio of the etching gas as follows under the etching processing conditions of the second step. That is, when CHF3 / O2 = 40/60 SCCM, the etching rate of the resist film is 40 nm / min while the etching rate of the interlayer film is 30 nm / min. When processed under these conditions, the through hole diameter after processing can be about 0.6 μm and the side wall angle can be about 60 ° as in the case of the above-mentioned specific example, and the process can be shortened. However, since the resist film reduction amount was increased to about 1.1 μm and the heat flow treatment of the resist pattern side wall by UV curing was omitted, the through hole side wall after RIE processing was compared with the results of the concrete examples 1 and 2. It should be noted that the smoothness is slightly inferior. When the insulating film RIE conditions are the same as those in the above-described specific example, the side wall inclination angle of the through hole pattern processed into the insulating film becomes abrupt, about 70 °. As described above, as a method of adjusting the side wall inclination angle to a desired value, (1) the exposure amount of non-focus exposure is adjusted, (2) the substrate heating rate during UV curing is adjusted, and (3) during RIE processing conditions. There are three methods of changing the composition ratio of the etching gas in the second step to adjust the etching rate ratio of the interlayer insulating film and the resist.
When the present invention is used in an LSI manufacturing process, one or more of the above three conditions can be appropriately adjusted to adjust to a desired side wall angle, so that the side wall inclination angle can be adjusted in a wide range. ..

[0032]

As described above, according to the present invention,
It is possible to accurately adjust the submicron-sized hole and adjust the side wall angle of the hole to any angle within the range of approximately 50 ° to 85 °. Therefore, normal LS
It is possible to stably form a so-called tapered hole having a side wall of a contact hole or a through hole used for connection between the metal layers of I with a wide process margin. The coverage of the wiring metal inside the through hole is improved, the connection resistance of the hole is reduced, the connection reliability is improved, and the connection yield is significantly improved. As a result, the LSI manufacturing yield is significantly increased. There are advantages to be improved.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a sample in a main process for explaining the principle and process of the present invention.

FIG. 2 is a characteristic diagram showing a relationship between a relative exposure amount of non-focal exposure and a tilt angle of a side wall of a contact hole or a through hole resist pattern, which is a basis of the present invention.

FIG. 3A is a characteristic diagram for explaining UV curing treatment conditions according to the present invention. (B) A characteristic diagram showing the relationship between the substrate temperature rising rate during UV curing and the resist pattern inclination angle (parameter is the sidewall inclination angle of the resist pattern before UV curing treatment). (C) is a characteristic diagram in which the relationship between the dimensions on the mask of the contact hole or through-hole pattern and the finished dimensions on the resist pattern is actually measured using the heating rate as a parameter.

FIG. 4 is a cross-sectional view for explaining steps of a conventional full-face exposure method.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Substrate, 2 ... Interlayer insulation film, 3 ... Resist film, 5 ... Light intensity distribution at the time of non-focus exposure, 21 ... Interlayer insulation film formed by the whole surface exposure method in which film reduction occurs in the interlayer film by RIE processing, 22.
... No film reduction occurs after the interlayer insulating film is processed according to the present invention, 23 ... Interlayer film reduction due to insufficient resist film thickness, 31 ... Whole exposure film reduction after forming a hole Resist film, 32 ... A resist film after the formation of holes according to the present invention in which resist film reduction does not occur in principle, 41 ... A hole resist pattern formed by the entire surface exposure method with a large reduction in resist film, 42 ... Formed by the present invention A hole resist pattern with no reduction of the resist film.

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁵ Identification code Internal reference number FI Technical display location H01L 21/90 B 7735-4M 7352-4M H01L 21/30 361 Q 7735-4M 21/88 F

Claims (1)

[Claims] 1. In a light exposure process using a projection exposure method in a process of forming a connection hole for connecting metal wires by making a hole in an interlayer insulating film in a manufacturing process of a semiconductor device, after performing exposure at a non-focus position. Then, the exposure is performed at the focus position by changing the focus position at least twice at the same position, and then the exposure is performed, and then the first step of developing, and subsequently, the substrate temperature is gradually raised to irradiate the UV light. And a second step of forming a connection hole.