JPH053197B2 - - Google Patents

Description

[Detailed Description of the Invention] (Industrial Application Field) The present invention relates to an emphasis/de-emphasis circuit for reducing noise mixed in during transmission of video signals, etc. In particular, the emphasis/de-emphasis circuit will be described in detail below. By adopting a circuit configuration that allows
This invention relates to an emphasis/de-emphasis circuit that provides a high degree of S/N improvement.

(Summary of the Invention) The present invention relates to an emphasis/de-emphasis circuit when transmitting a video signal, an audio signal, etc., and the emphasis circuit and the de-emphasis circuit are combined into an edge detection circuit consisting of a delay element and a subtracter, and at least a coefficient circuit. A circuit part in which multiple cascade-connected circuits are provided and the output signals of each cascade-connected circuit are added is
By having it as a component of the emphasis/de-emphasis circuit, there is a degree of freedom in frequency characteristics, reducing transmission noise such as truncation noise that occurs during FM transmission, and improving S/N.
It is an object of the present invention to provide an emphasis/de-emphasis circuit that is a digital circuit that is easy to implement in hardware, and that also improves waveform distortion and prevents waveform distortion.

(Prior art) Conventionally, an emphasis/de-emphasis circuit consists of a resistor (R), a coil (L), and a capacitor (C).
It was either constructed from an analog circuit using a circuit or had a simple construction consisting of one unit delay element. L,
Since the circuit using C and R is widely known, the explanation thereof will be omitted here.

FIG. 4 shows the configuration of a conventional emphasis/de-emphasis circuit using unit delay elements.
z ^-1 is the unit delay element 1, k, 1-k, 1/(1-
k) represents coefficient units 14, 16, and 15. Here, k is selected to be a positive number smaller than 1, and as shown in Figure 5, the emphasis circuit exhibits high frequency emphasis (a), the de-emphasis circuit exhibits high frequency suppression (b), and both filters are mutually exclusive. The relationship has inverse characteristics. Here, if the delay time of a unit delay element is t, then f ₀ =1/2t (1).

Since the emphasis circuit and de-emphasis circuit have an inverse filter relationship, the signal does not change between transmission and reception, but the noise mixed in during transmission is reduced by the amount of high-frequency suppression by the de-emphasis, improving the S/N. It will be done.

(Problems to be Solved by the Invention) Although the conventional analog emphasis/de-emphasis circuit using L, C, and R elements has a simple configuration, it has problems such as deterioration over time and difficulty in adjustment. On the other hand, delay elements can be configured with digital elements, and there is no problem with stability, but the degree of freedom in changing the frequency characteristics is small, as shown in Figure 5 (in Figure 5, only a can be changed). ), it was not possible to design an optimal emphasis/de-emphasis circuit for the spectrum of signal and transmission line noise.

FIG. 6 shows a level diagram of FM transmission. Due to emphasis, the dotted line portion of the transient waveform generated at the edge portion is outside the transmission band, and if this portion is deleted, it appears as truncation noise. Therefore, it was not possible to perform large emphasis.

Therefore, an object of the present invention is to eliminate waveform distortion during transmission such as truncation noise that occurs during FM transmission, which can be configured with a stable digital circuit that eliminates the above problems, and which can have a large degree of freedom in frequency characteristics. It is an object of the present invention to provide an emphasis/de-emphasis circuit in which a large degree of S/N improvement can be achieved.

(Means for Solving the Problem) In order to achieve this object, the emphasis/de-emphasis circuit of the present invention provides an emphasis/de-emphasis circuit for reducing noise in television signal transmission. In the emphasis/de-emphasis circuit for n
When is a positive integer representing 1, 2, 3, ..., N, on the emphasis circuit side, a plurality of N edge processing circuits arranged in parallel are provided, and the nth edge processing circuit is The circuit includes an edge detection circuit on the emphasis circuit side, which includes an n-unit delay element having a delay time n times the unit delay time, and a subtracter for subtracting the output of the element from the input television signal of the emphasis circuit; , a coefficient unit having individual coefficient values such that the filter characteristic of the transfer function of the emphasis circuit to be constructed satisfies the condition of minimum phase, and the input television signal of the emphasis circuit and the edge of the N emphasis circuits are provided. The output signal of the emphasis circuit is obtained by adding the sum of the input television signals of the N emphasis circuits via each of the processing circuits, and on the de-emphasis circuit side, a plurality of N television signals are arranged in parallel as on the emphasis circuit side. and the nth edge processing circuit subtracts an n unit delay element having a delay time n times the unit delay time and the output of the element from the input television signal of the de-emphasis circuit. The transfer function of the emphasis circuit that the de-emphasis circuit has is an individual whose filter characteristic satisfies the minimum phase condition of the transfer function of the inverse filter characteristic. a coefficient unit having a coefficient value of , and subtracts the sum of the input television signals of the N de-emphasis circuits via each of the N de-emphasis processing side edge detection circuits from the input television signal of the de-emphasis circuit. The present invention is characterized in that the output signal is used as the output signal of the de-emphasis circuit.

(Examples) The present invention will be described in detail below by way of examples with reference to the accompanying drawings.

A block diagram of a first embodiment of an emphasis circuit and a de-emphasis circuit according to the present invention is shown in FIGS. 1a and 1b, respectively. The first embodiment of the emphasis circuit includes an edge extraction circuit composed of a unit delay element 1 and a subtracter 4, and a coefficient value of k/(1-k).
An edge processing circuit consisting of a coefficient multiplier 5 which is (1-) and a nonlinear circuit 8 of Q ₁ connected in cascade thereto, a 2-sample delay element 2 in which unit delay elements are similarly connected in cascade, /(1-k) (1-), an edge processing circuit consisting of a nonlinear circuit 9 of _Q2 , and a 3-sample delay element 3, -k/
This is a nonlinear emphasis circuit consisting of a coefficient multiplier 7 of (1-k)(1-), an edge processing circuit consisting of a nonlinear circuit 10 of _Q3 , and an adder 12 for adding input signals.

On the other hand, the configuration of the de-emphasis circuit of the first embodiment is a recursive nonlinear emphasis circuit having an edge processing circuit having the same configuration as the edge processing circuit of the emphasis circuit.

The transfer function of the conventional example shown in FIGS. 4a and 4b is as follows.

H(z)=1/1-k(1-kz ^-1 ) H ^-1 (z)=1/H(z)=1-k/1-kz ^-1 0k<1 H(z): Emphasis circuit Transfer function H ^-1 (z): Transfer function of de-emphasis circuit
(2) Here, the zero point and pole of H(z) are Zero point: z=k (<1) Pole: z=0, both are within the unit circle in the complex plane, and H(z) satisfies the minimum phase condition. Prepared.
Therefore, a stable inverse filter exists, which is H ^-1
(z). This shows that the emphasis/de-emphasis circuit based on the conventional circuit shown in FIG. 4 can be realized as stable hardware, and the emphasis/de-emphasis circuit of the present invention must also satisfy the minimum phase condition.

First, we derive a general form of the emphasis/de-emphasis circuit that does not include nonlinear circuits.

Expanding equation (2), the emphasis transfer function H(z) at which the filter characteristic has the minimum phase becomes the following equation.

H (z) = 1/1-k ₁ (1-k ₁ z ^-1 ) 1/1-k ₂ (1-k ₂ z ^-2 ) 1/1-k ₃ (1-k ₃ z ^-3 ) …… = _N Π ⁿ⁼¹ 1/1−k _o (1−k _o z ^-n ) 0≦k _o <1 N: Positive integer value (3) In other words, the zero point of H(z): z= ⁿ √ Pole: z=0<1, and H(z) satisfies the minimum phase condition, so a stable inverse filter exists, which can be called H ^-1
(z), H ^-1 (z)=1/H(z)= _N Π ⁿ⁼¹ 1−k _o /1−k _o z ^-n (4) This is the transfer function of the de-emphasis circuit. Become.

Next, a nonlinear circuit is introduced to suppress waveform distortion such as truncation noise that occurs at the edge portions, but this must act only on the edge portions. H(z) is modified and defined as follows.

H(z)△=Y(z)/X(z) = _N Π ⁿ⁼¹ 1/1−k _o (1−k _o z ^-n ) Y(z)=[ _N Π Π ⁿ⁼¹ 1/ 1-k _o (1-k _o z ^-n )]・X(z)=X(z)+
{−X(z)+[ _N Π ⁿ⁼¹ 1/1−k _o (1−k _o z ^-n )]・X(z)} =X(z)+ _N Π ⁿ⁼¹ 1/1− k _o {− _N Π ⁿ⁼¹ (1−k _o )・X(z)+ _N Π ⁿ⁼¹ (1−k _o z ^-n )・X(z)} Here, _N Π ⁿ⁼¹ ( 1−k _o z ^-n ) △=1+a ₁ z ^-1 +a ₂ z ^-2 +……+
a _N(N+1)/2・Z−N(N+1)/2 (5) Then, _N Π ⁿ⁼¹ (1−k _o )=1+a ₁ +a ₂ +……+a _{N(N+1) /2} (6) and from this becomes. The second term on the right side of equation (7) is {X(z)−X(z)
z ^-m } represents edge extraction of the signal. From this, the equation that introduces the nonlinear circuit becomes the following equation.

The first embodiment is a case where k ₁ =k, k ₂ = (9). Equation (8) is Y(z)=X(z)+{Q ₁・kα[X(z)−X(z)z
^-1 ] +Q ₂ ...α[X(z)-X(z)z ^-2 ] +Q ₃ (-k)・α[X(z)-X(z)z ^-3 ]}
(10) However, α=1/(1-k)(1-), and when this is expressed as a circuit, it becomes the configuration shown in FIG. 1a.

On the other hand, for H ^-1 (z), H ^-1 (z)△=Y(z)/X(z)= _N Π ⁿ⁼¹ 1−k _o /1−k _o z ^-n ∴Y(z) =X(z)−{−Y(z) +[ _N Π ⁿ⁼¹ 1/1−k _o (1−k _o z ^-n )]} (11), and the expansion of the equation of H(z) From analogy The formula that introduces the nonlinear circuit is becomes.

In the first example, Y(z)=X(z)−{Q ₁・kα[Y(z)−Y(z)z
^-1 ] +Q ₂ ...α[Y(z)-Y(z)z ^-2 ] +Q ₃ (-k)・α[Y(z)-Y(z)z ^-3 ]}
(14) Therefore, the configuration shown in FIG. 1b is obtained. Here, the characteristics of the nonlinear circuit Q _n are shown in FIG. Although it has a clip characteristic, a general nonlinear circuit may be used.

FIG. 7 shows waveforms at each point in the first diagram when the input to the emphasis/de-emphasis circuit according to the first embodiment is a step waveform. th ₁
~ _th3 represents the threshold value (th) of the nonlinear circuits _Q1 ~ _Q3 .

Since the edge processing sections of the emphasis and de-emphasis circuits in FIG. 1 have the same circuit configuration, the output signal of the de-emphasis circuit is the same as the input signal of the emphasis circuit and is not subjected to distortion, as is clear from FIG. 7. The threshold values th ₁ to _{th 3} are set so that the truncation noise shown in FIG. 6 does not occur. In addition, the signal on the transmission line is E=P=A+(B ₁ +C ₁ +D ₁ ) (15) in FIG.

A block diagram of the configuration of the second embodiment is shown in FIG. Here, the difference from the first embodiment is that the nonlinear circuit is one circuit, and all the sums of the edge processing section (adder 1
1 output). Although the degree of freedom in design is lower than in the first embodiment, it has the advantage of simplifying the circuit. The characteristics of the Q nonlinear circuit 13 are as follows:
The threshold value th is set at a point where truncation noise does not occur.

In the first and second embodiments, the number of delay elements is three, but if equations (8) and (13) are followed, there is no limit to the number.

(Effects of the Invention) When conventional emphasis/de-emphasis circuits are constructed from analog circuits, there are problems with aging and adjustment. Further, in digital circuits, the degree of freedom in frequency characteristics, that is, the degree of freedom in design is small and there is no nonlinear characteristic, so there is no countermeasure against truncation noise, and it has been impossible to increase the degree of S/N improvement.

According to the present invention, a large degree of freedom can be obtained in frequency characteristics by adopting a stable inverse filter configuration with a large number of parameters, and by introducing a nonlinear circuit into the edge processing section, truncation noise during FM transmission can be reduced. It enables a large degree of S/N improvement without generating waveform distortion, and has the advantage that stable hardware can be realized because digital elements can be used.

[Brief explanation of the drawing]

FIGS. 1a and 1b show the nonlinear emphasis system of the present invention,
A first embodiment of the de-emphasis circuit is shown respectively, FIGS. 2a and 2b respectively show the second embodiment, and FIG.
4a and 4b respectively show conventional emphasis and de-emphasis circuits using unit delay elements, FIGS. 5a and 5b show the frequency characteristics of the configurations shown in FIGS. The figure shows the relationship between the transmission bandwidth and video signal during FM transmission.
The figure shows the waveform at each point when inputting the step waveform in the first embodiment of the present invention. 1...Unit delay element, 2...2 sample delay element, 3...3 sample delay element, 4...Subtractor,
5, 6, 7, 14, 15, 16... each coefficient unit,
8, 9, 10, 13...Nonlinear circuit, 11, 12
...Adder.

Claims (1)

[Claims] 1. In an emphasis/de-emphasis circuit for noise reduction in television signal transmission, when n is a positive integer representing 1, 2, 3, ..., N, on the emphasis circuit side: is plural N
The n-th edge processing circuit includes an n-unit delay element having a delay time n times the unit delay time, and the output of the element is connected to the input television of the emphasis circuit. an edge detection circuit on the emphasis circuit side comprising a subtracter for subtracting from the signal;
a coefficient unit having individual coefficient values such that the filter characteristic of the transfer function of the emphasis circuit to be constructed satisfies a minimum phase condition, and the input television signal of the emphasis circuit and the edge processing on the side of the N emphasis circuits are provided. N through each circuit
The output signal of the emphasis circuit is obtained by adding the sum of the input television signals of the above-mentioned emphasis circuits, and on the de-emphasis circuit side, a plurality of N edge processing circuits arranged in parallel are provided as in the emphasis circuit side. In addition, the n-th edge processing circuit includes an n-unit delay element having a delay time n times the unit delay time, and a subtracter for subtracting the output of the element from the input television signal of the de-emphasis circuit. The de-emphasis side edge detection circuit to be configured and the transfer function of the emphasis circuit which the de-emphasis circuit to be configured has are coefficient multipliers having individual coefficient values such that the filter characteristic of the transfer function of the inverse filter characteristic satisfies the minimum phase condition. and subtracting the sum of the input television signals of the N de-emphasis circuits via each of the edge processing circuits on the N de-emphasis circuit sides from the input television signal of the de-emphasis circuit to obtain an output signal of the de-emphasis circuit. An emphasis/de-emphasis circuit characterized in that it is configured to. 2. In the circuit according to claim 1, the N edge processing circuits on the transmitting side include individual edge detection circuits and coefficient multipliers connected in series in addition to the individual edge detection circuits and the individual coefficient multipliers that are the constituent elements thereof. The N edge processing circuits on the receiving side include a nonlinear circuit of
An emphasis system characterized by comprising individual nonlinear circuits connected in series in addition to its constituent elements, individual edge detection circuits and individual coefficient multipliers.
Day emphasis circuit. 3. In the circuit according to claim 1, on the transmitting side, the sum of the N input television signals that have passed through each of the N edge processing circuits is On the receiving side, the sum of the N received input television signals that have passed through each of the N edge processing circuits on the receiving side is added to the input television signal, and then the sum of the N received input television signals that has passed through each of the N receiving side edge processing circuits is An emphasis/de-emphasis circuit characterized in that it is subtracted from a received input television signal.