JPH05315475A - Resin sealed semiconductor device and manufacturing method thereof - Google Patents
Resin sealed semiconductor device and manufacturing method thereofInfo
- Publication number
- JPH05315475A JPH05315475A JP4120554A JP12055492A JPH05315475A JP H05315475 A JPH05315475 A JP H05315475A JP 4120554 A JP4120554 A JP 4120554A JP 12055492 A JP12055492 A JP 12055492A JP H05315475 A JPH05315475 A JP H05315475A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- semiconductor device
- manufacturing
- sealed
- internal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は液状、柔軟性を有する樹
脂によって封止される樹脂封止半導体装置およびその製
造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-encapsulated semiconductor device encapsulated with a liquid, flexible resin and a method for manufacturing the same.
【０００２】[0002]
【従来の技術】従来、この種の樹脂封止半導体装置は、
例えば特開昭６３−８０５５４号公報に開示され、その
構造を図３に示すように二重（二層）樹脂封止構造とな
っている。2. Description of the Related Art Conventionally, this type of resin-sealed semiconductor device has been
For example, as disclosed in Japanese Patent Laid-Open No. 63-80554, the structure is a double (two-layer) resin sealing structure as shown in FIG.
【０００３】この樹脂封止半導体装置の構成は、アイラ
ンド１の上にＡｇペースト２等によって固着搭載された
半導体素子３、ボンディングヘッド４とリード５との間
を電気的に接続する金属細線６の全体をシリコーン樹脂
発泡体、もしくはエポキシ樹脂などの樹脂発泡体７で覆
ったのち、エポキシ樹脂成形材料などの封止樹脂８で成
形するものである。The structure of this resin-sealed semiconductor device comprises a semiconductor element 3 fixedly mounted on the island 1 by Ag paste 2 or the like, and a metal thin wire 6 for electrically connecting the bonding head 4 and the lead 5. The whole is covered with a silicone resin foam or a resin foam 7 such as an epoxy resin, and then molded with a sealing resin 8 such as an epoxy resin molding material.
【０００４】[0004]
【発明が解決しようとする課題】しかしながら、上記構
成の樹脂封止半導体装置では、硬化時の収縮応力、熱応
力、などにおいて、樹脂発泡体により、半導体素子への
各種応力の緩和を期待していたが、発泡体であるため、
内部中空部に水分が凝集し、半導体装置をプリント基板
等に搭載するにあたり、ベーパリフロー、赤外線リフロ
ーなどの半導体装置の全体を加熱する搭載手段によっ
て、半導体装置が加熱されると、水分が水蒸気化し、高
圧化により封止外殻にクラックが発生するという問題点
があった。However, in the resin-encapsulated semiconductor device having the above structure, it is expected that the resin foam will alleviate various stresses on the semiconductor element due to shrinkage stress, thermal stress, etc. during curing. However, because it is a foam,
When the semiconductor device is heated by the mounting means that heats the entire semiconductor device, such as vapor reflow and infrared reflow, when the semiconductor device is mounted on a printed circuit board or the like, water is vaporized. However, there is a problem that cracks are generated in the sealing outer shell due to high pressure.
【０００５】本発明は、以上述べた樹脂発泡体の内部中
空部に水分が凝集してしまうという問題点を除去するた
め、応力を緩和することができる樹脂によって形成した
信頼性の優れた樹脂封止半導体装置およびその製造方法
を提供することを目的とする。The present invention eliminates the above-mentioned problem that water is agglomerated in the inner hollow portion of the resin foam, and therefore has a highly reliable resin encapsulation formed of a resin capable of relieving stress. A semiconductor device and a method for manufacturing the same are provided.
【０００６】[0006]
【発明が解決するための手段】本発明に係る樹脂封止半
導体装置は、半導体素子などの周辺部を、液状または柔
軟性のある未硬化の状態の部分とこれらの周囲の硬化し
た部分で封止した内部樹脂と、この内部樹脂の外側に形
成した機械的強度に優れた外部樹脂で封止したものであ
る。A resin-sealed semiconductor device according to the present invention seals a peripheral portion of a semiconductor element or the like with a liquid or flexible uncured portion and a hardened portion around these portions. It is sealed with a stopped internal resin and an external resin formed on the outside of the internal resin and having excellent mechanical strength.
【０００７】本発明に係る樹脂封止半導体装置の製造方
法は、半導体素子などの周辺部を、金型、ポッティン
グ、あるいはスプレー等により、液状または柔軟性のあ
る未硬化の状態の内部樹脂で封止する第１の製造工程
と、この内部樹脂の表面部のみ硬化させる第２の製造工
程と、この硬化した内部樹脂の外側に、機械的強度に優
れた外部樹脂で封止する第３の製造工程とを備えたもの
である。In the method of manufacturing a resin-sealed semiconductor device according to the present invention, the peripheral portion of a semiconductor element or the like is sealed with a liquid or flexible uncured internal resin by a mold, potting, spraying or the like. A first manufacturing step of stopping, a second manufacturing step of curing only the surface portion of the internal resin, and a third manufacturing step of sealing the cured internal resin with an external resin having excellent mechanical strength. And a process.
【０００８】[0008]
【作用】本発明は、半導体素子およびその周辺を、各種
応力から保護することができ、しかも機械的強度を向上
することができる。According to the present invention, the semiconductor element and its periphery can be protected from various stresses and the mechanical strength can be improved.
【０００９】[0009]
【実施例】図１は本発明に係る樹脂封止半導体装置の一
実施例を示す断面図である。図において、９は硬化反応
が行なわれない未硬化の状態では液状または柔軟性を保
持し、熱（特定の温度）、光（特定の波長）によって硬
化反応を開始する樹脂、例えばポリエステルアクリレー
ト、エポキシアクリレートなどのＵＶ硬化樹脂などの内
部樹脂であり、外表部のみ硬化反応を進行させ、内部９
ａは未硬化の状態とすることにより、半導体素子３、リ
ードフレーム５のインナーリード５ａ、金線細線６の周
辺はこの未硬化の状態の樹脂である。１０はトランスフ
ァー成形等の封止技術によって内部樹脂９上に封止した
例えばエポキシ樹脂などの外部樹脂である。1 is a sectional view showing an embodiment of a resin-sealed semiconductor device according to the present invention. In the figure, 9 is a resin that retains a liquid state or flexibility in an uncured state where a curing reaction is not performed, and starts a curing reaction by heat (specific temperature) or light (specific wavelength), such as polyester acrylate or epoxy. Internal resin such as UV-curing resin such as acrylate.
Since a is in an uncured state, the semiconductor element 3, the inner lead 5a of the lead frame 5, and the periphery of the thin gold wire 6 are made of this uncured resin. Reference numeral 10 is an external resin, such as an epoxy resin, which is sealed on the internal resin 9 by a sealing technique such as transfer molding.
【００１０】この場合、前記ＵＶ樹脂は、無溶剤型なの
で、溶剤の放出がないので、内部樹脂９や外部樹脂１０
中に、ボイドの発生が無く、水分等の凝集が低減される
ので、耐熱性の向上が期待できるうえ、内部樹脂９は液
状または柔軟性を保持した樹脂状態なので、外部応力に
対しても好適である。In this case, since the UV resin is a solventless type, it does not release the solvent, so that the internal resin 9 and the external resin 10
Since voids do not occur inside and aggregation of water etc. is reduced, heat resistance can be expected to be improved, and since the internal resin 9 is in a liquid or resin state that retains flexibility, it is also suitable for external stress. Is.
【００１１】図２は本発明に係る樹脂封止半導体装置の
製造方法の一実施例を示す要部断面図である。図におい
て、１１および１２は例えば石英等のＵＶ透過性が良好
な材料で作られた上金型および下金型、１３はこの上金
型１１と下金型１２によって形成された金型中空部、１
４はランナー、１５はゲート、１６はＵＶランプであ
る。FIG. 2 is a sectional view of an essential part showing an embodiment of a method of manufacturing a resin-sealed semiconductor device according to the present invention. In the figure, 11 and 12 are an upper mold and a lower mold made of a material having good UV transparency, such as quartz, and 13 is a hollow part of the mold formed by the upper mold 11 and the lower mold 12. 1
4 is a runner, 15 is a gate, and 16 is a UV lamp.
【００１２】まず、半導体素子３をＡｇペースト２など
によって、アイランド１に固着搭載する。そして、金属
薄板をエッチングあるいはプレスなどによって所定のパ
ターンに加工したリードフレーム５と半導体素子３の電
極（図示せず）とを金属細線６によって電気的に導通配
線する。そして、このリードフレーム５を上金型１１と
下金型１２によって挟持する。そして、ＵＶ硬化樹脂を
ランナー１４を介してゲート１５から圧入して金型中空
部１３に注入する。この充填後、ＵＶランプ１６を照射
すると、金型中空部１３の金型表面部に接触するＵＶ硬
化樹脂が硬化反応し、内部樹脂９の外表部が形成され
る。そして、金型から取り出して、トランスファー成形
等の封止技術によって、外部樹脂１０を形成する。そし
て、不要リード部を除去したのち、プレス等の技術によ
って折り曲げ加工し、リード５を形成する。First, the semiconductor element 3 is fixedly mounted on the island 1 by Ag paste 2 or the like. Then, the lead frame 5 obtained by processing the thin metal plate into a predetermined pattern by etching or pressing and the electrode (not shown) of the semiconductor element 3 are electrically connected by the fine metal wire 6. Then, the lead frame 5 is sandwiched between the upper mold 11 and the lower mold 12. Then, the UV curable resin is press-fitted from the gate 15 via the runner 14 and injected into the mold hollow portion 13. After this filling, when the UV lamp 16 is irradiated, the UV curable resin contacting the mold surface of the mold hollow portion 13 undergoes a curing reaction to form the outer surface of the inner resin 9. Then, it is taken out of the mold and the external resin 10 is formed by a sealing technique such as transfer molding. Then, after removing the unnecessary lead portion, the lead 5 is formed by bending by a technique such as pressing.
【００１３】なお、樹脂封止半導体装置の外形について
は、これに限定せず、例えばＤＩＰ、ＰＬＣＣ、ＴＳＯ
Ｐ等の形状の樹脂封止半導体装置であってもよいことは
もちろんである。The outer shape of the resin-encapsulated semiconductor device is not limited to this. For example, DIP, PLCC, TSO
Needless to say, it may be a resin-sealed semiconductor device having a shape such as P.
【００１４】また、上述の実施例では、トランスファ成
形技術を用いたが、これに限定せず、ポッティングある
いは要部にスプレー等によって要部に熱あるいは光硬化
性樹脂を形成し、樹脂封止してもよいことはもちろんで
ある。Further, although the transfer molding technique is used in the above-mentioned embodiment, the present invention is not limited to this, and a heat or photo-curable resin is formed on the main part by potting or spraying on the main part, and the resin is sealed. Of course it is okay.
【００１５】[0015]
【発明の効果】以上詳細に説明したように、本発明に係
る樹脂封止半導体装置およびその製造方法によれば、半
導体素子周辺部が液状または柔軟性のある部分とそれら
の周囲は硬化が促進された部分からなる内部樹脂で形成
し、さらにその外側に、機械的強度に優れた外部樹脂を
封止したので、半導体素子の周辺を各種応力から保護す
ることができ、しかも水分等の凝集を低減することがで
きるなどの効果がある。As described in detail above, according to the resin-encapsulated semiconductor device and the method of manufacturing the same according to the present invention, curing is promoted in a liquid or flexible portion around the semiconductor element and in the periphery thereof. It is made of an internal resin consisting of the above-mentioned parts, and the outside is sealed with an external resin with excellent mechanical strength, so it is possible to protect the periphery of the semiconductor element from various stresses and to prevent condensation of moisture and the like. There is an effect that it can be reduced.
【図１】本発明に係る樹脂封止半導体装置の一実施例を
示す断面図である。FIG. 1 is a sectional view showing an embodiment of a resin-sealed semiconductor device according to the present invention.
【図２】本発明に係る樹脂封止半導体装置の製造方法の
一実施例を示す要部断面図である。FIG. 2 is a cross-sectional view of essential parts showing an embodiment of a method of manufacturing a resin-encapsulated semiconductor device according to the present invention.
【図３】従来の樹脂封止半導体装置を示す断面図であ
る。FIG. 3 is a cross-sectional view showing a conventional resin-sealed semiconductor device.
９ 内部樹脂 ９ａ 内部樹脂の内部 １０ 外部樹脂 １１ 上金型 １２ 下金型 １３ 金型中空部 １４ ランナー １５ ゲート １６ ＵＶランプ 9 Inner Resin 9a Inside of Inner Resin 10 Outer Resin 11 Upper Mold 12 Lower Mold 13 Mold Hollow 14 Runner 15 Gate 16 UV Lamp
Claims (4)
造の樹脂封止半導体装置において、 半導体素子などの周辺部を液状または柔軟性のある未硬
化の状態の部分とこれらの周囲の硬化した部分で封止し
た内部樹脂と、 この内部樹脂の外側に形成した機械的強度に優れた外部
樹脂で封止したことを特徴とする樹脂封止半導体装置。1. A resin-encapsulated semiconductor device having a double resin encapsulation structure using a lead frame, wherein a peripheral portion of a semiconductor element or the like is cured in a liquid or flexible uncured portion and the periphery thereof. A resin-encapsulated semiconductor device, characterized in that it is encapsulated with an internal resin that is sealed with a portion and an external resin that is formed on the outside of the internal resin and that has excellent mechanical strength.
ティング、あるいはスプレー等により、液状または柔軟
性のある未硬化の状態の内部樹脂で封止する第１の製造
工程と、 この内部樹脂の表面部のみ硬化させる第２の製造工程
と、 この硬化した内部樹脂の外側に、機械的強度に優れた外
部樹脂で封止する第３の製造工程とを備えたことを特徴
とする樹脂封止半導体装置の製造方法。2. A first manufacturing step for sealing a peripheral portion of a semiconductor element or the like with a liquid or flexible uncured internal resin by a mold, potting, spraying or the like, and the internal resin. A resin encapsulation characterized by comprising a second manufacturing step of curing only the surface portion of the resin and a third manufacturing step of sealing the cured inner resin with an external resin having excellent mechanical strength. Method for manufacturing semiconductor device.
を特徴とする請求項１記載の樹脂封止半導体装置。3. The resin-encapsulated semiconductor device according to claim 1, wherein the internal resin is a UV curable resin.
とを特徴とする請求項２記載の樹脂封止半導体装置の製
造方法。4. The method of manufacturing a resin-sealed semiconductor device according to claim 2, wherein the mold is formed of a UV transparent member.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4120554A JPH05315475A (en) | 1992-05-13 | 1992-05-13 | Resin sealed semiconductor device and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4120554A JPH05315475A (en) | 1992-05-13 | 1992-05-13 | Resin sealed semiconductor device and manufacturing method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05315475A true JPH05315475A (en) | 1993-11-26 |
Family
ID=14789185
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4120554A Pending JPH05315475A (en) | 1992-05-13 | 1992-05-13 | Resin sealed semiconductor device and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05315475A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09260567A (en) * | 1996-03-19 | 1997-10-03 | Nec Corp | Resin sealed semiconductor device |
| JP2001332663A (en) * | 2000-05-24 | 2001-11-30 | Mitsui High Tec Inc | Binder for mounting flip chip and manufacturing method for semiconductor device using the same |
| WO2019171923A1 (en) * | 2018-03-09 | 2019-09-12 | オムロン株式会社 | Method for manufacturing resin structure and resin structure |
-
1992
- 1992-05-13 JP JP4120554A patent/JPH05315475A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09260567A (en) * | 1996-03-19 | 1997-10-03 | Nec Corp | Resin sealed semiconductor device |
| JP2001332663A (en) * | 2000-05-24 | 2001-11-30 | Mitsui High Tec Inc | Binder for mounting flip chip and manufacturing method for semiconductor device using the same |
| WO2019171923A1 (en) * | 2018-03-09 | 2019-09-12 | オムロン株式会社 | Method for manufacturing resin structure and resin structure |
| JPWO2019171923A1 (en) * | 2018-03-09 | 2021-03-18 | オムロン株式会社 | Manufacturing method of resin structure and resin structure |
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