JPH05304337A - Manufacture of semiconductor elements - Google Patents

Abstract

PURPOSE: To enable manufacturing by a simple process and improve the oscillation efficiency of an obtd. ridge waveguide laser element by forming ridges, using a metallic layer as a mask and also forming regions swollen from bases. CONSTITUTION: This method comprises forming planar wiring layers 7, 8 on bases 1, 3, 4, 5, which form dielectric layers 9-11 first on this surface and then resist films thereon. There are provided windows through the resist films, the dielectric layers 9-11 are etched through the windows to expose planar semiconductor layer 8, and the dielectric layers 9-11 are removed in forms creeping along the resist films, metallic layers 14, 15 are deposited in the form of windows on the exposed surface of the semiconductor layer 8. The resist films are removed and metals deposited thereon, and the planar semiconductor layers 7, 8 are etched, using the metallic layers 14, 15 as masks so as to leave ridges 7", 8" swollen from the surfaces of the bases 1, 3, 4, 5 at these regions.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to semiconductor devices. In particular, it relates to a ridge waveguide optical element such as a ridge waveguide laser element. The ridge waveguide is a thin film waveguide, and has a shape in which a specific narrow band-shaped region along the surface has a waveguiding action and the region is raised with respect to other portions. The ridge waveguide can be formed by etching or selective growth.

[0002]

2. Description of the Related Art A semiconductor laser device has a structure of pn in which a current is passed from a p-type semiconductor region to an n-type semiconductor region.
It comprises a junction and an "active region" that stimulates the emission of photons by the combination of electrons and holes. The active region has a suitable bandgap and has a different index of refraction than other semiconductor portions in order to "confine" the photons appropriately during stimulated emission. The layers on either side of the active region are called "confinement layers".

Semiconductor laser devices are mainly used in optical fiber communication devices. The silicon dioxide optical fiber manufactured in recent years has a minimum loss at a wavelength of approximately 1.3 μm or 1.55 μm, and the latter has a smaller loss.
Therefore, there is a particular need for devices that operate in the 1.1 to 1.65 μm range, and even 1.3 to 1.6 μm. These wavelengths are wavelengths in vacuum unless otherwise specified. A semiconductor laser device that operates in the infrared region usually has a region of indium phosphide InP and a quaternary material of indium gallium arsenide phosphide In _x Ga _1-x A.
s _y P _1-y region. By selecting x and y, it is possible to form regions having different band gaps while keeping the lattice constant constant. The band gap can be experimentally measured by, for example, photoluminescence. Furthermore, p-type or n-type impurities can be added to indium phosphide and indium gallium arsenide phosphide.

A semiconductor laser device having a gallium aluminum arsenide region and a gallium arsenide region can also be used for communication. The operating wavelength is around 0.9 μm.

The ridge waveguide laser device is described in, for example, "Electronics Letters" by Kaminow and coworkers.
tters) ", Volume 15 (1979), pp. 763-7.
Page 65, "Electronics Letters" Volume 17 (1
981), pp. 318-320, "Electronic Letters," Vol. 19 (1983), 877.
See pages to page 879 for details. The ridge of the ridge waveguide laser device serves to confine the lateral light beam.
However, the ridge structure used by Kamino and co-workers provides a window in the dielectric layer that covers the ridge and the trenches on either side of the ridge, through which the electrodes of the ridge are attached. Therefore, as the ridge becomes narrower, the oscillation efficiency of the device tends to decrease. In principle, the lateral confinement efficiency of the ridge waveguide laser device can be further increased.

[0006] West German Patent Publication No. 24 22 287 filed by Siemens discloses an example in which a window is formed in a proton-irradiated semiconductor material and a ridge electrode is formed through this window. However, even in this structure, the narrower the ridge, the lower the oscillation efficiency of the device.

The ridge waveguide device has an advantage that a high modulation speed can be obtained. In this regard, in particular, the above-mentioned 1983 document is detailed. The ability to obtain a high modulation speed enables high-speed data transmission with an equivalent configuration.

Control of the "longitudinal" mode is also an important factor when considering the structure of the semiconductor laser device. Typical semiconductor laser devices tend to operate in multiple longitudinal modes corresponding to different output wavelengths. By contrast, telecommunications and other applications often require the laser output to be concentrated in a very narrow wavelength range. In the case of long-distance communication using a silicon dioxide fiber, the dispersion within the fiber is very large compared to the wavelength near 1.3 μm.
Control of the longitudinal mode is particularly important for communication at wavelengths near μm. A Fabry-Perot laser element is known as a laser element whose wavelength can be controlled. But,
It is practically difficult to integrate the Fabry-Perot laser device in the optical integrated circuit.

Control of the longitudinal mode is possible by using a diffraction grating. A distributed feedback laser device is known as a laser device using a diffraction grating. GHBThompson for distributed feedback laser device
Willie published "Semicond Laser (Semicond
uctor lasers) ”. In the distributed feedback laser device, a pn junction through which a current flows is provided below or above the diffraction grating. On the other hand, in the Bragg reflection type laser element (distributed reflection type laser element), the pn junction is not provided under the grating. Where "below",
The terms “up”, “upward”, “high” and the like refer to relative directions, not to spatial directions of elements.

Some examples of buried heterostructure distributed feedback laser devices are described in Utake et al., "Electronic Letters", Vol. 17 (1981), 961.
Pp. 963, Itaya et al., "Electronic Letters," Vol. 18 (1982), 1006 to 1008, Kitamura et al., "Electronic Letters," Vol. 19 (1983), 840. 841
It is described on the page. The embedded heterostructure enables lateral optical confinement and realizes laser oscillation with a low threshold current. A stable oscillation in a single longitudinal mode is observed at an output of about 38 mW. However, in order to form a buried heterostructure, a complex process of accurate growth and etching is involved. Therefore, it is not possible to manufacture a good element with high yield. further,
The buried heterostructure is provided with a layer for preventing reverse current, but this layer becomes a parasitic capacitance and limits the modulation speed.

[0011]

SUMMARY OF THE INVENTION The present invention provides a method of manufacturing a semiconductor device for reducing or solving the above problems and for manufacturing a semiconductor laser device which is easy to manufacture and has a high modulation speed. With the goal.

[0012]

A method of manufacturing a semiconductor device according to the present invention is a method of manufacturing a semiconductor device, wherein a ridge having a shape raised from the surface of the base is formed on a base formed of a semiconductor material. A first step of forming a planar semiconductor layer on the base, a second step of first forming a dielectric layer and then a resist film on the surface of the planar semiconductor layer, and a step of forming a window in the resist film. Three steps,
By etching the dielectric layer through this window,
A fourth step of exposing the surface of the planar semiconductor layer and removing the dielectric layer in a shape that wraps around the resist film, and depositing a metal layer in the shape of the window on the surface of the planar semiconductor layer exposed by the fourth step. And a sixth step of removing the resist film and the metal deposited thereon, and the planar semiconductor layer so that the ridge remains in the region using the metal layer formed in the fifth step as a mask. And a seventh step of etching.

A distributed feedback grating is preferably formed in the upper layer of the base. In this case, it is formed so that the angle between the waveform of the distributed feedback grating and the ridge is substantially right. The distributed feedback grating may extend into or under the ridge for convenient manufacturing.

In the seventh step, it is desirable that the dielectric layer left unetched in the fourth step be used as a mask to form a raised portion from the base in the region separating the ridge and the groove.

The width of the ridge is preferably 15 μm or less.

It is desirable to provide a boundary between the base portion and the ridge portion by using materials having different etching rates. In this case, the boundary is preferably formed between gallium indium arsenide phosphide and indium phosphide.

[0017]

In the method of the present invention, since the ridge is formed using the metal layer as a mask, it is not necessary to newly provide the metal layer for the electrode on the surface of the ridge. Further, when the ridge is formed, a region having a raised shape from the base portion can be formed simultaneously with the ridge, so that the strength of the element after manufacturing can be increased by using the region. This region is hereinafter referred to as "reinforcing portion".

A method of undercutting a region underneath a window of a resist into a shape surrounding the resist, depositing a metal layer through the window and then removing the resist and the metal on its surface is described in British Patent First 1,475
This is equivalent to the contents disclosed in the specification and drawings of No. 884. However, this patent is for manufacturing a magnetic bubble memory, and the object to be manufactured is completely different from the present invention.

The ridge is provided with electrodes on its surface and limits the range of current flow to the base. In addition, the base has the effect of optical confinement directly. In order to obtain a sufficient confinement effect, it is appropriate that the width of the ridge is narrower than 15 μm, preferably 10 μm or less,
Further, it is desirable that the width is narrower than 5 μm. In general,
This width is 1 μm or more, usually 2 μm or more. When the width is narrowed like this, the strength of the ridge becomes a problem, but when the metal layer on the ridge is attached to the electrode and the heat sink (heat sink), the ridge and the reinforcing portion provided by separating the groove from the electrode and The ridge can be reinforced by contact with the heat reservoir. Since the dielectric layer remains on the surface of the reinforcing portion, the current flowing in the base portion can be limited to the ridge region.

In addition to the dielectric layer, a metal layer may be further provided on the reinforcing portion. This metal layer does not make electrical contact with the semiconductor. The semiconductor element is attached to a copper stud or the like, and this is used as a heat sink and an electrode to supply an electric current only to the ridge region. The metal layer on the reinforcing portion is for facilitating this attachment. Is.

When the dielectric layer and the resist film are formed on the surface of the planar semiconductor layer, a metal layer may be further provided between them. In this way, when etching leaving the ridge and the reinforcing portion, it works as an effective mask.

Good adhesion can be achieved by providing two metal layers on the dielectric layer above the reinforcement, for example titanium and gold on top of it, or zinc and gold on top of it.

The semiconductor device manufactured by the present invention is an optical device, and is provided with an active layer of a semiconductor material and confinement layers for confining laser light on the upper side and the lower side thereof, respectively. Depending on the semiconductor material used, the ridge can also be used as the confinement layer. In that case, the confinement layer may be removed from the base. Further, if possible, the active layer and one or both confinement layers may be provided in the ridge rather than in the base.

In the case of providing the corrugated distributed feedback grating, it is provided on the interface above or below the active layer where the refractive index becomes discontinuous, particularly on the outer surface of the confinement layer. It is particularly convenient to provide the corrugations of the distributed feedback grating on the surface above the upper confinement layer.

The materials for the base are In
It is suitable to use a P, InGaAsP lower confinement layer, an InAsAsP active layer and an InGaAsP upper confinement layer. The ridge portion is I in order from the base side.
nP layer and heavily doped InGaAs or In
It is desirable to be composed of a GaAsP layer. The upper layer is for low electrical resistance connection to the metal.

[0026]

1 to 5 are sectional views of the same plane showing stepwise a manufacturing process of the first embodiment of the present invention, and FIG. 6 is a sectional view of a portion above a final device. These figures are drawn schematically for the sake of understanding, and the enlargement ratio does not always match the actual device.

FIG. 1 shows the first step of the manufacturing method.

As the substrate, n ⁺ type 100 indium phosphide InP having a thickness of 200 μm and heavily doped with sulfur S
Using the substrate 1, on the 100 face 2 of this InP substrate 1,
By liquid phase epitaxy, three quaternary materials (in the figure, Q
Layer), that is, gallium indium arsenide phosphide Ga
InAsP layers 3, 4, and 5 were sequentially grown to a thickness of 0.2 μm. The GaInAsP layer 3 is an n-type doped with tellurium Te, and its composition ratio is Ga _0.17 In _0.83.
As _0.36 P _0.64 , and its band gap was a value corresponding to a wavelength of 1.15 μm as measured by photoluminescence. The GaInAsP layer 4 is an intrinsic semiconductor not doped with impurities, and its composition ratio is Ga _0.39 I
n _0.61 As _0.88 P _0.12 with a band gap of 1.5
It was 2 μm. The GaInAsP layer 5 is the same as the GaInAsP layer 3 except that it is a p-type doped with zinc. As will be described later in detail, the GaInAsP layer 4
Will be the active layer in the final device. In addition, GaInA
The sP layers 3 and 5 become the upper and lower confinement layers (“buffer layers”).

Next, the corrugated layer 6 was formed by chemically etching the GaInAsP layer 5 using a resist mask irradiated with an electron beam to form a distributed feedback grating. This method is described in Westbrook et al., "Electronics Letters," Vol. 18 (198).
2 years), pages 863 to 865.
The wavy period of the distributed feedback grating is

[0030]

[Outer 1] A mask having a period of 0.46 μm was formed in the direction. Since this chemical etching is anisotropic etching, 1
The etching rate for the 11A plane is very low. Therefore, a triangular groove whose side is 111A is formed,
Therefore, the progress of etching is limited. The depth of the groove is approximately 0.16 μm. Since the progress of etching is automatically limited, the reproducibility is good and the intensity of laser feedback can be controlled.

On the wavy GaInAsP layer 5, a p-type InP layer 7 doped with zinc Zn was grown by atmospheric pressure metal organic chemical vapor deposition (MOCVD). The integrity of the lattice was maintained by known means. This means is described in European Patent Application No. 84.30024.
0.3 and Nelson et al., Electronics Letters, Vol. 19 (1983), pages 34-36. To do this, 100 ° C
At this point, trimethylindium, triethylphosphorus, dimethylzinc, phosphoric acid, and hydrogen were passed over the sample, after which the sample was rapidly heated to 650 ° C. for growth. In
The thickness of the P layer 7 was about 1.5 μm.

Next, by MOCVD again, the p ⁺ -type InGaAs layer 8 doped with a large amount of zinc Zn is deposited to about 0.1.
It was grown to a thickness of μm. The InGaAs layer 8 is a ternary material (indicated by T in the figure) and has a composition ratio of In.
It was _0.53 Ga _0.47 As.

To complete the structure of FIG. 1, a thickness of 0.2 μm was obtained by chemical vapor deposition using silane and oxygen.
Silicon dioxide SiO ₂ layer 9 was grown on the InGaAs layer 8.

Thereafter, the InP substrate 1 is thinned to 100 μm by chemical etching, and the back electrode of the laser (that is, the lower electrode of the thinned InP substrate 1) is replaced with tin Sn.
And gold Au were vapor-deposited.

FIG. 2 shows a step subsequent to the step shown in FIG.

In this step, first, the titanium Ti layer 10 having a thickness of 0.1 μm and the gold Au layer 11 having a thickness of 0.1 μm are formed on the SiO ₂ layer.
Deposited on layer 9. Next, a positive resist (Kodak 820) having a thickness of about 1 μm is applied on the Au layer 11, and the strip-shaped window 13 is formed so that the strip-shaped portion perpendicular to the diffraction grating is removed.
Is irradiated with light to leave the resists 12 and 12 ', which is used as a mask. 2 μm, 4 μm, 6 μm and 15 μm strip-shaped windows 13 on one wafer
It was formed with a width of m.

FIG. 3 shows the next step further.

The structure obtained by the above steps was treated with a solution of 4 g of potassium iodide and 1 g of iodine in 40 ml of water at 20 ° C. for 1 to 1.5 minutes.
This solution etches the Au layer 11. Then, the Ti layer 10 and the SiO ₂ layer 9 were etched by a “countdown silicon dioxide etch (10: 1)” at 20 ° C. for 2 to 2.5 minutes. As a result, InGaA
The upper part of the s layer 8 is undercut. A Ti wire and an Au wire are heated and vapor-deposited on the exposed semiconductor (I
The window-shaped Ti layer 14 and Au are formed on the nGaAs layer 8).
Layer 15 was formed. At the same time, Ti layers 16, 16 ', Au
Layers 17, 17 'were deposited on the resists 12, 12'. The Ti and Au wire filaments were 10 cm away from the target and the thickness of each deposited metal was about 0.1 μm.

The structure thus obtained was added to acetone to obtain 2 parts.
It was dipped for a minute, and the resists 12 and 12 'were removed. Ti layers 16, 16 ', Au layer 1 along with resists 12, 12'
7, 17 'were also removed.

FIG. 4 shows the structure obtained by the above steps.

In this structure, a metal layer (Ti layer 14 and Au layer 15) and two dielectric layers (SiO ₂ layers 9, 9 ') separated from this layer are formed. On top of these two dielectrics, in this case a Ti layer 10,
An Au layer 11, a Ti layer 10 ', and an Au layer 11' are formed. The distance between the metal layer and the edge of the dielectric layer is about 4μ
m.

This structure was treated with 16% by weight of iodic acid (H
It was treated with an aqueous solution of IO ₃ ) for 20 seconds to 1 minute. This solution reacts with the InGaAs layer 8. Then, add concentrated hydrochloric acid and 9
A mixture of 0% orthophosphoric acid (H ₃ PO ₅ ) in a volume ratio of 1: 1 was treated at 20 ° C. for 30 to 40 seconds. This mixed liquid hardly reacts with the GaInAsP layer 8 and
Reacts with layer 7.

FIG. 5 shows the structure obtained by the above steps.

In FIG. 5, InGaAs layer 8 and InP are formed.
The sidewalls of layer 7 are shown as vertically etched. However, it is not vertical in reality. Corresponding to the terms used in the “Means for Solving Problems” section and the “Operation” section, the base is made of InP substrate 1 and GaI.
It is composed of nAsP layers 3, 4, and 5. The ridge of the laser device is composed of an InP layer 7 ″ and an InGaAs layer 8 ″. The reinforcing portion is composed of InP layer 7 and InGaAs layer 8, InP layer 7'and InGaAs layer 8 '. An electrode composed of a Ti layer 14 and an Au layer 15 is provided on the ridge, and dielectric SiO ₂ layers 9 and 9'are provided on other portions. Inside the grooves 20, 21,
Substantially no dielectric or metal layer is provided.

FIG. 6 shows an example of a semiconductor device obtained by the above steps.

As in the conventional semiconductor device manufacturing method, all the above-mentioned steps were performed on one wafer to divide it into a plurality of devices. The semiconductor element shown in FIG. 6 is an example of a separated element. In FIG. 6, in order to clarify the relative directions of the ridge and the distributed feedback grating, the reinforcing portion is omitted. The end face 18 of the device is a cleaved facet, and the other three faces such as the facet 19 are faces cut to suppress Fabry-Perot laser modes other than the mode selected by the distributed feedback grating. The slope of the side of the ridge in FIG. 6 is arbitrarily drawn. In fact, as shown in the scanning electron microscope image of FIG. 7, it is inclined in the opposite direction.

This semiconductor element was brazed with indium on the rectangular surface of a gold-plated semi-cylindrical stud. The stud is used as an electrode and at the same time as a heat reservoir. “Upper”, ie Au layers 11, 1
5, 11 'are connected by brazing. But S
It is the portion of the ridge, ie, InP, that is electrically connected to the stud because it is insulated by the iO ₂ layers 9 and 9 '.
Only layer 7 "and InGaAs layer 8". Groove 20,
Indium does not flow into 21. Metallization is applied to the lower side of the base portion, that is, the back surface, and the back surface electrode is brazed thereto.

FIG. 8 shows the current vs. continuous wave light output characteristics of the prototype semiconductor device.

As a test of the semiconductor element, a positive voltage was applied between the stud and the back electrode, and the output light from the cleaved end face 18 was observed. FIG. 8 shows the result of continuous oscillation at 20 ° C. using a semiconductor element having a length of 300 μm and a ridge width of 2 μm. The threshold current was about 45 mA. The highest differential quantization efficiency is 2 from one side.
It was 7%. The maximum continuous oscillation output was about 15 mW.

FIG. 9 shows a continuous wave emission spectrum of this semiconductor device.

As shown in FIG. 9, a complete single longitudinal mode laser output corresponding to a wavelength in the vicinity of 1.48 μm was obtained. Even when the excitation current and the laser beam output power increased, the spectrum did not change except for the gradual shift of the output wavelength with the temperature rise of the active layer.

FIG. 10 shows an oscilloscope waveform obtained by preliminary response speed measurement of this semiconductor device.

Preliminary response speed measurements were performed in order to investigate the tendency of the response speed of this semiconductor device. In this response speed measurement, a threshold current is supplied to the semiconductor device to be measured in advance, and a short (about 3 ns) 50 mA current pulse is applied for 5 seconds.
Supplied via a 0 Ω wire. This pulse is from 10 to 9
The rise time to 0% and the fall time from 90 to 10% are about the same, less than 200 ps. An InGaAs PIN photodiode was used to detect the laser light output. About this measurement method, Moss (RHMoss),
"British Telecom Journal (British Te
lecom Jurnal), Vol. 1 (1983), pp. 7-22. In the oscilloscope waveform of FIG. 10, the fall time from 90% to 10% is shorter than 750 ps. This value is much higher than the limit of the maximum value of the essential performance of the semiconductor device manufactured according to the present invention, since the electrode connection is not perfect and no measures are taken to compensate for this. On the other hand, when a similar measurement was performed using a Fabry-Perot laser element of a double channel planar embedded heterostructure that outputs a laser beam of long wavelength,
The fall time was 1 ns or more. Therefore, the response speed of the distributed feedback laser device manufactured by the method of the present invention is expected to be very high.

As a second embodiment of the present invention, a Fabry-Perot ridge waveguide laser device was prepared in the same manner as the first embodiment. However, in the second example, the distributed feedback lattice was not provided, and liquid phase epitaxial was used for growth of all semiconductor layers. On the other hand, in the first embodiment, MOCVD was used to prevent damage of the distributed feedback wave type.

The characteristics of the laser were measured in the same manner as in the first embodiment, and the results are shown in FIGS. 11 and 12.

FIG. 11 is a diagram showing the light output characteristics of the device with respect to current, and FIG. 12 shows the emission spectrum of the device.

As is apparent from FIG. 12, some modes due to the absence of the distributed feedback grating were observed.

[0058]

As described above, the method of the present invention is
A semiconductor element having a ridge waveguide can be manufactured by a simple process, and the oscillation efficiency of the obtained ridge waveguide laser element can be improved. Since the manufacturing method of the method of the present invention is simple, the semiconductor device can be manufactured at low cost.

Therefore, the semiconductor device according to the present invention is
It has a great effect when used as a light source for optical fiber communication.

[Brief description of drawings]

FIG. 1 is a sectional view showing a first step in a manufacturing method according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view showing the manufacturing process of the first embodiment.

FIG. 3 is a cross-sectional view showing the manufacturing process of the first embodiment.

FIG. 4 is a cross-sectional view showing the manufacturing process of the first embodiment.

FIG. 5 is a sectional view of a semiconductor device obtained according to the first embodiment.

FIG. 6 is a perspective view of a prototype semiconductor device.

FIG. 7 is a view showing a scanning electron microscope image of a prototype semiconductor device.

FIG. 8 is a diagram showing current vs. continuous light output characteristics of a prototype semiconductor device.

FIG. 9 is a diagram showing a continuous output spectrum of a prototype semiconductor device.

FIG. 10 is a diagram showing an oscilloscope waveform of the response speed of a prototype semiconductor device.

FIG. 11 is a diagram showing current vs. continuous light output characteristics of the semiconductor device obtained in the second embodiment.

FIG. 12 is a diagram showing a continuous output spectrum of this semiconductor device.

[Explanation of symbols]

1 InP substrate 2 100 plane 3, 4, 5 GaInAsP layer 6 corrugated layer 7,7 ', 7 "InP layer 8,8', 8" InGaAs layer 9, 9 'SiO ₂ layer 10,10'14,16,16 ′ Ti layer 11, 11 ′ 15, 17, 17 ′ Au layer 12, 12 ′ Resist 18 End face 19 Face

 ─────────────────────────────────────────────────── ───Continued from the front page (72) Inventor Leslie David Westbrook Suffolk Ipswatch Trim, UK, Lay St. Mary Dyne's Place No. 26 (72) Inventor Andrew William Nelson UK, IP 11, 9 SSF Suffolk Felix Stoekendal Green 13

Claims (6)

[Claims] 1. A method of manufacturing a semiconductor device, comprising: forming a ridge having a raised shape from a surface of a base portion on a base portion formed of a semiconductor material; and forming a planar semiconductor layer on the base portion. A second step of first forming a dielectric layer and then a resist film on the surface of the planar semiconductor layer, a third step of providing a window in the resist film, and the dielectric film layer through the window. A fourth step of exposing the planar semiconductor layer by etching and removing the dielectric layer into a shape that wraps around the resist film, and the window on the surface of the planar semiconductor layer exposed by the fourth step. Fifth step of depositing a metal layer in the shape of, a sixth step of removing the resist film and the metal deposited thereon, and the region using the metal layer as a mask The method of manufacturing a semiconductor device characterized in that it comprises a seventh step of etching the planar semiconductor layer as the ridge remains. 2. The method for manufacturing a semiconductor device according to claim 1, wherein a distributed feedback grating is formed in a layer above the base. 3. In the seventh step, the dielectric layer left unetched in the fourth step is used as a mask to form a raised portion from the base in a region separating the ridge and the groove. 1. The method for manufacturing a semiconductor device according to 1 or 2. 4. The method for manufacturing a semiconductor device according to claim 1, wherein the width of the ridge is 15 μm or less. 5. The method of manufacturing a semiconductor device according to claim 1, wherein a boundary is provided between the base portion and the ridge portion by using materials having different etching rates. 6. The method for manufacturing a semiconductor device according to claim 5, wherein the boundary is formed between gallium indium arsenide phosphide and indium phosphide.