JPH0529485A - Integrated circuit package - Google Patents
Integrated circuit packageInfo
- Publication number
- JPH0529485A JPH0529485A JP3206575A JP20657591A JPH0529485A JP H0529485 A JPH0529485 A JP H0529485A JP 3206575 A JP3206575 A JP 3206575A JP 20657591 A JP20657591 A JP 20657591A JP H0529485 A JPH0529485 A JP H0529485A
- Authority
- JP
- Japan
- Prior art keywords
- cap
- integrated circuit
- heat
- circuit package
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、論理回路等より成るＩ
Ｃを搭載する集積回路パッケージに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to I
The present invention relates to an integrated circuit package including C.
【０００２】[0002]
【従来の技術】従来、この種の集積回路パッケージは、
ＩＣチップを搭載しており、ＩＣチップによる発熱はパ
ッケージ等で放熱していた。あるいはまた、消費電力の
大きい集積回路の場合は、放熱量も多いので、ヒートシ
ンクを集積回路パッケージに接着するなどして装着さ
せ、放熱効果をもたらせていた。2. Description of the Related Art Conventionally, this type of integrated circuit package has been
The IC chip is mounted, and the heat generated by the IC chip is dissipated by the package or the like. Alternatively, in the case of an integrated circuit that consumes a large amount of power, a large amount of heat is dissipated. Therefore, a heat sink is attached to the integrated circuit package by adhering it to provide a heat dissipation effect.
【０００３】[0003]
【発明が解決しようとする課題】しかしながら、上述し
た従来の集積回路パッケージにあっては、パッケージ自
体で放熱するものでは放熱効果が少ないので、集積回路
の性能低下につながる。また、放熱促進のためにヒート
シンクを装着させたものでは、集積回路パッケージにヒ
ートシンクを接着させる工程において集積回路パッケー
ジを高温にしなければならないので、集積回路に悪影響
を及ぼす。しかも、ヒートシンクを装着する手間もかか
り、形状も大きなものになってしまうという問題があっ
た。However, in the above-described conventional integrated circuit package, the heat dissipation effect of the package itself is small, so that the performance of the integrated circuit is deteriorated. Further, in the case where a heat sink is mounted to accelerate heat dissipation, the integrated circuit package must be heated to a high temperature in the step of bonding the heat sink to the integrated circuit package, which adversely affects the integrated circuit. Moreover, there is a problem in that it takes time and effort to mount the heat sink and the shape becomes large.
【０００４】本発明は上記の問題点にかんがみてなされ
たもので、別異のヒートシンクを装着しなくても放熱作
用の向上を図ることができる集積回路パッケージの提供
を目的とする。The present invention has been made in view of the above problems, and an object of the present invention is to provide an integrated circuit package capable of improving the heat radiation action without mounting a different heat sink.
【０００５】[0005]
【課題を解決するための手段】上記目的を達成するため
本発明の集積回路パッケージは、基板にＩＣを実装し、
このＩＣ実装部分を封止した集積回路パッケージにおい
て、前記ＩＣ実装部分を封止する封止面とＩＣ実装部分
の熱を放熱させる放熱面とを有したＩＣキャップを備え
た構成としてある。In order to achieve the above object, an integrated circuit package of the present invention has an IC mounted on a substrate,
The integrated circuit package with the IC mounting portion sealed has an IC cap having a sealing surface for sealing the IC mounting portion and a heat radiation surface for radiating heat of the IC mounting portion.
【０００６】そして、必要に応じ、上記ＩＣキャップは
多数の凹所を有し、この凹所形成面を放熱面として構成
してある。If necessary, the IC cap has a large number of recesses, and the recess forming surface serves as a heat dissipation surface.
【０００７】[0007]
【作用】上記構成からなる集積回路パッケージによれ
ば、この集積回路パッケージを製作するときは、基板に
ＩＣを実装し、このＩＣ実装部分をＩＣキャップによっ
て封上する。使用時には、ＩＣキャップの放熱面から放
熱が行われる。According to the integrated circuit package having the above structure, when the integrated circuit package is manufactured, the IC is mounted on the substrate and the IC mounting portion is sealed with the IC cap. During use, heat is dissipated from the heat dissipating surface of the IC cap.
【０００８】[0008]
【実施例】以下、本発明の実施例について図面を参照し
て説明する。図１は本発明の一実施例に係る集積回路パ
ッケージ１を示す縦断面図である。Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a vertical sectional view showing an integrated circuit package 1 according to an embodiment of the present invention.
【０００９】図において１は基板であって、中央部にＩ
Ｃチップ３を実装する凹部１０を形成してある。この凹
部１０の開口縁は一般面より突出しており、その上面を
平面に形成している。また、基板１の下面からは接続端
子が突出形成されている。In the figure, reference numeral 1 is a substrate, which has an I
A recess 10 for mounting the C chip 3 is formed. The opening edge of the recess 10 projects from the general surface, and the upper surface thereof is formed into a flat surface. Further, connection terminals are formed so as to project from the lower surface of the substrate 1.
【００１０】ＩＣチップ３は、上記凹部１０中央の実装
部分６に実装され、ボンディングワイヤ４によって接続
されている。ＩＣチップ３の実装部分６は、封止面７と
放熱面８とが一体となったＩＣキャップ２によって封止
されている。ＩＣキャップ２は、図１に示すように、平
板部２ａと該平板部２ａの上面から多数のフィン２ｂを
列設して形成され、平板部２ａの下面が上記凹部１０の
開口縁上面に接合されてＩＣ実装部分６を封止する封止
面７として構成され、フィン２ｂで形成される凹所９の
形成面がＩＣ実装部分６の熱を放熱させる放熱面８とし
て構成されている。The IC chip 3 is mounted on the mounting portion 6 at the center of the recess 10 and is connected by the bonding wire 4. The mounting portion 6 of the IC chip 3 is sealed by the IC cap 2 in which the sealing surface 7 and the heat dissipation surface 8 are integrated. As shown in FIG. 1, the IC cap 2 is formed by arranging a flat plate portion 2 a and a large number of fins 2 b in a row from the upper surface of the flat plate portion 2 a, and the lower surface of the flat plate portion 2 a is joined to the upper surface of the opening edge of the recess 10. Thus, the IC mounting portion 6 is configured as a sealing surface 7, and the surface of the recess 9 formed by the fins 2b is configured as a heat radiating surface 8 for radiating the heat of the IC mounting portion 6.
【００１１】したがって、実施例に係る集積回路パッケ
ージを製作するときは、ＩＣ実装部分６のある凹部１０
をＩＣキャップ２で覆い、その封止面７を凹部１０の開
口縁に接合する。Therefore, when manufacturing the integrated circuit package according to the embodiment, the recess 10 having the IC mounting portion 6 is formed.
Is covered with the IC cap 2, and the sealing surface 7 is joined to the opening edge of the recess 10.
【００１２】この集積回路パッケージを使用した場合に
は、ＩＣチップ３からの発熱はＩＣパッケージ２の放熱
面８から放熱される。このＩＣキャップ２の放熱面８は
多数のフィンｂの凹所９で構成されるので、表面積を最
大にする形状になっており、そのため、放熱効果がより
効率よく行なわれる。When this integrated circuit package is used, heat generated from the IC chip 3 is radiated from the heat radiation surface 8 of the IC package 2. Since the heat dissipation surface 8 of the IC cap 2 is composed of the recesses 9 of the large number of fins b, it has a shape that maximizes the surface area. Therefore, the heat dissipation effect is more efficiently performed.
【００１３】図２は、ＩＣキャップ２の他の例を示す図
である。これは、ブロック状体に多数の貫通孔を列設
し、この貫通孔で形成された凹所９の形成面を放熱面８
としてある。下面は封止面７として構成されている。FIG. 2 is a view showing another example of the IC cap 2. This is because a large number of through holes are provided in a row in a block-like body, and the surface on which the recess 9 formed by these through holes is formed is
There is. The lower surface is configured as a sealing surface 7.
【００１４】図３は、ＩＣキャップ２の別の例を示す図
である。これは、ブロック状体にその表側および裏側か
ら凹所９を多数列設し、この凹所９の形成面を放熱面８
としてある。裏側は封止面７として構成されている。FIG. 3 is a view showing another example of the IC cap 2. This is because a large number of recesses 9 are provided on the block-shaped body from the front side and the back side thereof, and the surface on which the recesses 9 are formed is the heat dissipation surface 8
There is. The back side is configured as a sealing surface 7.
【００１５】なお、ＩＣキャップの上面からの形状は特
定されることはない。The shape of the IC cap from the upper surface is not specified.
【００１６】[0016]
【発明の効果】以上説明したように本発明の集積回路パ
ッケージによれば、放熱面と封止面とを一体にを兼ね備
えたＩＣキャップを装着するのでヒートシンクを別異に
装着しなくても、ＩＣチップから発熱する熱の放熱作用
を得ることができる。また、ヒートシンクを別異に装着
しなくても良いので、製造効率を大幅に向上させること
ができるという効果がある。As described above, according to the integrated circuit package of the present invention, since the IC cap having both the heat radiation surface and the sealing surface is integrally mounted, it is possible to mount the heat sink separately. It is possible to obtain a heat radiation effect of heat generated from the IC chip. Further, since it is not necessary to separately attach the heat sink, there is an effect that the manufacturing efficiency can be significantly improved.
【図面の簡単な説明】[Brief description of drawings]
【図１】本発明の実施例に係る集積回路パッケージを示
す縦断面図である。FIG. 1 is a vertical sectional view showing an integrated circuit package according to an embodiment of the present invention.
【図２】集積回路パッケージの他のＩＣキャップの例を
示す図である。FIG. 2 is a diagram showing another example of an IC cap of an integrated circuit package.
【図３】集積回路パッケージの別のＩＣキャップの例を
示す図である。FIG. 3 is a diagram showing an example of another IC cap of an integrated circuit package.
１ 基板 ２ ＩＣキャップ ３ ＩＣチップ ４ ボンディングワイヤ ５ 接続端子 ６ ＩＣ実装部分 ７ 封止面 ８ 放熱面 ９ 凹所 １０ 凹部 1 substrate 2 IC cap 3 IC chips 4 Bonding wire 5 connection terminals 6 IC mounting part 7 Sealing surface 8 Heat dissipation surface 9 recess 10 recess
Claims (2)
を封止した集積回路パッケージにおいて、前記ＩＣ実装
部分を封止する封止面とＩＣ実装部分の熱を放熱させる
放熱面とを有したＩＣキャップを備えたことを特徴とす
る集積回路パッケージ。1. An integrated circuit package in which an IC is mounted on a substrate and the IC mounting portion is sealed, having a sealing surface for sealing the IC mounting portion and a heat radiating surface for radiating heat of the IC mounting portion. An integrated circuit package comprising the above IC cap.
この凹所形成面を放熱面として構成したことを特徴とす
る請求項１記載の集積回路パッケージ。2. The IC cap has a large number of recesses,
The integrated circuit package according to claim 1, wherein the recess forming surface is formed as a heat dissipation surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3206575A JPH0529485A (en) | 1991-07-23 | 1991-07-23 | Integrated circuit package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3206575A JPH0529485A (en) | 1991-07-23 | 1991-07-23 | Integrated circuit package |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0529485A true JPH0529485A (en) | 1993-02-05 |
Family
ID=16525674
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3206575A Pending JPH0529485A (en) | 1991-07-23 | 1991-07-23 | Integrated circuit package |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0529485A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100461721B1 (en) * | 2002-05-27 | 2004-12-14 | 삼성전기주식회사 | Ceramic package for transfering heat through lid |
| CN100399553C (en) * | 2003-03-25 | 2008-07-02 | Jds尤尼费斯公司 | Heat sink with visible logo |
-
1991
- 1991-07-23 JP JP3206575A patent/JPH0529485A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100461721B1 (en) * | 2002-05-27 | 2004-12-14 | 삼성전기주식회사 | Ceramic package for transfering heat through lid |
| US7053482B2 (en) | 2002-05-27 | 2006-05-30 | Samsung Electro-Mechanics Co., Ltd. | Ceramic package with radiating lid |
| CN100399553C (en) * | 2003-03-25 | 2008-07-02 | Jds尤尼费斯公司 | Heat sink with visible logo |
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