JPH05291499A - Semiconductor device and fabrication thereof - Google Patents

Abstract

PURPOSE:To fabricate a semiconductor device including a double-layered polysilicon capacitance of a structure where withstand voltage and a leakage current characteristic are not deteriorated. CONSTITUTION:A silicon nitride film 18a is deposited on a low resistance first layer polysilicon film 30, on which a thin polysilicon film is deposited, and is doped with phosphorus, and is thereafter thermally oxidized at 900-1100 deg.C for conversion to a silicon oxide film 20a. A low resistance polysilicon film 22a is depsoited on the resulting silicon oxide film 20a. A second layer polysilicon film 22a, the silicon oxide film 20a, and the silicon nitride film 18a are patterned by photolithography and etching. Hereby, there is formed a dielectric composed of an upper electrode 22, the silicon oxide film 20, and a silicon nitride film 1. Successively, the first layer polysilicon film 30 is patterned by photolithography and etching to form a lower electrode 16 of a capacitor and a gate electrode 10 of a MOS transistor. Thereafter, phosphorus and arsenic are doped into a substrate 2 with the gate electrode 10 as a mask to form a source region 12 and a drain region 14.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device including a capacitor having a two-layer polysilicon structure and a manufacturing method thereof.

[0002]

2. Description of the Related Art In a semiconductor integrated circuit device, a two-layer polysilicon capacitor is often used as a capacitor whose capacitance value does not depend on an applied voltage. The two-layer polysilicon capacitor has a lower electrode of 2000 to 4 doped with impurities such as phosphorus.
A relatively thick polysilicon film of 000Å is used. As the capacitor dielectric, it is general to use a polysilicon film of the lower electrode that is partially thermally oxidized to form a silicon oxide film.
It is about 00Å. A polysilicon film doped with impurities is used as the upper electrode. Its film thickness is similar to that of the lower electrode. As a result, a two-layer polysilicon capacitor having a structure in which the upper electrode and the lower electrode are polysilicon films and a silicon oxide film as a dielectric is sandwiched therebetween is formed.

In order to improve the capacitance, withstand voltage and leakage current characteristics, the dielectric has a multi-layer structure in which one layer of silicon oxide film is laminated on the silicon oxide film and a silicon nitride film of approximately the same thickness is laminated. Things are also being done. An example of a method of manufacturing a capacitor in which a dielectric is composed of a silicon oxide film and a silicon nitride film thereon is described in JP-A-213158.

[0004]

When the capacitor dielectric has a multilayer structure in which the lower layer is a silicon oxide film and the upper layer is a silicon nitride film, the dielectric is made thinner to obtain a larger capacitance value, or the conventional structure is used. Even with a dielectric having a film thickness of about 10 μm, the withstand voltage and the leak current characteristic become insufficient when a high voltage of 10 V or more is used. This is for the following reason. That is, as a factor that deteriorates the breakdown voltage and the leakage current characteristic in the two-layer polysilicon capacitor, local electric field concentration occurs due to asperities (unevenness) at the interface between the polysilicon film and its oxide film. Normally, a polysilicon film is deposited at 600 to 650 ° C., but in this temperature range, the polysilicon film has a columnar structure with <110> preferential orientation, and its asperity deteriorates as the film thickness increases. The thickness of the lower electrode is 2000-
If it is relatively thick, such as 4000Å, the asperity will worsen. When phosphorus is diffused into the polysilicon film to reduce the resistance and then the polysilicon film is thermally oxidized, the asperity is further amplified and becomes more remarkable especially at low temperature oxidation. It is an object of the present invention to provide a semiconductor device including a two-layer polysilicon capacitor having a structure in which breakdown voltage and leak current characteristics are not deteriorated by the asperity of a polysilicon film for a lower electrode, and a manufacturing method thereof.

[0005]

The semiconductor device of the present invention comprises:
A silicon nitride film is formed on a lower electrode made of a low resistance polysilicon film, a silicon oxide film is further formed thereon, and an upper electrode made of a low resistance polysilicon film is further formed thereon. A semiconductor device including a capacitor formed by. In a preferred embodiment, the silicon oxide film is a thermal oxide film of an impurity-doped polysilicon film.

The manufacturing method of the present invention includes the following steps (A) to (D). (A) A step of forming a first-layer polysilicon film, which is doped with impurities and has a reduced resistance, on an insulating base, (B) A silicon nitride film is formed thereon, and polysilicon doped with impurities is further formed thereon. A step of forming a film and thermally oxidizing the polysilicon film into a silicon oxide film, and (C) a step of further forming an impurity-doped second low-resistance polysilicon film thereon,
(D) A step of patterning the second-layer polysilicon film, the silicon oxide film, the silicon nitride film and the first-layer polysilicon film by photolithography and etching to form an upper electrode, a dielectric and a lower electrode.

[0007]

In the capacitor of the present invention, the polysilicon film of the lower electrode is not thermally oxidized.
0> Even if the asperity due to the columnar structure having the preferential orientation is deteriorated, the deterioration of the asperity is not further amplified by the thermal oxidation. Since the silicon nitride film exists on the polysilicon film of the lower electrode, the polysilicon film of the lower electrode is not oxidized even in the thermal oxidation step for forming the silicon oxide film of the capacitor, and the asperity is not deteriorated. Suppressed.

[0008]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention is a semiconductor device including a two-layer polysilicon capacitor. When the present invention is applied to a MOS type semiconductor device, its gate electrode can be formed of the first-layer polysilicon for the lower electrode of the two-layer polysilicon capacitor or can be formed of the second-layer polysilicon of the upper electrode. In addition, the method of manufacturing the capacitor together with the semiconductor device such as the MOS transistor includes various conventional methods, and is not limited to the embodiments described below.

FIG. 1 shows an embodiment. A gate electrode 10 made of a polysilicon film is formed on the gate oxide film 8 in the active region of the P-type silicon substrate 2 which is isolated by the field oxide film 4, and the gate electrode 10 is formed in the substrate 2.
A source region 12 and a drain region 14 made of an N-type impurity diffusion layer are formed so as to face each other with respect to each other. A lower electrode 16 made of a low resistance polysilicon film having a thickness of 2000 to 4000Å is formed on the field oxide film 4, and a silicon nitride film 18 having a thickness of about 200Å is formed thereon. On top of that, the thickness is about 300
The silicon oxide film 20 of Å is formed, and the silicon oxide film 2
An upper electrode 2 made of a polysilicon film having a thickness of 2000 to 4000 Å and having a low resistance due to impurity doping
2 is formed. The silicon nitride film 18 and the silicon oxide film 20 serve as a capacitor dielectric. The polysilicon film of the gate electrode 10 of the MOS transistor also has a thickness of 200.
The resistance is 0 to 4000 liters, and the resistance is lowered by doping impurities.

Although not shown, an interlayer insulating film is formed, and the metal wiring is connected to the source region 12, the drain region 14, the gate electrode 10, the lower electrode 16 and the upper electrode 22 through the contact holes. .. The dielectric silicon oxide film 20 is a silicon oxide film formed by thermal oxidation of an impurity-doped polysilicon film. The polysilicon film before becoming the silicon oxide film 20 is phosphorus-diffused, and the phosphorus concentration is, for example, 5 × 10 ²⁰ / c.
It is about m ³ . By doping the polysilicon film before thermal oxidation with impurities such as phosphorus, the breakdown voltage and leak characteristics of the silicon oxide film after thermal oxidation are improved.

A method of manufacturing the embodiment of FIG. 1 will be described with reference to FIG. (A) A field oxide film 4 and a gate oxide film 8 are formed on a P-type silicon substrate 2. Lower electrode of capacitor and M
A first-layer polysilicon film 30 serving as a gate electrode of the OS transistor is deposited to a thickness of 2000 to 4000Å. In order to reduce the resistance of the polysilicon film 30, impurities such as phosphorus are introduced by the vapor phase diffusion method or the ion implantation method. The film thickness of the polysilicon film 30 is 2000 to 4000 Å because it is necessary to sufficiently reduce the sheet resistance. The sheet resistance of the polysilicon film 30 after being made low is 20 to
It becomes 50Ω / □.

(B) In order to obtain a dielectric having a capacitance, a silicon nitride film 18a is deposited on the polysilicon film 30 to a thickness of about 200Å by the LPCVD method. Further, a polysilicon film is deposited on the silicon nitride film 18a at a temperature of 600 to 650 ° C. to a thickness of about 200Å. This thin polysilicon film is also doped with phosphorus by the vapor phase diffusion method or the ion implantation method. The doping amount of phosphorus is such that the phosphorus concentration is 5 × 10 ²⁰ /
It should be about cm ³ . The thin polysilicon film after the introduction of phosphorus is thermally oxidized at 900 to 1100 ° C. to be completely converted into the silicon oxide film 20a. The thickness of the silicon oxide film 20a is about 200Å due to volume expansion during oxidation.
It is increased to about 300Å from the polysilicon film.

(C) A polysilicon film 22a serving as an upper electrode is formed on the silicon oxide film 20a as a first-layer polysilicon film 3
It is deposited to the same thickness as 0, that is, 2000 to 4000Å, and phosphorus is also introduced into the polysilicon film 22a by vapor phase diffusion or ion implantation to reduce the resistance. (D) Second layer polysilicon film 22a and silicon oxide film 2
0a and the silicon nitride film 18a are patterned by photolithography and etching to form a dielectric composed of the upper electrode 22, the silicon oxide film 20 and the silicon nitride film 18. Subsequently, the first-layer polysilicon film 30 is patterned by photolithography and etching to form the lower electrode 16 of the capacitor and the gate electrode 10 of the MOS transistor. After that, when the gate electrode 10 is used as a mask and phosphorus or arsenic is implanted into the substrate 2 to form the source region 12 and the drain region 14, the state shown in FIG. 1 is obtained.

In the embodiment, the NMOS transistor is formed together with the capacitor, but the same can be applied to the case where the MOS transistor is a P-channel type. Also,
Although the gate electrode 10 is formed of the first-layer polysilicon film, the second-layer polysilicon film can also be used. Further, the gate electrode 10 may be formed of a polysilicon film different from the capacitor electrodes 16 and 22.

[0015]

The capacitance obtained by the method of the present invention has a polysilicon film thickness of the lower electrode of 2000 to 4 as in the conventional case.
Even if the thickness is relatively thick such as 000Å, the first-layer polysilicon having deteriorated asperity is not directly thermally oxidized, so that deterioration of the asperity is not amplified. That is, the asperity at the time of depositing the polysilicon film deteriorates as the film thickness increases due to the columnar structure, but in the present invention, after the silicon nitride film is deposited as a dielectric, the polysilicon thinly formed on the silicon nitride film is deposited. Since the film is thermally oxidized and converted into a silicon oxide film, a thin polysilicon film is deposited on the silicon nitride film as compared with the conventional case, and deterioration of asperity due to the columnar structure of the thin polysilicon film itself is suppressed. .. Further, even after the thermal oxidation, the deterioration of the asperity is hardly amplified, and the withstand voltage and the leak current characteristic are improved. In the thermal oxidation of the thin polysilicon film, the silicon nitride film exists below the silicon nitride film, and it acts as a stopper to stop the oxidation, so that the first layer polysilicon is not oxidized.

Also in the present invention, since the thin polysilicon film which is converted into the oxide film through the silicon nitride film is deposited on the relatively thick first layer polysilicon, the asperity of the surface of the thin polysilicon film is Although it is affected by the asperity of the first-layer polysilicon film, it is less likely to cause deterioration in breakdown voltage and leak characteristics as compared with the conventional factor due to the structure of the thick first-layer polysilicon film itself.

[Brief description of drawings]

FIG. 1 is a sectional view showing an embodiment.

FIG. 2 is a process sectional view showing the manufacturing method of the embodiment.

[Explanation of symbols]

 2 silicon substrate 4 field oxide film 8 gate oxide film 10 gate electrode 12 source region 14 drain region 16 lower electrode 18 silicon nitride film 18a silicon nitride film 20 silicon oxide film 20a silicon oxide film 22 upper electrode 22a second layer polysilicon film 30 First layer polysilicon film

Claims (3)

[Claims] 1. A silicon nitride film is formed on a lower electrode made of a low resistance polysilicon film, a silicon oxide film is further formed thereon, and a low resistance polysilicon film is further formed thereon. A semiconductor device including a capacitor having an upper electrode formed of. 2. The semiconductor device according to claim 1, wherein the silicon oxide film is a thermal oxide film of a polysilicon film doped with impurities. 3. A method of manufacturing a semiconductor device, including the step of manufacturing a capacitor including the following steps (A) to (D). (A) A step of forming a first-layer polysilicon film, which is doped with impurities and has a reduced resistance, on an insulating base, (B) A silicon nitride film is formed thereon, and polysilicon doped with impurities is further formed thereon. A step of forming a film and thermally oxidizing the polysilicon film to form a silicon oxide film; (C) a step of further forming a second polysilicon film having a low resistance by being doped with impurities; ) A step of patterning the second-layer polysilicon film, the silicon oxide film, the silicon nitride film and the first-layer polysilicon film by photolithography and etching to form an upper electrode, a dielectric and a lower electrode.