JPH05217942A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve step coverage of a diffusion barrier in a contact and to enable low resistance contact. CONSTITUTION:A first insulating film 12 and a second insulating film 13 are deposited on a semiconductor substrate 11 and a contact 14 is formed by etching. Then, after the second insulating film 13 is deposited, it is etched back and a sidewall 15 is formed inside the contact 14. Thereafter, a low resistance conductive thin film 18 is deposited by sputtering on the second insulating film 13, the sidewall 15 and the semiconductor substrate 11 inside the contact 14, and a low resistance metallic material thin film 17 is further deposited to fill up an interior of the contact 14. Step coverage of a diffusion barrier is improved by reinforcement by the sidewall 15 and a low resistance contact having good diffusion barrier properties is formed in this way.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device in which a low resistance metal material thin film, which is likely to diffuse into a substrate, is formed on a semiconductor substrate.

[0002]

2. Description of the Related Art Conventionally, in order to make electrical contact between a semiconductor substrate and a wiring material in a semiconductor device, the wiring material and the semiconductor substrate are brought into direct contact with each other. FIG. 3 shows a metal oxide semiconductor transistor (hereinafter referred to as M
3 is a cross-sectional view of an OS transistor).

In FIG. 3, 1 is a semiconductor substrate, 2 is a source part, 3 is a drain part, 4 is a gate part, 5 is an oxide film formed by a selective oxidation method (hereinafter abbreviated as LOCOS oxide film), 6 Is a field oxide film, and 7 is a wiring portion formed of a wiring material such as aluminum or its alloy. In this MOS transistor, the wiring portion 7 is in direct contact with the source portion 2 or the drain portion 3 of the semiconductor substrate 1 at the insulating film opening 8 on the surface of the source portion 2 and the drain portion 3.

[0004]

As described above, in the conventional MOS transistor, the wiring portion 7 and the semiconductor substrate 1 are directly contacted with each other so that the semiconductor substrate 1 and the wiring material are electrically contacted with each other. . However, since the step coverage of the aluminum-based wiring formed by the sputtering method is poor, the wiring margin is reduced as the alignment margin in the photolithography process is reduced and the aspect ratio is increased with the miniaturization of the MOS transistor element. Of the wiring itself, and the resistance of the wiring itself which hinders high-speed element operation cannot be ignored.

Therefore, recently, a wiring technique using copper having a lower resistance in place of an aluminum material has been highlighted. By the way, in the conventional wiring technology, how to prevent copper diffusion to the base substrate is the key to obtaining good copper wiring, and a diffusion barrier is deposited on the base substrate by the sputtering method. A method of later depositing copper is used.

However, in the method of depositing copper after depositing the diffusion barrier on the underlying substrate by this sputtering method, the opening diameter of the contact hole is in the sub-half micron level with the recent miniaturization / high integration of devices. Therefore, when a normal MOS transistor structure is adopted, there is a problem that the step coverage of the diffusion barrier by the sputtering method deteriorates.

Therefore, an object of the present invention is to provide a method of manufacturing a semiconductor device which improves the step coverage of a diffusion barrier in a contact and enables a low resistance contact having an excellent diffusion barrier property.

[0008]

In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention comprises forming a low resistance metal material thin film on a semiconductor substrate whose surface is partially covered with an insulating film. In a method of manufacturing a semiconductor device in which the semiconductor substrate and a low resistance metal material thin film are electrically contacted with each other in an opening of the semiconductor substrate, a first surface of the semiconductor substrate is partially covered with a first insulating film. Two
Forming an opening by etching back the first insulating film after depositing the second insulating film, and forming a side wall of the second insulating film on the side surface of the first insulating film; and a semiconductor in at least the side wall and the opening. The method is characterized by comprising a step of depositing a low resistance conductive thin film on the surface of the substrate and a step of depositing the low resistance metal material thin film on the low resistance conductive thin film.

[0009]

The present invention will be described in detail below with reference to the embodiments shown in the drawings. 1A to 1C are cross-sectional views in each manufacturing process according to the method of manufacturing a semiconductor device of this embodiment. The method of manufacturing the semiconductor device according to this embodiment will be described below with reference to FIG.

First, as shown in FIG. 1A, a first insulating film 12 and a first insulating film 12 are formed on a semiconductor substrate 11.
A second insulating film 13 of a different type is deposited. Then, the insulating films 12 and 13 at the contact portions are etched to form the contact 14 having an opening diameter of sub-half micron. Then, as shown in FIG.
After the insulating film 13 is deposited, etch back is performed. Then, as shown in FIG. 1C, a sidewall 15 is formed inside the contact 14. Further, as shown in FIG. 1D, a low resistance conductive thin film 16 is deposited on the surface by, for example, a sputtering method.

Thereafter, as shown in FIG. 1E, a low resistance metal material thin film 17 which is a wiring material is deposited on the entire surface.
In the wiring using the low resistance metal material thin film 17 thus formed, a low resistance contact is provided by the low resistance conductive thin film 16 at the boundary with the semiconductor substrate 11, and the semiconductor substrate 11 and the first insulating film 12 are provided. Low resistance conductive thin film 16 and side wall 1 for suppressing diffusion of low resistance metal material into
Since the diffusion barrier made of No. 5 is formed, the contact characteristics are not deteriorated. Further, since the side wall 15 is formed in the contact 14, the step coverage of the diffusion barrier in the contact is improved.

FIG. 2 is a MOS field effect transistor manufactured by applying the method for manufacturing a semiconductor device according to this embodiment.
FIG. 3 is a cross-sectional view of (hereinafter, simply referred to as MOS-FET). In FIG. 2, 21 is a silicon substrate, 22 is a source portion, and 2
3 is a drain part, 24 is a gate part, 25 is a LOCOS oxide film, 26 is a field oxide film (interlayer insulating film), 27 is copper wiring as a low resistance metal material thin film, and 28 is diffusion of copper into the field oxide film 26. And 29 is a titanium film as a low resistance conductive thin film which prevents the diffusion of copper into the silicon substrate 21.

Source part 2 in the MOS-FET of FIG.
2 and the contact portion with the drain portion 23, as already described in FIG. 1, the field insulating film 26 and the silicon nitride film on the source portion 22 and the drain portion 23 are etched by a normal MOS manufacturing process to form a contact opening. After forming the portion, etching back is performed to form a sidewall 28 of a silicon nitride film inside the contact. Then, a titanium film 29 is deposited and patterned in the contact and in the wiring formation portion, and a copper thin film is further deposited and patterned to form a copper wiring 27.

Therefore, the copper wiring 27 is electrically connected to the source portion 22 or the drain portion 23 of the silicon substrate 21 through the titanium film 29. Further, it opposes the field oxide film 26 via the sidewall (silicon nitride film) 28 and the titanium film 29.

Thus, while the titanium film 29 providing a low resistance contact with silicon is used as a diffusion barrier of copper for forming the copper wiring 27 in the contact to the silicon substrate 21, the diffusion barrier of copper to the field oxide film 26 is used. By using the titanium film 29 and the silicon nitride film 28 as the above, it is possible to prevent deterioration of the device due to copper diffusion.

Further, by forming the side wall 28 of the silicon nitride film inside the contact, a low resistance conductive thin film (titanium film 29) formed by sputtering.
The step coverage of the diffusion barrier can be improved by reinforcing the step coverage of the contact. Therefore, even if the titanium film 29 becomes thin on the side wall of the contact, the barrier property of the copper diffusion described above is guaranteed by the sidewall 28 of the silicon nitride film. As in the case, the problem of reduction in the reliability of the wiring due to the miniaturization of the element is solved.

Therefore, according to this embodiment, a stable contact can be formed in the semiconductor device, the semiconductor device forming process and the reliability of both sides of the semiconductor device can be improved, and high integration of the semiconductor device can be achieved. It is possible to realize a high performance device.

In the above-mentioned embodiment, the method of manufacturing the semiconductor device of the present invention is described by taking the MOS-FET as an example. However, the present invention is not applicable only to the manufacture of MOS-FET, and the point is that a low resistance metal in which the diffusion into the substrate is concerned at the opening of the semiconductor substrate whose surface is partially covered with the insulating film. Any semiconductor device can be applied as long as it forms a contact between the material thin film and the semiconductor substrate.

[0019]

As is apparent from the above, according to the method of manufacturing a semiconductor device of the present invention, the second insulating film is deposited on the semiconductor substrate partially covered with the first insulating film, and then etched back. A sidewall is formed in the opening of the semiconductor substrate, a low resistance conductive thin film is further deposited, and the low resistance metal material thin film is deposited on the low resistance conductive thin film. The low resistance metal material and the semiconductor substrate form a low resistance contact through the diffusion barrier of the low resistance conductive thin film, and the diffusion of the low resistance metal material into the semiconductor substrate is prevented. Further, a diffusion barrier composed of a sidewall of the second insulating film and a low resistance conductive thin film is provided between the low resistance metal material thin film and the first insulating film, and a diffusion barrier made of the low resistance metal material is provided. The diffusion of 1 into the insulating film is prevented.

Further, the side wall formed on the side wall of the opening improves the step coverage of the diffusion barrier in the opening. Therefore, according to the present invention, a low resistance wiring having an excellent diffusion barrier property becomes possible.

[Brief description of drawings]

FIG. 1 is a cross-sectional view in each manufacturing process according to the method for manufacturing a semiconductor device of the present invention.

FIG. 2 is a MOS manufactured by the manufacturing method shown in FIG.
FIG. 6 is a cross-sectional view of a FET.

FIG. 3 is a cross-sectional view of a MOS-FET in which a wiring material and a semiconductor substrate are in direct contact with each other by a conventional semiconductor device manufacturing method.

[Explanation of symbols]

11 ... Semiconductor substrate, 12, 13 ... Insulating film, 14 ... Contact, 15 ... Sidewall, 16 ... Low resistance conductive thin film,
17 ... Low resistance metal material thin film, 21 ... Silicon substrate,
22 ... Source part, 23 ... Drain part,
24 ... Gate part, 26 ... Field oxide film, 27 ... Copper wiring, 28 ... Side wall, 29 ... Titanium film.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Internal reference number FI Technical indication location H01L 21/90 C 7735-4M 21/336 29/784 (72) Inventor Fukushima Nobunori Osaka City, Osaka Prefecture 22-22 Nagaike-cho, Abeno-ku, Sharp Corporation

Claims (1)

[Claims] 1. A low resistance metal material thin film is formed on a semiconductor substrate whose surface is partially covered with an insulating film, and the semiconductor substrate and the low resistance metal material thin film are electrically connected to each other at an opening of the semiconductor substrate. In the method of manufacturing a semiconductor device, the second insulating film is deposited on the semiconductor substrate whose surface is partially covered with the first insulating film, and is etched back to form the opening. Forming a side wall of the second insulating film on the side surface of the first insulating film; depositing a low resistance conductive thin film on at least the surface of the semiconductor substrate in the side wall and the opening; A method of manufacturing a semiconductor device, comprising a step of depositing the above-mentioned low resistance metal material thin film on a conductive thin film.