JPH05291416A - Formation of multilayer interconnection - Google Patents

Abstract

PURPOSE:To reduce contact resistance between bottom layer wiring and top layer wiring by cleaning the surface of the bottom layer wiring by sputtering using Ar gas. CONSTITUTION:Al, etc., are deposited on a substrate using a sputtering device and bottom layer wiring 1 is formed. Then, organic material such as polyimide resin is applied so as to form a layer insulating film 2 and the film 2 is partially removed so as to expose the surface of the bottom layer wiring 1. Sputtering by Ar gas is performed in the sputtering device and the exposed surface of the bottom layer wiring 1 is cleaned. Sputtering using O2 plasma is performed in the same reacting room and a film 3 is removed. Then, top layer wiring material 4 is sputtered by Ar gas in other reacting room to deposit the material 4. Photolithographical etching is performed and top layer wiring 5 is formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a multi-layer wiring, and more particularly to a method for forming a multi-layer wiring whose upper part of an interlayer insulating film is made of an organic material.

[0002]

2. Description of the Related Art In recent years, as the density of semiconductor devices has been increased, the number of electrode wiring layers and the pattern width have been rapidly reduced, and the method of forming an interlayer insulating film has been diversified in recent years. However, an insulating film made of an organic material has been used because of its easy planarization and formation method.

On the other hand, it is known that the through holes for contacting the lower layer wiring and the upper layer wiring are also miniaturized, and the sputter cleaning treatment with Ar gas has a remarkable effect in reducing the contact resistance.

FIG. 2 shows a conventional multilayer wiring forming process.
As shown in FIG. 2, when the upper layer wiring 5 is formed on the interlayer insulating film 2, the exposed lower layer wiring 1 surface is sputter-cleaned with Ar gas in advance, and then the upper layer wiring material 4 is removed by an evaporator or a sputtering device. After depositing and patterning, the upper wiring 5 is formed. In some cases, sputter cleaning with oxygen plasma is performed after forming the upper wiring 5.

[0005]

As described above, in order to reduce the contact resistance of the fine through holes, the lower layer wiring 1 shown in FIG. 2 is used.
The sputter cleaning treatment with Ar gas on the surface shows a remarkable effect, but when an organic material is used for the interlayer insulating film 2, the sputter cleaning treatment with Ar gas changes the characteristics of the organic interlayer insulating film 2, A chemically stable film 3 is formed on the surface of the interlayer insulating film 2, the electric conductivity of the surface of the interlayer insulating film 2 is increased, and a leak current is generated between the upper layer wirings 5 and 5, so that a desired operation cannot be guaranteed as a semiconductor device. Occurs.

The above problem depends on the processing conditions and processing equipment for sputtering with Ar gas, and the condition that both the purpose of reducing the contact resistance and suppressing the increase of the electrical conductivity of the surface of the interlayer insulating film 2 can be achieved at the same time. Derivation is
Extremely difficult. In particular, there are many parameters such as the substrate temperature, the degree of vacuum, the gas flow rate, the power density, and the processing time during the processing, and they vary depending on the processing apparatus.

Further, when the exposed film 3 is removed by using O ₂ plasma after the upper layer wiring is formed, the film 3 exists between the interlayer insulating film 2 and the upper layer wiring 5, and
Since there is a limit to the completeness of removal of the film 3 on the exposed portion, there is a limit to the reduction of the leak current. An object of the present invention is to provide a means for reducing the contact resistance at the contact portion between the lower layer wiring 1 and the upper layer wiring 5 and suppressing an increase in the electric conductivity of the surface of the interlayer insulating film 2.

[0008]

A method for forming a multilayer wiring according to the present invention is a method for forming a multilayer wiring, wherein an upper surface has an interlayer insulating film 2 made of an organic material. 2 is formed on the entire surface, and the interlayer insulating film 2
Is exposed to expose the surface of the lower layer wiring 1, and after the step, the surface of the lower layer wiring 1 is sputter-cleaned in a vacuum using Ar gas, and O ₂ plasma is used while maintaining the vacuum state. A step of performing sputter cleaning on the surface of the interlayer insulating film 2, and a step of depositing an upper layer wiring material 4 and performing photolithography / etching to form an upper layer wiring 5 after the step while maintaining the vacuum state. It is a feature.

[0009]

By using the present invention described above, the chemically stable film 3 formed on the surface of the interlayer insulating film 2 made of an organic material is removed by O ₂ plasma, and then the film 3 is formed again.
The upper wiring 5 can be formed on the interlayer insulating film 2 without causing

[0010]

EXAMPLES The present invention will be described in detail below based on examples.

FIG. 1 shows a multi-layer wiring forming process according to an embodiment of the present invention.

First, Al, Al--Si, etc. are deposited on a substrate by using a vapor deposition machine or a sputtering device, and the lower wiring 1 is formed by photolithography and etching. Next, the interlayer insulating film 2 is formed by applying an organic material such as a polyimide resin and baking it. Then, the interlayer insulating film 2 is partially removed by dry etching,
The surface of the lower layer wiring 1 is exposed (FIG. 1A).

Next, in the sputtering apparatus, the degree of vacuum is 0.1 Torr, the flow rate of Ar gas is 5 cc / min, and DC is used.
Bias at 200 V, substrate heating temperature at 200 ° C., Ar
The exposed surface of the lower layer wiring 1 is cleaned by performing sputtering with a gas (FIG. 1B).

Next, in the same reaction chamber, the degree of vacuum is set to 0.1T.
orr, the flow rate of O ₂ gas is 10 cc / min, the DC bias is 200 V, the substrate heating temperature is 200 ° C., and the sputtering is performed by using O ₂ plasma.
The chemically stable film 3 formed on the interlayer insulating film 2 during the gas sputtering is removed (FIG. 1C).
Next, while maintaining the vacuum state, the substrate is transferred to a reaction chamber different from the reaction chamber in which the sputtering is performed, and the degree of vacuum is set to 0.
The upper wiring material 4 is deposited by sputtering at 1 Torr, Ar gas flow rate of 5 cc / min, substrate heating temperature of 200 ° C. (FIG. 1D).

When the upper wiring material 4 is deposited by sputtering in the reaction chamber where the sputtering using O ₂ plasma is performed, the target which is the upper wiring material 4 is exposed to an oxygen atmosphere and is oxidized by oxygen. It is desirable to perform the above two sputterings in separate reaction chambers.

Next, the upper layer wiring 5 is formed by the conventional photolithography and etching techniques (FIG. 1E).

In the above embodiment, the interlayer insulating film 2 is a single layer film, but the same effect can be obtained even if it is a composite layer if the surface in contact with the upper wiring 5 is an organic film. Although the reaction chamber was moved when the upper layer wiring material 4 was deposited, if the upper layer wiring material 4 is a material that is difficult to oxidize, it is also possible to continuously perform sputtering in the same reaction chamber. ..

[0018]

As described above in detail, according to the present invention, the lower wiring 1 is cleaned by cleaning the surface of the lower wiring 1 by sputtering using Ar gas.
The contact resistance between the upper layer wiring 5 and the upper layer wiring 5 can be reduced, and at the same time, the film 3 formed on the surface of the interlayer insulating film 2 is removed by sputtering using O ₂ plasma. The rise can be suppressed and the leak current between the upper layer wirings 5 and 5 can be reduced.

[Brief description of drawings]

FIG. 1 is a process drawing of a multilayer wiring according to an embodiment of the present invention.

FIG. 2 is a diagram showing a conventional multilayer wiring forming process.

[Explanation of symbols]

 1 Lower layer wiring 2 Interlayer insulation film 3 Chemically stable film 4 Upper layer wiring material 5 Upper layer wiring

Claims (1)

[Claims] 1. A method for forming a multi-layered wiring having an upper surface having an interlayer insulating film made of an organic material, wherein after forming a lower layer wiring, the interlayer insulating film is formed on the entire surface, and the interlayer insulating film is etched. After the step of exposing the surface of the lower layer wiring, after the step, the surface of the lower layer wiring is sputter-cleaned by using Ar gas in a vacuum, and O is maintained while maintaining the vacuum state.
₍₂₎ A step of performing sputter cleaning on the surface of the interlayer insulating film using plasma, and a step of forming an upper layer wiring by depositing an upper layer wiring material and performing photolithography / etching after the step while maintaining the vacuum state. A method for forming a multi-layer wiring, characterized in that