JPH05288947A - Method for generating reference line for cutting of optical waveguide chip - Google Patents

Method for generating reference line for cutting of optical waveguide chip

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Publication number
JPH05288947A
JPH05288947A JP8428392A JP8428392A JPH05288947A JP H05288947 A JPH05288947 A JP H05288947A JP 8428392 A JP8428392 A JP 8428392A JP 8428392 A JP8428392 A JP 8428392A JP H05288947 A JPH05288947 A JP H05288947A
Authority
JP
Japan
Prior art keywords
reference line
mask
optical waveguide
core
cutting reference
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP8428392A
Other languages
Japanese (ja)
Inventor
Kazue Hattori
和枝 服部
Yasuhiro Omori
康弘 大森
Hideki Isono
秀樹 磯野
Yoshihiko Kaido
義彦 海藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP8428392A priority Critical patent/JPH05288947A/en
Publication of JPH05288947A publication Critical patent/JPH05288947A/en
Withdrawn legal-status Critical Current

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Abstract

PURPOSE:To provide clear vision and enable highly precise setting by leaving a mask by covering the cutting reference line and depositing an overclad as it is when a mask where a core is formed by patterning is removed. CONSTITUTION:The overclad 6 is deposited on the top surface of the core 2 of the optical waveguide chip 1 without fail, but the cutting reference line 4 is illegible in this state and the reflection factor is made larger to enable the cutting reference line to be seen clearly. For the purpose, the reflection factor can be increased by making the depositing process on the top surface of the core 2 for the cutting reference line different, for example, by providing a reflecting layer (1) or not by depositing the overclad 6 (b), etc. Those processes are performed not by processing the part of the cutting reference line 4 in a series of processes of the manufacture of the optical waveguide chip 1. This cutting reference line 4 is provided outside the area of the optical waveguide chip 1 at a distance, a wafer 3 can be positioned with high precision, and only initial setting is required.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、リッジ型の光導波路チ
ップの裁断基準線作製方法に関する。各種の加工工程を
経て1個のウエハに多数のチップを一体に形成し、最後
にウエハをチップ毎に裁断して1個のチップが得られ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for producing a cutting reference line for a ridge type optical waveguide chip. A large number of chips are integrally formed on one wafer through various processing steps, and finally the wafer is cut into individual chips to obtain one chip.

【0002】リッジ型の光導波路チップも、シリコンウ
エハ上にコア低屈折率のSiO2に囲まれて、高屈折率のコ
ア材料により光導波路をパターン成形してチップが多数
形成される。
A ridge type optical waveguide chip is also surrounded by SiO 2 having a low core refractive index on a silicon wafer, and a large number of chips are formed by pattern forming an optical waveguide with a core material having a high refractive index.

【0003】この光導波路チップのウエハからの裁断に
は、チップが小さくなればなる程高度な寸法精度が要求
される。ウエハには寸法精度用の形状のガイド機構は設
けてないので、
The cutting of the optical waveguide chip from the wafer requires higher dimensional accuracy as the chip becomes smaller. Since the wafer is not provided with a guide mechanism for dimensional accuracy,

【0004】[0004]

【従来の技術】図6に従来の一例の光導波路の製造フロ
ーを示し、図7は従来の一例のコア作製フロー、図8は
従来の一例のウエハである。
2. Description of the Related Art FIG. 6 shows a manufacturing flow of a conventional optical waveguide, FIG. 7 shows a conventional core manufacturing flow, and FIG. 8 shows a conventional wafer.

【0005】従来の一例としてリッジ型石英系光導波路
の製造をフロー図により説明する。図6の(A) 〜(E) に
示すように、(A) にてSi 基板91の上に低屈折率の[SiO
2]92、その上に高屈折率の [SiO2+Ge]93 のガラススー
トを堆積し、(B) にて加熱してガラス化させ下層の[SiO
2]92部分はアンダークラッド層71、上層の [SiO2+Ge]9
3 部分はコア層21となる。
As a conventional example, the manufacture of a ridge type silica optical waveguide will be described with reference to a flow chart. As shown in FIGS. 6A to 6E, the low refractive index [SiO 2] is formed on the Si substrate 91 at (A).
2 ] 92, and a high-refractive-index [SiO 2 + Ge] 93 glass soot is deposited on it, and heated in (B) to vitrify to form the lower layer [SiO 2
2 ] 92 part is under clad layer 71, upper layer [SiO 2 + Ge] 9
The three parts become the core layer 21.

【0006】次に、(C) にてこのコア層21にパターン形
成してコア2を作製するが、この工程は、図7の(a) 〜
(e) に示すように、(a) にてコア層21の上にマスク材料
を被着してマスク層51を得、次に(b) にてマスク層51の
上にフォトレジスト材料を塗布しフォトレジスト層94を
設け、(c) にてパターン形状が設けられたCr マスク95
を密着してフォトレジスト層94を感光させ、(d) にてフ
ォトレジスト層94をエッチングしてパターン形状に成形
し、(e) にてマスク層51をエッチングしマスク5を形成
し、更に(f) にてこのマスク5によりコア層21をエッチ
ングしてコア2をパターン成形し、(g) にてマスク5を
除去してコア作製が終了する。
Next, the core 2 is patterned to form the core 2 in (C), and this step is performed by referring to FIGS.
As shown in (e), a mask material is deposited on the core layer 21 in (a) to obtain a mask layer 51, and then a photoresist material is applied on the mask layer 51 in (b). Then, a Cr mask 95 is provided with a photoresist layer 94 and the pattern shape is provided in (c).
And the photoresist layer 94 is exposed to light, the photoresist layer 94 is etched to form a pattern in (d), and the mask layer 51 is etched to form the mask 5 in (e). The core layer 21 is etched by the mask 5 in f) to pattern the core 2, and the mask 5 is removed in (g) to complete the core fabrication.

【0007】次に、図6の(D) にて、この上に低屈折率
の[SiO2]92のガラススートを堆積させ、(E) にて加熱し
てガラス化を行いオーバークラッド6を形成し、コア2
の周囲をそれより屈折率の小さいガラスにて囲んだ光導
波路が形成される。
Next, as shown in FIG. 6D, a glass soot of [SiO 2 ] 92 having a low refractive index is deposited on this, and heated at (E) to vitrify to form the overclad 6. Forming and core 2
An optical waveguide is formed by surrounding glass with a glass having a smaller refractive index.

【0008】上記の工程を光導波路チップ1毎に行わず
に、図8のように、ウエハ39に纏めて一度に多量に作製
し、その後、ウエハ39をチップ毎に裁断線49に沿ってダ
イシィングソーにて裁断して作る。
The above steps are not carried out for each optical waveguide chip 1, but as shown in FIG. 8, the wafers 39 are collectively manufactured in a large amount at a time, and then the wafers 39 are diced along the cutting line 49 for each chip. Cut and make with an ing saw.

【0009】この裁断線49は、光導波路チップ1間の境
界線としてコア2の作製と同じに作製してある。
The cutting line 49 is made as a boundary line between the optical waveguide chips 1 in the same manner as the core 2 is made.

【0010】[0010]

【発明が解決しようとする課題】しかしながら、 コア2とオーバークラッド6とは比屈折率差が小さ
いために、裁断線49が明瞭に見え難く、裁断設定に時間
を要し、且つミス設定する恐れがある。 裁断線49を裁断時の位置決め基準線とすることは、
見え辛いので高精度にはできず、裁断の都度チェックし
ないと危険であり、省力化ができない。と言う問題点が
あった。
However, since the relative refractive index difference between the core 2 and the overclad 6 is small, the cutting line 49 is difficult to see clearly, and it takes time to set the cutting and there is a risk of missetting. There is. To use the cutting line 49 as the positioning reference line for cutting,
Since it is hard to see, it cannot be made highly precise, and it is dangerous if you do not check it every time you cut, and you can not save labor. There was a problem called.

【0011】本発明は、かかる問題点に鑑みて、特別な
加工工程を加えること無く、明瞭に見え高精度に設定で
きる裁断基準線の作製方法を提供することを目的とす
る。
In view of the above problems, it is an object of the present invention to provide a method for producing a cutting reference line that can be clearly seen and can be set with high accuracy without adding a special processing step.

【0012】[0012]

【課題を解決するための手段】上記目的は、図1の原理
説明図及び実施例の図2〜図5に示す如く、リッジ型の
光導波路チップのウエハ作製において、ウエハ3上の光
導波路チップ1のコア2作製時に、光導波路チップ1の
領域外にチップ裁断用の裁断基準線4をコア2にて作製
し、同一過程にて裁断基準線4のコア2上面の堆積処理
を違えて、裁断基準線4の反射率を大きく作製する、本
発明の光導波路チップの裁断基準線作製方法により達成
される。 [1] 具体的には、コア2をパターン作製したマスク5の
除去に際し、裁断基準線4の上を覆いマスク5を残存さ
せ、そのままオーバークラッド6を堆積させる、本発明
の第一の裁断基準線作製方法によって適えられる。 [2] 又、光導波路チップ1のコア2用マスク5より、裁
断基準線44のマスク55を厚く形成し、後のマスク除去工
程にて光導波路チップ1部分のマスク5は完全除去し、
裁断基準線44のマスク55は厚さの差分だけ残存させ、そ
のままオーバークラッド6を堆積させる、本発明の第二
の裁断基準線作製方法によっても適えられる。 [3] 更に、コア2をパターン作製したマスク5を除去
し、オーバークラッド6を堆積する際に、裁断基準線45
のコア2の上を覆い、その部分にオーバークラッド6を
堆積させなくした、本発明の第三の裁断基準線作製方法
によっても適えられる。
The above object is to provide an optical waveguide chip on a wafer 3 in the production of a ridge type optical waveguide chip wafer as shown in the principle explanatory view of FIG. 1 and FIGS. When manufacturing the core 2 of No. 1, the cutting reference line 4 for cutting the chip is formed on the core 2 outside the region of the optical waveguide chip 1, and the deposition process of the cutting reference line 4 on the upper surface of the core 2 is changed in the same process. This is achieved by the method for producing a cutting reference line of an optical waveguide chip of the present invention, which makes the reflectance of the cutting reference line 4 large. [1] Specifically, when removing the mask 5 on which the core 2 is patterned, the mask 5 is left over the cutting reference line 4 and the overclad 6 is deposited as it is. It is suitable depending on the line making method. [2] Further, a mask 55 for the cutting reference line 44 is formed thicker than the core 5 mask 5 of the optical waveguide chip 1, and the mask 5 of the optical waveguide chip 1 portion is completely removed in a subsequent mask removing step.
The mask 55 of the cutting reference line 44 can be applied by the second cutting reference line manufacturing method of the present invention in which the mask 55 is left by the difference in thickness and the overclad 6 is deposited as it is. [3] Further, when the mask 5 on which the core 2 is patterned is removed and the overclad 6 is deposited, the cutting reference line 45
It is also applicable by the third cutting reference line manufacturing method of the present invention in which the core 2 is covered and the overclad 6 is not deposited on the core 2.

【0013】[0013]

【作用】即ち、図1の(a)(b)のように、光導波路チップ
1のコア2上面にはオーバークラッド6が必ず堆積する
が、そのままでは裁断基準線4は不明瞭であり、もっと
反射率を大きくして明瞭に見えるようにする。このため
裁断基準線4のコア4の上面の堆積処理を違えて、(a)
のように反射層を設けたり、(b) のようにオーバークラ
ッド6を堆積させない 等にて反射率を大きくできる。
尚、これらの処理は光導波路チップ1を作製する一連の
処理工程にて、裁断基準線4の部分の処理を行わないよ
うにすることにより容易に処理できる。
That is, as shown in FIGS. 1 (a) and 1 (b), the overclad 6 is always deposited on the upper surface of the core 2 of the optical waveguide chip 1, but the cutting reference line 4 is unclear as it is. Increase the reflectance so that you can see clearly. Therefore, the deposition process on the upper surface of the core 4 of the cutting reference line 4 is changed, and (a)
The reflectance can be increased by providing a reflective layer as described above or by not depositing the overclad 6 as shown in FIG.
It should be noted that these processes can be easily performed by not performing the process of the cutting reference line 4 in a series of process steps for manufacturing the optical waveguide chip 1.

【0014】かような裁断基準線4を、図2に示すよう
に、光導波路チップ1の領域外に離れて設け、高精度に
ウエハ3を位置合わせすることができ、最初の1回の設
定で済む。
As shown in FIG. 2, such a cutting reference line 4 is provided outside the region of the optical waveguide chip 1 so that the wafer 3 can be aligned with high accuracy, and the first setting is performed once. It's done.

【0015】又、裁断基準線4はそのままチップに残存
して組込まれたりすると反射層形成物が悪影響を与える
恐れもあるが、離れて設けられ切捨てられるので何ら問
題はない。
Further, if the cutting reference line 4 remains in the chip as it is and is incorporated therein, the reflective layer forming material may have a bad influence, but since it is provided separately and cut off, there is no problem.

【0016】具体的に裁断基準線4の反射率を大きくす
る堆積処理は、第一の方法では、図3のように、コア2
をパターン作製したマスク5の除去に際し、裁断基準線
4の上を覆いマスク5を残存させ、そのままオーバーク
ラッド6を堆積させて、マスク5を反射層に形成してい
る。
Specifically, in the first method, the deposition process for increasing the reflectance of the cutting reference line 4 is performed by the core 2 as shown in FIG.
When the patterned mask 5 is removed, the mask 5 is left to cover the cutting reference line 4 and the overclad 6 is deposited as it is to form the mask 5 on the reflective layer.

【0017】第二の方法は、図4のように、光導波路チ
ップ1のコア2用マスク5より、裁断基準線44のマスク
55を厚く形成し、後のマスク除去工程にて光導波路チッ
プ1部分のマスク5は完全除去し、裁断基準線44のマス
ク55は厚さの差分だけ残存させ、そのままオーバークラ
ッド6を堆積させて、上記と同様にマスク55を反射層に
形成している。ここでマスク5,55の厚みを違えるのは、
重層したマスク層51を一度フォトレジストマスクを設け
てエッチングして厚さを違えたり、マスク層51の被着を
部分的に2回行う等により容易に行える。
The second method is, as shown in FIG. 4, from the mask 5 for the core 2 of the optical waveguide chip 1 to the mask of the cutting reference line 44.
55 is thickly formed, the mask 5 of the optical waveguide chip 1 portion is completely removed in the subsequent mask removing step, the mask 55 of the cutting reference line 44 is left by the difference in thickness, and the over cladding 6 is deposited as it is. The mask 55 is formed on the reflective layer as described above. The difference in the thickness of the masks 5 and 55 is that
This can be easily performed by providing a photoresist mask once on the overlaid mask layers 51 to change the thickness, or by partially depositing the mask layer 51 twice.

【0018】第三の方法は、図5のように、コア2をパ
ターン作製したマスク5を除去し、オーバークラッド6
を堆積する際に、裁断基準線45のコア2の上を覆い、そ
の部分にオーバークラッド6を堆積させなくしたもの
で、裁断基準線45はコア2それ自体が露出して構成さ
れ、明瞭に見える。
The third method is to remove the mask 5 on which the core 2 is patterned as shown in FIG.
When the core 2 of the cutting reference line 45 is covered, and the overclad 6 is not deposited on that portion, the cutting reference line 45 is formed by exposing the core 2 itself. appear.

【0019】かくして、本発明により、特別な加工工程
を加えること無く、明瞭に見え高精度に設定できる裁断
基準線の作製方法を提供することが可能となる。
Thus, according to the present invention, it is possible to provide a method for producing a cutting reference line which can be clearly seen and can be set with high accuracy without adding a special processing step.

【0020】[0020]

【実施例】以下図面に示す実施例によって本発明を具体
的に説明する。全図を通し同一符号は同一対象物を示
す。図2に本発明の一実施例のウエハ、図3に本発明の
第一の裁断基準線作製方法の実施例の作製フロー、図4
は本発明の第二の裁断基準線作製方法の実施例の作製フ
ロー、図5は本発明の第三の裁断基準線作製方法の実施
例の作製フローである。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail with reference to the embodiments shown in the drawings. Throughout the drawings, the same reference numerals denote the same objects. FIG. 2 shows a wafer of one embodiment of the present invention, FIG. 3 shows a manufacturing flow of an embodiment of the first cutting reference line manufacturing method of the present invention, and FIG.
Is a manufacturing flow of an embodiment of the second cutting reference line manufacturing method of the present invention, and FIG. 5 is a manufacturing flow of an embodiment of the third cutting reference line manufacturing method of the present invention.

【0021】本実施例は何れもリッジ型の石英系の光導
波路チップのウエハ作製に適用したものであり、図2に
示すように、円板のウエハ3の一面の中央部には出来る
だけ高密度に光導波路チップ1を形成させ、その領域外
に離れて囲むように、光導波路チップ1の各裁断線の基
準となる、4個の高精度に直交した裁断基準線4が設け
られ、この裁断基準線4の作製方法が以下のように各種
ある。
Each of the present embodiments is applied to the production of a wafer of a ridge type silica-based optical waveguide chip, and as shown in FIG. The optical waveguide chips 1 are formed to have a high density, and four cutting reference lines 4 that are orthogonal to each other with high precision are provided so as to surround the region apart from each other and serve as a reference for each cutting line of the optical waveguide chip 1. There are various methods for producing the cutting reference line 4 as follows.

【0022】第一の方法は、前述従来例の図6の光導波
路チップの製造フローにおける(C)のコア作製に適用し
たもので、図3に詳細を示す如くで、(a) にてウエハ3
のコア層21の上にマスク材料を約1μm 厚に全面被着し
てマスク層51を設け、(b) にて更にその上にフォトレジ
ストを被着してフォトレジスト層94を設け、(c) にてコ
ア成形のパターン用Cr マスク95を当てフォトレジスト
層94を感光させ、(d)にて現像してパターニングさせ、
(e) にてマスク層51をエッチングして、パターニングさ
れたマスク5が形成され、(f) にてコア層21をエッチン
グしてパターニングされたコア2を形成し、(g) にてマ
スク5を除去するが、この時図示点線の如く、裁断基準
線4の部分には接着テープにて密着して覆い、マスク5
が除去されなくしておき、(h) にて全面に一律に低屈折
率のSiO2のガラススートを堆積させガラス化させてオー
バークラッド6を形成して完成する。
The first method is applied to the core fabrication of (C) in the manufacturing process of the optical waveguide chip of FIG. 6 of the above-mentioned conventional example, and as shown in detail in FIG. Three
A mask material is applied to the entire surface of the core layer 21 of 1 to a thickness of about 1 μm to form a mask layer 51, and in (b), a photoresist is further applied to form a photoresist layer 94. ), A Cr molding pattern mask 95 for core molding is applied to expose the photoresist layer 94, and (d) is developed for patterning.
The mask layer 51 is etched in (e) to form the patterned mask 5, the core layer 21 is etched in (f) to form the patterned core 2, and the mask 5 is formed in (g). However, at this time, as shown by the dotted line in the figure, the portion of the cutting reference line 4 is adhered and covered with an adhesive tape, and the mask 5
Is removed, and in step (h), a glass soot of SiO 2 having a low refractive index is uniformly deposited on the entire surface and vitrified to form an overclad 6, which is completed.

【0023】これにより、光導波路チップ1領域のコア
2にはそのままオーバークラッド6が堆積するが、裁断
基準線4のコア2にはマスク5が残存したままオーバー
クラッド6が堆積しており、このマスク5が反射層とな
り、コア2にて成形した裁断基準線4が明瞭に見え、ウ
エハ3の裁断機へのセットが高精度に行え、しかも初回
のセットのみで済ますことができる。
As a result, the overclad 6 is directly deposited on the core 2 in the optical waveguide chip 1 region, but the overclad 6 is deposited on the core 2 of the cutting reference line 4 while the mask 5 remains. The mask 5 serves as a reflection layer, the cutting reference line 4 molded by the core 2 can be clearly seen, and the wafer 3 can be set on the cutting machine with high accuracy, and only the first set can be performed.

【0024】第二の方法は、図4に詳細を示す如くで、
マスク層51の厚みを光導波路部より裁断基準線44の部分
の方が厚くし、マスク55の除去の際に厚み差分約1/3 が
残るように行い、裁断基準線44の部分にのみマスク55を
残した状態にてオーバークラッド6の堆積を行い完成さ
せる。
The second method is as shown in detail in FIG.
The thickness of the mask layer 51 is made thicker in the cutting reference line 44 than in the optical waveguide portion, and the thickness difference is about 1/3 when the mask 55 is removed, and only the cutting reference line 44 is masked. The overclad 6 is deposited while leaving 55 to complete.

【0025】この厚みを違えたマスク層51の形成工程
が、図中(b′) 〜(e′) の工程であり、前記第一の方法
に加わるが、逆に(g′) のマスク除去ではテープ等で覆
う必要はない。
The steps of forming the mask layers 51 having different thicknesses are steps (b ') to (e') in the figure, which are added to the first method, but conversely, the mask removal of (g ') is performed. Then, it is not necessary to cover with tape or the like.

【0026】第三の方法は、前述従来例の図6の光導波
路チップの製造フローにおける(D)のガラススート堆積
+ガラス化の工程に適用したもので、図5に詳細を示す
如くで、(a) にてパターン作製したマスク5を除去した
コア2の完成後、(b) にて裁断基準線45のコア2の部分
を図示点線のように接着テープにて覆い、(c) にて覆っ
た部分を除きガラススート堆積+ガラス化を行い、(d)
にて覆いを除去して完成する。これにより裁断基準線45
のコア2にはオーバークラッド6が堆積してないので明
瞭に見える。
The third method is applied to the step (D) of glass soot deposition + vitrification in the manufacturing flow of the optical waveguide chip shown in FIG. 6 of the above-mentioned conventional example, as shown in detail in FIG. After completion of the core 2 in which the mask 5 having the pattern formed in (a) is removed, in (b) the portion of the core 2 of the cutting reference line 45 is covered with an adhesive tape as shown by the dotted line in the figure, and in (c). Except for the covered part, glass soot deposition + vitrification is performed (d)
Remove the cover and complete. This allows the cutting reference line 45
Since the overclad 6 is not deposited on the core 2 of FIG.

【0027】上記各実施例は一例を示したもので、各部
の寸法、エッチング方法は上記のものに限定するもので
はない。
The above-mentioned embodiments are merely examples, and the dimensions of each part and the etching method are not limited to those described above.

【0028】[0028]

【発明の効果】以上の如く、本発明の裁断基準線作製方
法により、特別な加工工程を加えること無く、明瞭に見
え高精度に設定できる裁断基準線が得られ、光導波路チ
ップの裁断が容易且つ正確に行え、更に、初期の位置決
め設定のみでウエハの裁断が行え、チップ品質の向上、
生産の自動化に寄与すること大である。
As described above, according to the method for producing a cutting reference line of the present invention, a cutting reference line which can be clearly seen and can be set with high precision can be obtained without adding a special processing step, and the optical waveguide chip can be easily cut. In addition, it can be performed accurately, and further, the wafer can be cut only by the initial positioning setting, improving the chip quality,
It greatly contributes to the automation of production.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の原理説明図FIG. 1 is an explanatory view of the principle of the present invention.

【図2】 本発明の一実施例のウエハFIG. 2 is a wafer according to an embodiment of the present invention.

【図3】 本発明の第一の裁断基準線作製方法の実施例
の作製フロー
FIG. 3 is a manufacturing flow of an example of a first cutting reference line manufacturing method of the present invention.

【図4】 本発明の第二の裁断基準線作製方法の実施例
の作製フロー
FIG. 4 is a manufacturing flow of an example of a second cutting reference line manufacturing method of the present invention.

【図5】 本発明の第三の裁断基準線作製方法の実施例
の作製フロー
FIG. 5: Manufacturing flow of an example of a third cutting reference line manufacturing method of the present invention

【図6】 従来の一例の光導波路の製造フローFIG. 6 is a flow chart of manufacturing a conventional optical waveguide.

【図7】 従来の一例のコア作製フローFIG. 7: Conventional example core production flow

【図8】 従来の一例のウエハFIG. 8 is a conventional example wafer.

【符号の説明】[Explanation of symbols]

1 光導波路チップ 2 コア 3,
39 ウエハ 4,44,45 裁断基準線 5,55 マスク 6
オーバークラッド 21 コア層 49 裁断線 51
マスク層 71 アンダークラッド層 91 Si基板 92
[SiO2] 93 [SiO2+Ge] 94 フォトレジスト層 95
Cr マスク
1 Optical waveguide chip 2 Core 3,
39 Wafer 4,44,45 Cutting reference line 5,55 Mask 6
Overclad 21 Core layer 49 Cutting line 51
Mask layer 71 Under clad layer 91 Si substrate 92
[SiO 2 ] 93 [SiO 2 + Ge] 94 Photoresist layer 95
Cr mask

───────────────────────────────────────────────────── フロントページの続き (72)発明者 磯野 秀樹 北海道札幌市中央区北一条西2丁目1番地 富士通北海道ディジタル・テクノロジ株 式会社内 (72)発明者 海藤 義彦 北海道札幌市中央区北一条西2丁目1番地 富士通北海道ディジタル・テクノロジ株 式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Hideki Isono, 2-chome, Kitaichijo Nishi, Chuo-ku, Sapporo-shi, Hokkaido Inside Fujitsu Hokkaido Digital Technology Co., Ltd. (72) Yoshihiko Kaito Kita-ichijo Nishi, Chuo-ku, Sapporo, Hokkaido 2-chome, Fujitsu Hokkaido Digital Technology Co., Ltd.

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 リッジ型の光導波路チップのウエハ作製
において、 ウエハ(3) 上の光導波路チップ(1) のコア(2) 作製時
に、該光導波路チップ(1) の領域外にチップ裁断用の裁
断基準線(4) をコア(2) にて作製し、同一過程にて該裁
断基準線(4) のコア(2) 上面の堆積処理を違えて、該裁
断基準線(4) の反射率を大きく作製することを特徴とす
る光導波路チップの裁断基準線作製方法。
1. When manufacturing a wafer of a ridge type optical waveguide chip, for cutting a chip outside the region of the optical waveguide chip (1) when manufacturing a core (2) of the optical waveguide chip (1) on a wafer (3). The cutting reference line (4) of the cutting reference line (4) was produced by the core (2), and the deposition process on the upper surface of the core (2) of the cutting reference line (4) was changed in the same process to reflect the cutting reference line (4). A method for producing a cutting reference line for an optical waveguide chip, which is characterized in that the production rate is increased.
【請求項2】 コア(2) をパターン作製したマスク(5)
の除去に際し、裁断基準線(4) の上を覆い該マスク(5)
を残存させ、そのままオーバークラッド(6)を堆積させ
ることを特徴とする、請求項1記載の光導波路チップの
裁断基準線作製方法。
2. A mask (5) having a patterned core (2).
When removing the mask, cover the top of the cutting reference line (4) with the mask (5).
2. The method for producing a cutting reference line for an optical waveguide chip according to claim 1, wherein the overclad (6) is left as it is, and the overclad (6) is deposited as it is.
【請求項3】 光導波路チップ(1) のコア(2) 用マスク
(5) より、裁断基準線(44)のマスク(55)を厚く形成し、
後のマスク除去工程にて該光導波路チップ(1) 部分のマ
スク(5) は完全除去し、該裁断基準線(44)のマスク(55)
は厚さの差分だけ残存させ、そのままオーバークラッド
(6) を堆積させることを特徴とする、請求項1記載の光
導波路素子の裁断基準線作製方法。
3. A mask for a core (2) of an optical waveguide chip (1)
From (5), forming a thick mask (55) of the cutting reference line (44),
The mask (5) of the optical waveguide chip (1) is completely removed in the subsequent mask removing step, and the mask (55) of the cutting reference line (44) is removed.
Is left over by the difference in thickness, and overclad as it is
2. The method for producing a cutting reference line for an optical waveguide device according to claim 1, wherein (6) is deposited.
【請求項4】 コア(2) をパターン作製したマスク(5)
を除去し、オーバークラッド(6) を堆積する際に、裁断
基準線(45)のコア(2) の上を覆い、その部分にオーバー
クラッド(6) を堆積させなくしたことを特徴とする、請
求項1記載の光導波路素子の裁断基準線作製方法。
4. A mask (5) having a patterned core (2).
Is removed, and when the overclad (6) is deposited, the core (2) of the cutting reference line (45) is covered and the overclad (6) is not deposited on that part. The method for producing a reference line for cutting an optical waveguide element according to claim 1.
JP8428392A 1992-04-07 1992-04-07 Method for generating reference line for cutting of optical waveguide chip Withdrawn JPH05288947A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8428392A JPH05288947A (en) 1992-04-07 1992-04-07 Method for generating reference line for cutting of optical waveguide chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8428392A JPH05288947A (en) 1992-04-07 1992-04-07 Method for generating reference line for cutting of optical waveguide chip

Publications (1)

Publication Number Publication Date
JPH05288947A true JPH05288947A (en) 1993-11-05

Family

ID=13826139

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8428392A Withdrawn JPH05288947A (en) 1992-04-07 1992-04-07 Method for generating reference line for cutting of optical waveguide chip

Country Status (1)

Country Link
JP (1) JPH05288947A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109849096A (en) * 2018-12-27 2019-06-07 苏州安鼎爆破片制造有限公司 A kind of rectangle rupture disk sanction film device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109849096A (en) * 2018-12-27 2019-06-07 苏州安鼎爆破片制造有限公司 A kind of rectangle rupture disk sanction film device

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