JPH0528856B2 - - Google Patents

Info

Publication number
JPH0528856B2
JPH0528856B2 JP62256794A JP25679487A JPH0528856B2 JP H0528856 B2 JPH0528856 B2 JP H0528856B2 JP 62256794 A JP62256794 A JP 62256794A JP 25679487 A JP25679487 A JP 25679487A JP H0528856 B2 JPH0528856 B2 JP H0528856B2
Authority
JP
Japan
Prior art keywords
unit
access
main memory
msu
priority
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP62256794A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0199143A (ja
Inventor
Nobuo Uchida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62256794A priority Critical patent/JPH0199143A/ja
Priority to CA000577485A priority patent/CA1310429C/en
Priority to AU22318/88A priority patent/AU592717B2/en
Priority to DE3852261T priority patent/DE3852261T2/de
Priority to ES88402360T priority patent/ES2064364T3/es
Priority to US07/246,087 priority patent/US5073871A/en
Priority to EP88402360A priority patent/EP0309330B1/en
Publication of JPH0199143A publication Critical patent/JPH0199143A/ja
Publication of JPH0528856B2 publication Critical patent/JPH0528856B2/ja
Granted legal-status Critical Current

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/30Hydrogen technology
    • Y02E60/50Fuel cells

Landscapes

  • Memory System (AREA)
  • Multi Processors (AREA)
JP62256794A 1987-09-19 1987-10-12 主記憶アクセス制御方法 Granted JPH0199143A (ja)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP62256794A JPH0199143A (ja) 1987-10-12 1987-10-12 主記憶アクセス制御方法
CA000577485A CA1310429C (en) 1987-09-19 1988-09-15 Access priority control system for main storage for computer
AU22318/88A AU592717B2 (en) 1987-09-19 1988-09-16 Access priority control system for main storage for computer
DE3852261T DE3852261T2 (de) 1987-09-19 1988-09-19 Prioritätszugriffssteuerungssystem zum Hauptspeicher für Rechner.
ES88402360T ES2064364T3 (es) 1987-09-19 1988-09-19 Sistema de control de la prioridad de acceso para memoria principal para un ordenador.
US07/246,087 US5073871A (en) 1987-09-19 1988-09-19 Main storage access priority control system that checks bus conflict condition and logical storage busy condition at different clock cycles
EP88402360A EP0309330B1 (en) 1987-09-19 1988-09-19 Access priority control system for main storage for computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62256794A JPH0199143A (ja) 1987-10-12 1987-10-12 主記憶アクセス制御方法

Publications (2)

Publication Number Publication Date
JPH0199143A JPH0199143A (ja) 1989-04-18
JPH0528856B2 true JPH0528856B2 (enrdf_load_stackoverflow) 1993-04-27

Family

ID=17297534

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62256794A Granted JPH0199143A (ja) 1987-09-19 1987-10-12 主記憶アクセス制御方法

Country Status (1)

Country Link
JP (1) JPH0199143A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3036372U (ja) * 1996-10-01 1997-04-15 忠正 高田 防護シート

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04155550A (ja) * 1990-10-19 1992-05-28 Fujitsu Ltd バッファ無効化制御方式
JP2680208B2 (ja) * 1991-07-17 1997-11-19 富士通株式会社 メモリアクセス制御装置
JP2587586B2 (ja) * 1994-05-25 1997-03-05 甲府日本電気株式会社 データ転送方法
JP3398673B2 (ja) * 1994-08-31 2003-04-21 エヌイーシーコンピュータテクノ株式会社 ベクトルデータ処理装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52142441A (en) * 1976-05-21 1977-11-28 Fujitsu Ltd Memory . access control method
JPS6048785B2 (ja) * 1981-04-24 1985-10-29 株式会社日立製作所 主記憶制御方式

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3036372U (ja) * 1996-10-01 1997-04-15 忠正 高田 防護シート

Also Published As

Publication number Publication date
JPH0199143A (ja) 1989-04-18

Similar Documents

Publication Publication Date Title
US5119480A (en) Bus master interface circuit with transparent preemption of a data transfer operation
US4481572A (en) Multiconfigural computers utilizing a time-shared bus
US5682551A (en) System for checking the acceptance of I/O request to an interface using software visible instruction which provides a status signal and performs operations in response thereto
US5799207A (en) Non-blocking peripheral access architecture having a register configure to indicate a path selection for data transfer between a master, memory, and an I/O device
US4675812A (en) Priority circuit for channel subsystem having components with diverse and changing requirement for system resources
EP0535822B1 (en) Methods and apparatus for locking arbitration on a remote bus
GB2075226A (en) Cpu-to-memory interface unit
US4371924A (en) Computer system apparatus for prefetching data requested by a peripheral device from memory
US5649209A (en) Bus coupling information processing system for multiple access to system bus
US5249297A (en) Methods and apparatus for carrying out transactions in a computer system
US4764865A (en) Circuit for allocating memory cycles to two processors that share memory
US5649125A (en) Method and apparatus for address extension across a multiplexed communication bus
US4300194A (en) Data processing system having multiple common buses
CA1143854A (en) Apparatus for interconnecting the units of a data processing system
EP0309330B1 (en) Access priority control system for main storage for computer
JPH0528856B2 (enrdf_load_stackoverflow)
US5206935A (en) Apparatus and method for fast i/o data transfer in an intelligent cell
EP0370780B1 (en) A communication command control system between CPUs
US5243702A (en) Minimum contention processor and system bus system
US4494186A (en) Automatic data steering and data formatting mechanism
EP0118670A2 (en) Priority system for channel subsystem
JPH02143363A (ja) マルチプロセッサ装置における共通メモリ制御方法
JPH0520183A (ja) メモリアクセス制御方式
JPS6132162A (ja) 情報転送の競合防止回路
JPH05108476A (ja) 主記憶制御装置

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees