JPH0527177B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to magnetic recording and reproducing devices, particularly rotary head type magnetic recording and reproducing devices.
This relates to head rotation control and tape feed control in a VTR.

2. Description of the Related Art Conventionally, head rotation control and tape feeding control in a VTR has been performed using a method as shown in FIG. In FIG. 9, the head drum motor 80
A rotation detection signal obtained from a rotation detector 81 (for example, a frequency generator, hereinafter referred to as FG) attached to the motor is input to a speed comparison circuit 82. The speed comparison circuit 82 creates a speed error signal from the rotation detection signal. For example, in the case of an FG signal, the difference between the period of the FG pulse and the reference period is determined and used as the speed error. The speed error signal obtained in this manner is input to the compensation filter 83, and a motor drive command signal is obtained as a filter output. As the compensation filter 83, for example, a circuit as shown in FIG. 7 is used. The circuit shown in FIG. 7 has a large degree of amplification for low frequency inputs, and a control system including such a filter can greatly suppress low frequency disturbances. On the other hand, such filters are often used because the motor does not mechanically respond much to high-frequency disturbances, so there are few problems. The motor drive command signal obtained in this way is input to the motor drive circuit 84 and drives the drum motor 80. The above is the head rotation control method.

Next, tape feed control will be explained. The magnetic tape 94 is fed and controlled by a capstan motor 85. That is, a rotation detection signal is obtained from the rotation detector 86 attached to the capstan motor 85,
A speed comparison circuit 87 converts it into a speed error signal.
Further, an adder 88 adds the obtained speed error signal and tracking error signal and inputs the result to a compensation filter 89. The purpose of calculating the tracking error signal is to enable the bed to follow the recorded trajectory on the recorded tape. The output signal of the compensation filter 89 is sent to the motor drive circuit 90.
is input to drive the capstan motor 85.

The method of obtaining the tracking error differs depending on the VTR system. In FIG. 9, a tracking error is obtained from a reproduction signal obtained from a video head 91 by a tracking error generating circuit 93.

Problems to be Solved by the Invention The following problems can be considered in the VTR motor control circuit described above. First, in controlling two motors, each motor requires its own dedicated circuit. That is, apart from the drive circuit, a dedicated speed comparison circuit, a dedicated compensation filter, etc. are required.

In addition, VTRs are becoming more and more multifunctional, for example,
Various special playback functions such as slow-motion playback, high-speed playback, and reverse playback are required. In this case, in addition to changing the capstan rotation speed,
It is also necessary to change the rotation speed of the head drum. Therefore, it is necessary to set a large number of speed reference values in the speed comparison circuit 87. Although not shown in FIG. 9, there is a possibility that the number of information lines (so-called control signal lines) from the sequence control circuit (actually a microcomputer) that generates such special reproduction commands will increase.

Means for Solving the Problems In the present invention, in order to solve these conventional problems, a microcomputer is used to perform drum motor control and capstan control on the same hardware in a time-sharing manner. Filter calculations synchronized with drum rotation pulses are processed alternately between the drum system and the capstan system.

Operation Input the drum rotation pulse and capstan rotation pulse to the interrupt terminal of the microcomputer,
Speed comparison processing is performed when each pulse is generated.
In synchronization with the drum rotation pulse detection, a digital filter operation clock having a cycle that is an integer fraction of the drum pulse cycle is started, and in synchronization with this clock, each of the drum control digital filter and capstan control digital filter is activated. The calculations are performed alternately every other time. This eliminates the need to perform drum pulse processing and filter calculation, which require particularly high precision, at the same time, making it possible to perform high-precision calculation processing in both cases.

Embodiment Since a one-chip microcomputer is used as an embodiment of the present invention, the one-chip microcomputer will first be described with reference to FIG. FIG. 6 is an internal configuration diagram of an example of a manchip microcomputer.

Instruction RON, data RAM, timer counter, external interrupt interface, ALU (Alithmetic
Logic Unit), parallel input/output ports, etc. are configured on one chip, and it can operate as a computer independently.

Next, digitizing the compensation filter shown in FIG. 7 will be explained. To create a digital circuit, first find the pulse transfer function of the transfer function. For this purpose, a commonly used approximation method called bilinear transformation is used. This is to obtain the pulse transfer function H _(Z) using the conversion formula S=2(1-Z ^-1 )/τ(1+Z ^-1 ) in the analog transfer function. Note that τ is the sampling period. For example, the transfer function G _(S) =1+CR ₂ S/CR ₁ S in FIG. 7 is approximated as follows.

H _(Z) = τ+2CR ₂ /2CR ₁ -2CR ₂ -τ/2CR ₁ Z ^-1 /1-Z ^-1Here , if we set a=τ+2CR ₂ /2CR ₁ and b=2CR ₂ -τ/2CR ₁ , then H _(Z) becomes as follows.

H _(Z) = a-bZ ^-1 /1-Z ^-1 This is converted into a circuit diagram in Figure 8. In FIG. 8, the input signal IN is added to the previous addition value V by an adder 70, and the result is designated as U. The added values U and V are multipliers 72 and 7, respectively.
3, multiplied by a and b times, respectively, and input to an adder 74. The adder 74 calculates the difference,
The result becomes the filter output. On the other hand, delay circuit 7
1, the added value U is delayed every 1 clock and V
That is.

FIG. 1 is a circuit diagram showing the configuration of an embodiment of a control system using the method of the present invention. The FG pulse obtained by the rotation detector 5 attached to the drum motor 4 is input to an external interrupt terminal (INTA) of a one-chip microcomputer (hereinafter abbreviated as microcomputer). Inside the microcomputer 1, the time of the external interrupt pulse, ie, the FG pulse, is measured, the rotation speed is calculated from the pulse period, and the speed error is calculated.
That is, speed comparison processing is performed. Next, at regular intervals, a filter calculation is performed based on the drum rotational speed error to calculate a drum motor drive command value.
The drum motor drive command value drives the head drum motor 4 via the DA converter 2 and motor drive circuit 3.

Further, the FG pulse obtained by the rotation detector 9 attached to the capstan motor 8 is input to another external interrupt terminal (INTB) of the microcomputer 1.
In the following, the speed error is calculated from the FG pulse period, similar to the drum motor. Next, the tracking error value obtained by the AD converter 13 is added to the obtained capstan rotational speed error, and based on this value,
A filter calculation is performed at regular intervals to calculate a capstan motor drive command value. This capstan motor drive command value drives a capstan motor 8 via a DA converter 6 and a motor drive circuit 7.

FIG. 2 is a flowchart of interrupt processing when INTA, that is, drum FG pulse, is detected. First, in block 20, other interrupts are prohibited. This is to prevent the measurement time from being significantly shifted due to another interruption occurring before the time at the time of the interruption is attempted to be measured. Next, block 21 reads the value of timer counter A and stores it in memory.
Store in T _D. Timer counter A is set in advance.
Let it work. (For example, when the power is turned on.) Next, in block 22, timer B is started. The period of timer B is set to half the sampling period τ of the digital filter. In this example, τ=〓P _Dref
It is said that P _Dref is a reference pulse period which will be described later. Next, in block 23, other interrupts are enabled. Other interrupts are Timer B and INTB interrupts. Next, in block 24, a register (or memory) indicating the number of interrupts of timer B is cleared. Then, speed comparison calculations are performed in blocks 25, 26, and 27. First, in block 25, the difference P _D between the currently read value T _D and the previously read value T _D ', that is, the pulse period is determined. and block 26
In this step, the difference E _D between P _D and the reference period P _Dref is determined.
This difference E _D corresponds to the speed error value.
Furthermore, in block 27, the time read this time is
Transfer T _D to the previous value T _D ′. This is preparation for the next pulse detection. Block 2 surrounded by a broken line
8 is a filter calculation process. The variable names V _D , E _D , U _D , a, b, and OUT _D used here correspond to the circuit diagram in FIG. 8. First, block 29 is a process corresponding to adder 70 in FIG. Next, block 30 includes multipliers 72, 73 and adder 74.
This is the process corresponding to. Block 31 is a process corresponding to delay circuit 71. After completing the filter operation in this way, block 32 re-enables the current interrupt, namely INTA, and
Ends INTA interrupt processing. The above is the processing content when INTA, that is, the drum FG pulse is detected.

FIG. 3 is a flowchart showing a case where INTB, that is, a capstan FG pulse is detected.
First, when an INTB interrupt occurs, block 40
Disable other interrupts. Other interrupts are Timer B and INTA. This is for the same reason as block 20 in FIG. Next block 41
Read the value of odor timer counter A and store it in memory.
Store in T _C. Block 42 then enables other interrupts. Then, in blocks 43, 44 and 45, speed comparison calculation processing is performed. In other words, the time read this time in block 43
Subtract the previous value T _C ' from T _C to find the period P _C. Next, in block 44, the difference between the period P _C and the reference value P _Cref is determined to obtain a speed error value E _C. And block 45
The contents of the value T _C read this time at the previous value
Move to T _C ′ and prepare for next time. Then, in block 46, the current interrupt, that is, the INTB interrupt, is re-enabled and the INTB interrupt processing is terminated. The above is the process when detecting the capstan FG pulse.

FIG. 4 is a flowchart of the interrupt processing of timer B started in block 22 of FIG. First, in block 50, a register (or memory) indicating the number of interrupts of timer B is incremented by one. Next, in block 51, it is checked whether the number of interrupts is an odd number or a corner number, and if it is an odd number, the process goes to block 57, and if it is a corner number, the process goes to block 52. Block 52 is a compensation filter calculation for the drum control system. The content of this arithmetic processing is the same as that in the block diagram 28 of FIG. 2, so a description thereof will be omitted. After this filter processing is completed, block 56
, the current interrupt, ie, the timer B interrupt, is re-enabled and the interrupt is terminated. If the number of interrupts is an odd number in block 51, the process advances to block 57. In block 57, the tracking error read from the AD converter 13 is added to the capstan speed error E _C to obtain a new error signal E _CT . Block 58 is a compensating filter calculation for the capstan control system. The variables used here are V _C , E _CT , U _C ,
a', b', and OUT _C correspond to the circuit diagram in FIG. It is distinguished from the drum control filter by a lowercase letter and the symbol '. This is microcontroller 3
This can be handled by having different data RAM addresses. After completing the filter operation, block 6
Proceed to step 2 and check whether the contents of the register (or memory) indicating the number of interrupts is 3 or more. If it is 3 or more, the interrupt processing is directly terminated, and if it is less than 3, the process proceeds to block 56, where timer interrupts are re-enabled and the interrupt processing is terminated. The decision processing in block 62 ensures that timer B interrupts occur no more than three times in a row. As described above, by the processing shown in FIG. 4, when the interrupt count register is 1, the capstan control filter is operated, when it is 2, the drum control filter is operated, and when it is 3, the capstan control filter is operated. Further, when the interrupt count register is 0, that is, when an INTA interrupt occurs, arithmetic processing of the drum control filter is performed. As a result, the processes of the drum control filter and the capstan control filter are executed alternately every other time. Also, from the time the INTA interrupt occurs, timer B
The time until the first interrupt and the timer B interrupt generation cycle are equal, and in the drum control state, the cycle of timer B is τ/2, and τ=1/2
Since P _Dref , the time from the occurrence of the third interrupt of timer B to the occurrence of the INTA interrupt is also equal. Therefore, the period of all filter calculations is τ. Therefore, each filter has a predetermined performance.

FIG. 5 is a timing chart showing the time course of each process when the processes shown in FIGS. 2, 3, and 4 are executed. drum FG
When the pulse rises, the microcomputer performs drum speed comparison processing (arrows a1, a2, a3). Furthermore, timer B is activated in the drum speed comparison process (arrows b1, b2). When the speed comparison process is completed, filter calculation for the drum control system is executed (arrow c
1, c2, c3). Also, when a timer B interrupt occurs, capstan control system filter calculations and drum control system filter calculations are executed alternately (arrow d
1, d2, d3, d4, d5, d6). On the other hand, when the capstan FG pulse rises, capstan speed comparison processing is performed (corresponding to arrows e1, e3, and e4. As for arrow e2, since it overlaps with drum FG, the processing is executed with a little delay. (The execution of the system filter is temporarily interrupted, speed comparison processing is performed, and the filter execution is continued again after completion.)

As can be seen from FIG. 5, there is a time when the microcomputer 1 does not perform any processing. Therefore, you will be able to do other work during this period. For example, it is possible to read switch information from the input port, change the speed reference values P _Dref and P _Cref , stop the motor, and perform sequence control processing. Especially in this case, various commands are sent to microcontroller 1.
Since it is stored in the built-in data RAM, there is no need for control signal lines, making it extremely easy to handle complex processing and multifunctionalization.

Effects of the Invention According to the present invention, it is possible to control two motors by using a common control circuit in a time-sharing manner, and the amount of hardware can be reduced. In particular, it is only necessary to prepare target values for the control system each time, and for this reason,
Control at various speeds can be easily realized.

Further, by time-sharing processing, it is possible to perform sequence control processing at the same time, and in this case, not only the number of circuits is particularly reduced, but also the conventional signal lines between circuits are no longer required, which has a great effect.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing an embodiment of a control system using the method of the present invention, and Fig. 2 is a drum diagram in the same embodiment.
A flowchart showing the processing procedure at the time of FG pulse detection, Figure 3 shows the capstan FG in the same example.
A flowchart showing the processing procedure when detecting a pulse,
FIG. 4 is a flowchart showing the processing procedure when a timer B interrupt occurs in the same embodiment, FIG. 5 is a timing chart showing the temporal transition of time-sharing processing in the same embodiment, and FIG. 6 is used in the same embodiment. , an internal configuration diagram of an example of a one-chip microcomputer, FIG. 7 is a circuit diagram of a conventionally used analog filter, FIG. 8 is a circuit diagram obtained by converting the filter in FIG. 7 into a digital circuit, and FIG. 9 is a circuit diagram of a conventionally used analog filter. The figure is a configuration diagram of a motor control circuit in a conventional VTR. 1...One-chip microcomputer, 2,
6...DA converter, 3,7...motor drive circuit,
4... Head drum motor, 8... Capstan motor, 5, 9... Rotation detector, 13... AD converter.

Claims (1)

[Claims] 1. A magnetic head is mounted on a rotating drum, a magnetic tape is wound around the rotating drum, and the magnetic tape is transported at a constant speed to record and reproduce information signals onto a group of discontinuous recording tracks and onto the magnetic tape. In the magnetic recording and reproducing apparatus, the magnetic recording and reproducing apparatus is configured to detect the rotation of the rotating drum and has a tape transfer detecting means, in which the time of the output signal from the rotation detecting means of the rotating drum is measured, and an interval of this time is set. calculate the rotational speed of the rotating drum, perform filter calculation based on this calculated value to obtain a rotating drum drive command, measure the time of the output signal from the tape transfer detection means, and determine the interval between these times. to calculate the tape transport speed, perform a filter operation based on this calculated value, obtain a tape transport means drive command, and control the rotating drum rotation speed and tape transport speed in a time-sharing manner. Then, the rotation detection signal of the rotating drum is determined to be an integer fraction of the rotation detection signal period of the rotating drum.
1. A method of controlling a magnetic recording and reproducing apparatus, characterized in that the filter calculation for controlling the rotating drum rotation speed and the filter calculation for tape transfer control are executed alternately every cycle.