JPS61178762A - Method for controlling magnetic recording and reproducing device - Google Patents

Abstract

PURPOSE:To reduce the number of hardware by applying time division processing to a control circuit where two motors are common so as to control said circuit. CONSTITUTION:An FG pulse available from a rotation detector 5 installed on a drum motor 4 and that available from a rotation detector 9 fitted on a capstan motor 8 are inputted to the separate external offering terminal (INTB) from a one-chip microcomputer 1, and a speed error is calculated from an FS pulse period. Then a tracking error available from an A/D converter 13 is added to the obtained rotation speed error, and according to the calculated value the filter arithmetic is executed at every constant period to calculate a capstan motor drive command value, which drives the capstan motor 8 through a D/A converter 6 and a motor drive circuit 7. Both arithmetic are alternately executed, and therefore it is unnecessary that the drum pulse processing and the filter calculation, both of which demand especially high accuracy, are executed simultaneously, whereby the arithmetic processing can be attained at high accuracy.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a magnetic recording/reproducing apparatus, particularly head rotation control and tape feeding control in a rotary head type VTR.

2. Description of the Related Art Conventionally, head rotation control and tape feeding control in a VTR has been performed using the method shown in No. 9-. In FIG. 9, a rotation detection signal obtained from a rotation detector 81 (for example, a frequency generator, hereinafter referred to as FG) attached to the head drum and motor 80 is input to a speed comparison circuit 82. The speed comparison circuit 82 creates a speed error signal from the rotation detection signal. For example, if there is an FG multiplied signal, then FG
Find the difference between the pulse period and the reference period and use it as the speed error. The speed error signal thus obtained is input to the compensation filter 83, and a motor drive command signal is obtained as a filter output. As the compensation filter 83, for example, a circuit as shown in FIG. 7 may be used.

The circuit shown in FIG. 7 has a large degree of amplification for low frequency inputs, and a control system including such a filter can greatly suppress low frequency disturbances. −
Such filters are often used because the motor does not mechanically respond much to disturbances caused by high-frequency blades, so there are few problems. The motor drive command signal obtained in this way is input to the motor drive circuit 84,
Drive the drum motor 8o. The above is the head rotation control method.

Next, tape feed control will be explained. The magnetic tape 94 is fed and controlled by a capstan motor 85. That is, the rotation detector 8 attached to the capstan motor 86
A rotation detection signal is obtained from 6 and converted into a speed error signal by a speed comparison circuit 87.

Further, in the adder 88, the obtained speed error signal and
The tracking error signal is added and inputted to the compensation filter 89. The purpose of adding the tracking error signal is to enable the head to follow the recorded trajectory on the recorded tape. The output signal of the compensation filter 89 is input to a motor drive circuit 90 to drive the capstan motor 85.

The method of obtaining the tracking error differs depending on the VTR system. In FIG. 9, a tracking error is obtained from a reproduction signal obtained from a video head 91 by a tracking error generating circuit 93.

Problems to be Solved by the Invention Now, in the VTR motor control circuit described above,
The following may be considered. First, in order to control two motors, a dedicated circuit is required for each motor. That is, apart from the drive circuit, a dedicated speed comparison circuit, a dedicated compensation filter, etc. are required.

In addition, VTRs have become increasingly multi-functional and require various special playback functions, such as slow-motion playback, high-speed playback, and reverse playback. In this case, it is necessary to change not only the capstan rotation speed but also the head drum rotation speed. Therefore, it is necessary to set a large number of speed reference values in the speed comparison circuit 87. Although not shown in FIG. 9, there is a possibility that the number of information lines (so-called control signal lines) from the sequence control circuit (actually a microcomputer) that generates such special reproduction commands will increase.

Means for Solving the Problems In the present invention, in order to solve these conventional problems, a microcomputer is used to control the drum motor.
Capstan control is performed in a time-division manner using the same hardware, and filter calculations synchronized with drum rotation pulses are processed alternately between the drum system and the cabstan system.

Operation Drum rotation pulses and capstan rotation pulses are input to the interrupt terminal of the microcomputer, and speed comparison processing is performed when each n pulse is generated.

In synchronization with drum rotation pulse detection, a digital filter operation clock having a cycle that is an integer fraction of the drum pulse cycle is started, and in synchronization with this clock, the drum control digital filter and capstan control digital filter are activated. Each operation is realized alternately every other time. This eliminates the need to perform drum pulse processing and filter calculation, which require particularly high precision, at the same time, making it possible to perform high-precision calculation processing in both cases.

Embodiment Since a one-chip microcomputer is used as an embodiment of the present invention, the one-chip microcomputer will first be explained with reference to FIG.

FIG. 6 is an internal configuration diagram of an example of a manchip microcomputer.

Instruction ROM, data RAM, timer counter, external interrupt interface, ALU (Ali thm
etc., parallel input/output ports, etc. are configured on one chip, and it can operate as a computer by itself.

Next, digitizing the compensation filter shown in FIG. 7 will be explained. To create a digital circuit, first find the pulse transfer function of the transfer function. For this purpose, a commonly used approximation method called bilinear transformation is used. This n is used to find the transfer function H(Z) in the analog transfer function. Note that τ is the sampling period. For example, the transfer function 1-Z-' in FIG. 7 is as follows.

a -bZ -' 轡4=-Z-1 This is converted into a circuit diagram as shown in Fig. 8. In FIG. 8, the input signal IN is the previous addition value V and the adder 7.
0 is added, and the result is defined as U. The added values U and V are input to nine multipliers 72 and 73, respectively, and
The signal is multiplied by b times and input to the adder 74. An adder 74 calculates the difference, and the result becomes the filter output. On the other hand, the delay circuit 71 delays the added value U every clock to obtain V.

FIG. 1 is a circuit diagram showing the configuration of an embodiment of a control system using the method of the present invention. An FG pulse obtained by a rotation detector 6 attached to the drum motor 4 is input to an external interrupt terminal (INTA) of a one-chip microcomputer 1 (hereinafter abbreviated as microcomputer). Inside the microcomputer 1, the time of the external interrupt pulse, that is, the FG pulse, is measured, the rotational speed is calculated from the pulse period, a calculation is performed to calculate the speed error, and the drum motor drive command/command value is calculated.Drum The motor drive command value drives the head drum motor 4 via the DA converter 2 and the motor drive circuit 3.

Further, the FG pulse obtained by the rotation detector 9 attached to the capstan motor 8 is input to another external interrupt terminal (iNTB) of the microcomputer 1.

The following is the same as the drum motor, from the FG pulse period.

Calculate the speed error. Next, the tracking error value obtained from the AD converter 13 is added to the obtained capstan rotational speed error, and based on this value, filter calculation is performed at regular intervals, and the capstan motor drive command value is Calculate. This capstan motor drive command value is sent to the DA converter 6.
and drives the capstan motor 8 via the motor drive circuit 7.

FIG. 2 is a 70-chart of interrupt processing when INTA, that is, a drum FG pulse is detected. First, in block 20, other interrupts are prohibited. This method prevents the measurement time from being distorted due to another interruption occurring before the time at the time of the interruption is attempted to be measured. Next, in block 21, the value of the timer counter A is read and stored in the memory TD. Timer counter A is set in advance.
Leave it working. (For example, when the power is turned on.) Next, in block 22, timer B is started. The period of timer B is set to half the sampling period τ of the digital filter. In this embodiment, τ=y6PDref. P.D.
ref is a reference pulse period which will be described later. Next, in block 23, other interrupts are enabled. What are other interrupts?
These are timer B and INTB interrupts. Next block 24
and a register (or memory) indicating the number of interrupts of timer B.
Clear. Then, speed comparison calculations are performed in blocks 25, 26, and 27. First, in block 25, the difference PD between the currently read value T and the previously read value TD', that is, the pulse period is determined. And in block 26,
The difference ED between PD and the reference period PDrsf is determined. This difference ED corresponds to the speed error value. Furthermore, in block 27, the time TD read this time is set to the previous value TD.
’. This is preparation for the next pulse detection. A block 28 surrounded by a broken line is a filter calculation process. Variable names used in this: VD, ED, UD, a, b,
0UTD corresponds to the circuit diagram of FIG. 8. First, block 29 is a process corresponding to the adder 7o of FIG.

Next, block 3o includes multipliers 72, 73 and adder 74.
This is the process corresponding to . and block 31 carrying circuit 7
This is the process corresponding to 1. After completing the filter operation in this manner, the current interrupt, ie, INTA, is re-enabled at block 32, thereby terminating the INTA interrupt processing. The above is the processing content when INTA, that is, the drum FG pulse is detected.

FIG. 3 is a flowchart showing the processing when INTB, that is, the capstan FG pulse is detected. first,
When the INTB interrupt occurs, block 40 disables other interrupts. Other interrupts are timer B and IN
I am a TA. This process is for the same reason as block 20 in FIG. Next, in block 41, the value of timer counter A is read and stored in memory Tc.In block 42, another interrupt is enabled. And block 43゜4
4 and 45, speed comparison calculation processing is performed.

That is, the time TO read this time in block 43
The previous value Tc' is subtracted from the value Tc' to obtain the period PC. Next, in block 44, the difference between the period PC and the reference value PCref is determined to obtain a speed error value EC. Then, in block 45, the contents of the value TC read this time are transferred to the previous value Tc' to prepare for the next time. Then, in block 4e, the current interrupt, that is, the interrupt of INTB, is re-enabled and the INTB interrupt is re-enabled.
TB interrupt processing ends. The above is the capstan FG
This is the processing at the time of pulse detection.

FIG. 4 is a flowchart of the interrupt processing of timer B started in block 22 of FIG. First block 60
At , the register (or memory) indicating the number of interrupts of timer B is incremented by 1. Next, the process advances to block 62.

Block 62 is a compensation filter calculation for the drum control system. The content of this arithmetic processing is the same as that of block 28 in FIG. 2, so a description thereof will be omitted. After this filter processing is completed, block 66
Proceed to re-enable the current interrupt, ie, the 2478 interrupt, and end the interrupt. If the number of interrupts is an odd number in block 61, the process advances to block 67. block 67
In the capstan speed error Ec, the AD converter 13
A new error signal E0 is obtained by adding the more read tracking errors.

Block 68 is a compensation filter calculation for the capstan control system. Variables vc and EcT used here.

UC, a', b', 0UTC correspond to the circuit diagram of FIG. It is distinguished from the drum control filter by a lowercase letter and the symbol '. This can be handled by changing the addresses of the data RAM in the microcomputer 3.

When the filter operation is completed, the process proceeds to block 62, where it is checked whether the contents of the register (or memory) indicating the number of interrupts is 3 or more. Due to the judgment process of the 0 block 62, which allows three or more interrupts and ends the interrupt process, 2478 interrupts can occur no more than three times in a row. As described above, according to the processing shown in FIG. 4, when the interrupt count register is 1, the capstan control filter is operated, when it is 2, the drum control filter is operated, and when it is 3, the capstan control filter is operated. Further, when the interrupt count register is 0, that is, when an INTA interrupt occurs, calculation processing of the drum control filter is performed. As a result, the processes of the drum control filter and the capstan control filter are executed alternately every other time. In addition, 24 seconds have passed since the INTA interrupt occurred.
The time until the first 78 interrupt and the 2478 interrupt generation cycle are the same, and in the drum control state, timer B
Since the period of is B2 and τ=3APD ref, the time from the occurrence of the third interrupt of timer B to the occurrence of the INTA interrupt is also equal. For this reason, the period of filter calculation is the same in all cases. Therefore, each filter has a predetermined performance.

FIG. 6 is a timing chart showing the temporal transition of each process when the processes shown in FIGS. 2, 3, and 41 are executed. When the drum system filter starts up, the microcomputer performs drum speed comparison processing (arrow a1,
a2. a3). Further, in the drum speed comparison process, timer Bt is started (arrows b1 and b2). When the speed comparison process is completed, a filter calculation for the drum control system is executed (arrows C1°c2, c3). Furthermore, when a tie 13 interrupt occurs, the capstan control system filter calculation and the drum control system filter calculation are executed alternately (arrow d1.
d2゜ds, d4. dB, da). On the other hand, when the capstan FG pulse rises, capstan speed comparison processing is performed (for the Q arrow e2 corresponding to the arrows @1, @3, and @4, since it overlaps with the drum FG, the process is executed with a slight delay). Arrow e3 indicates that the execution of the drum filter is temporarily interrupted, speed comparison processing is performed, and after the completion, the filter execution is continued again.)0 As can be seen from Figure 6, there is no processing for the microcomputer 1. There are times when I am not doing this. Therefore, you will be able to do other work during this period. For example, read switch information etc. from the input boat and set the speed reference value P.
It is possible to perform processing such as changing Draf and PCref, stopping the motor, and further performing sequence control processing. In this case, various commands are stored in the built-in data RAM of the microcomputer 1, so there is no need for control signal lines, making it extremely easy to handle complex processing and multifunctionalization. Effects According to the present invention, two motors can be controlled by a common control circuit through time-sharing processing, and a reduction in hardware can be realized. In particular, it is only necessary to prepare the target value of the control system each time, and therefore, it is possible to easily control the speed at various speeds.

In addition, by time-sharing processing, it is possible to perform sequence control processing at the same time, and in this case, the number of circuits is reduced, and the conventional signal lines between circuits are no longer required.
The effect is great.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an example of a control system using the method of the present invention, FIG. 2 is a flowchart showing a processing procedure when detecting a drum FG pulse in the example, and FIG. 3 is a cap diagram in the same example. A flowchart showing the processing procedure at the time of stun FG pulse detection, FIG. 4 is a tie 13 in the same embodiment.
FIG. 6 is a flowchart showing the processing procedure when an interrupt occurs, and FIG. 6 is a timing chart showing the temporal transition of time-sharing processing in the same embodiment. FIG. 6 is used in the same embodiment. An internal configuration diagram of an example of a one-chip microcomputer, FIG. 7 is a circuit diagram of a conventionally used analog filter, and FIG. 8 is a diagram of a circuit obtained by converting the filter in FIG. 7 into a digital circuit.
Figure 9 is a configuration diagram of a motor control circuit in a conventional VTR.
...DA converter, 3.7, old...motor drive circuit, 4
...Head drum motor, 8...Capstan motor, 6,9...Rotation detector, 13.
...AD converter. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2, Figure 3, Figure 4, Figure 6, Figure 7, Figure 8.

Claims (1)

[Claims] A magnetic head is mounted on a rotating drum, a magnetic tape is wound around the rotating drum, and the magnetic tape is transported at a constant speed to record and reproduce information signals on the magnetic tape as a group of discontinuous recording tracks. In a magnetic recording and reproducing apparatus configured as above and having a rotation detecting means for the rotary drum and a tape transport detecting means, the time of the output signal from the rotation detecting means for the rotary drum is measured, and the rotation is detected at an interval of this time. The rotational speed of the drum is calculated, a filter calculation is performed based on this calculated value, a rotating drum drive command is obtained, and the time of the output signal from the tape transfer detection means is measured. A transfer speed is calculated, a filter calculation is performed based on this calculated value, a tape transfer means drive command is obtained, and when the rotation speed of the rotary drum and the tape transfer speed are controlled in a time-sharing manner, the rotation speed of the rotary drum is The rotary drum rotation speed control filter operation and the tape transfer control filter operation are alternately executed every cycle that is an integer fraction of the rotation drum rotation detection signal cycle based on the rotation detection signal. A method of controlling a magnetic recording/reproducing device.