JPH0526771Y2 - - Google Patents

Description

[Detailed description of the invention] A. Industrial application field The present invention relates to a reverse conduction type gate turn-off thyristor (hereinafter referred to simply as "GTO"), and in particular the main
It is characterized by a structure for separating the GTO section and the diode section.

B. Summary of the invention This invention is a reverse conduction type GTO that has a structure in which the main GTO section, auxiliary GTO section, and diode section are integrated with a common base layer of the main GTO section. At the same time, the depth of the n-type semiconductor layer, which is the emitter layer of the auxiliary GTO part, is controlled to
The semiconductor layer is formed into a high-resistance layer, which allows the main
By separating the GTO section and diode section, variations in the off-characteristics of the main GTO section can be eliminated.
This is intended to improve yield.

C. Prior Art A reverse conduction type GTO having an amplification gate structure has a main GTO section 1 and an auxiliary GTO section 2 for amplifying the gate current of this main GTO section 1, as shown in Fig. 4.
, a diode section 3 connected in antiparallel to the main GTO section 1, and a diode 4 and a Zener diode 5 as auxiliary circuits for ensuring turn-off of the auxiliary GTO section 2. The structure of such a reverse conduction type GTO is shown in Figure 5.
Part 1 is a stack of _P1 layer of p-type semiconductor which is an emitter layer, N1 layer of n-type semiconductor which is base _layer , _P2 layer of p-type semiconductor and _N2 layer of n-type semiconductor which is emitter layer. It consists of The auxiliary thyristor section 2 shares the P ₁ layer, N ₁ layer, and P ₂ layer, and further includes an N ₃ layer of n-type semiconductor as an emitter layer, and the diode section 3 shares the P ₁ layer, N 1 layer, and P ₂ layer. A layer is shared, and a _P3 layer of a p-type semiconductor and an _N4 layer of an n-type semiconductor are provided on both sides of the laminated portion. In addition, in order to separate the main GTO section 1 and the diode section 3, a digging section 6 is provided in the _P2 layer between the main GTO section 1 and the diode section 3.
is formed, and the _P2 layer immediately below this is formed as a high-resistance layer R. In FIG. 5, A is an anode terminal, K is a cathode terminal, _G1 is a gate terminal, and l is a central axis. Further, 7 and 8 are the cathode electrode and gate electrode of the main GTO section 1, respectively, 9 and 10 are the cathode electrode and gate electrode of the auxiliary GTO section 2, respectively, and 11 is the anode electrode of the diode section 3.

D Problems to be solved by the invention In the GTO having the above structure, during the turn-off operation of the main GTO section 1, the cathode electrode 7 of the main GTO section 1 and the anode electrode 11 of the diode section 3 are connected via the high resistance layer R. Since they are electrically connected, when a reverse voltage for turn-off is applied between the cathode terminal K and gate terminal _G1 , the main
The reverse voltage to be applied to the junction between the _N2 layer and the _P2 layer of the GTO section 1 is determined by the voltage drop value of the high resistance layer R. Therefore, if the resistance value of the high resistance layer R is not accurately controlled, it will cause variations in the off-characteristics of the GTO. By the way, in conventional GTO,
Since the trenched portion 6 is formed by etching and the high-resistance layer R is formed directly below it, it is difficult to control the depth of the trenched portion, and the in-plane uniformity is also poor. As a result, variations occur in the off-characteristics of the GTO,
This is a cause of poor yield. In addition to these problems, there is also the problem that the process of forming the digging portion is complicated.

The present invention aims to solve these problems.

E. Means for solving the problem The present invention forms the auxiliary GTO section so as to be sandwiched between the main GTO section and the diode section, and
The gate electrode of the auxiliary GTO section is arranged between its cathode electrode and the cathode electrode of the main GTO section, an n-type semiconductor layer is provided between the _N2 layer and the gate electrode of the auxiliary GTO section, and the auxiliary GTO section The depth of the _N3 layer is controlled to form the _P2 layer immediately below the _N3 layer as a high-resistance layer. According to this configuration, the main GTO section and the diode section are separated by the high resistance layer, and the gate current of the auxiliary GTO section is blocked by the n-type semiconductor layer, and the gate current is transferred to the main GTO section. does not flow into the _N2 layer.

F Embodiment FIG. 1 is a diagram showing an embodiment of the present invention. In this embodiment, a diode section 3 is arranged in the center, and a main section is arranged so as to surround this diode section 3.
Place GTO section 1, diode section 3 and main GTO
The auxiliary GTO section 2 is arranged to be sandwiched between the sections 1, and each section is formed in a concentric circle shape. Then, by controlling the depth of the N ₃ layer of the auxiliary GTO section 2, the P ₂ layer immediately below it is formed as a high resistance layer R, thereby forming the diode section 3 and the main GTO section 1.
Separate. Furthermore, P ₂ between the N ₂ layer of the main GTO section 1 and the gate electrode 10 of the auxiliary GTO section 2
The layer forms an _N5 layer of n-type semiconductor so that the gate current from the gate electrode 10 does not flow into the _N2 layer.

To describe the operation of a GTO with such a configuration, a forward voltage is applied between the anode terminal A and the cathode terminal K so that the anode terminal A is on the positive side, and the gate terminal _G1 and the cathode terminal K
When a forward voltage for turn-on is applied between gate terminal G ₁ → gate electrode 1
0→N ₃ layers→cathode electrode 9→gate electrode 8→N ₂
It flows along the path of layer → cathode electrode 7 → cathode terminal K, and thereby the auxiliary GTO section 2 is ignited. Here, since the gate current from the gate electrode 10 is blocked by the _N5 layer, it does not directly flow into the _N2 layer. When the auxiliary GTO section 2 is ignited, a large current flows into the gate electrode 8, so that the main GTO section 1 is subsequently ignited. Next, when a reverse voltage for turn-off is applied between the gate terminal _G1 and the cathode terminal K, the auxiliary GTO2 and the main GTO1 are turned off.

Next, referring to an example of manufacturing the GTO shown in FIG. 1, first, as shown in FIG. 2a, gallium is diffused to a predetermined depth on both sides of an n-type semiconductor silicon wafer to form a P ₀ layer, an N ₁ layer, A P ₂ layer is formed, and then the P ₀ layer is removed by polishing or etching. Next, the surface of the laminate of the N ₁ layer and the P ₂ layer is coated with an oxide film such as silicon dioxide to form a window in a predetermined area, and phosphorus is diffused through the window to form N on the surface of the laminate. ₂ layers, N ₃ layers, N ₄ layers and N ₅ layers are formed (Figure 2b). Furthermore, after coating the surface of the laminate with an oxide film, a window is opened in a predetermined area and boron is diffused through the window to form a P ₁ layer and a P ₃ layer (FIG. 2c). Note that the phosphorus diffusion step and the boron diffusion step may be performed in reverse. Next, by performing lifetime control, installing electrodes, and performing surface treatment including beveling.
GTO is created. The surface of the _P2 layer and the surface of each joint are coated with an oxide film.

In the above, the present invention has the diode section 3, the auxiliary
Instead of forming the GTO section 2 and the main GTO section 1 concentrically, each section may be arranged horizontally as shown in FIG.

G. Effect of the invention As described above, according to the invention, the auxiliary GTO department
The main GTO is formed by forming the _P2 layer directly below the _N3 layer as a high resistance layer.
Since the _N3 layer can be formed by a normal diffusion process, the depth of the _N3 layer can be controlled with extremely high precision, which allows the high resistance layer to be separated from the diode part. Since the resistance values of the GTO can be made the same, variations in the off-characteristics of the GTO are improved, and the yield is also improved. further assistance
Since the high resistance layer can be formed at the same time as the formation of the _N3 layer in the GTO section, it is possible to form
Compared to GTO, there is no need for the complicated process of digging, simplifying the manufacturing process.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing the structure of an embodiment of the present invention;
Fig. 2 is a process diagram showing the manufacturing steps, Fig. 3 is a plan view showing another embodiment of the present invention, Fig. 4 is a circuit diagram showing a reverse conduction type gate turn-off thyristor, and Fig. 5 is a conventional reverse conduction type gate turn-off thyristor. FIG. 2 is a cross-sectional view showing the structure of a gate turn-off thyristor. 1...Main GTO section, 2...Auxiliary GTO section, 3...
Diode part, 7, 9...Cathode electrode, 8, 1
0...Gate electrode.

Claims (1)

[Claims for Utility Model Registration] _P1 layer of p-type semiconductor as emitter layer, _N1 layer of n-type semiconductor as base layer, and _P2 layer of p-type semiconductor
a main gate turn-off thyristor section formed by stacking a layer and an _N2 layer of an n-type semiconductor as an emitter layer;
A diode part that shares the base layer and is connected in anti-parallel to the main gate turn-off thyristor part, and a diode part that shares the base layer and has an _N3 layer of an n-type semiconductor as an emitter layer, and has a diode part that shares the base layer and is connected in antiparallel to the main gate turn-off thyristor part; In a reverse conduction type gate turn-off thyristor comprising an auxiliary gate turn-off thyristor section that supplies gate current to the thyristor section, a diode section is arranged in the center, and the main gate turn-off thyristor section is arranged so as to surround this diode section. The auxiliary gate turn-off thyristor section is formed between the diode section and the main gate turn-off thyristor section, and the gate electrode of the auxiliary gate turn-off thyristor section is connected to its cathode electrode and the cathode electrode of the main gate turn-off thyristor section. between the _N2 layer and the gate electrode of the auxiliary gate turn-off thyristor section to prevent the gate current from the gate electrode from flowing into the _N2 layer.
In order to separate the main gate turn-off thyristor section and the diode section, the depth of the _N3 layer of the auxiliary gate turn-off thyristor section is controlled to increase the _P2 layer immediately below the _N3 layer. A reverse conduction type gate turn-off thyristor characterized by being formed in a high resistance layer.