JPH05259437A - Semiconductor device - Google Patents

Semiconductor device

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Publication number
JPH05259437A
JPH05259437A JP8605892A JP8605892A JPH05259437A JP H05259437 A JPH05259437 A JP H05259437A JP 8605892 A JP8605892 A JP 8605892A JP 8605892 A JP8605892 A JP 8605892A JP H05259437 A JPH05259437 A JP H05259437A
Authority
JP
Japan
Prior art keywords
type semiconductor
conductivity type
semiconductor
electrode
conduction type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8605892A
Other languages
Japanese (ja)
Other versions
JP3103665B2 (en
Inventor
Masaru Wakatabe
勝 若田部
Shinji Kuri
伸治 九里
Takashi Suga
孝 菅
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shindengen Electric Manufacturing Co Ltd
Original Assignee
Shindengen Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shindengen Electric Manufacturing Co Ltd filed Critical Shindengen Electric Manufacturing Co Ltd
Priority to JP8605892A priority Critical patent/JP3103665B2/en
Publication of JPH05259437A publication Critical patent/JPH05259437A/en
Application granted granted Critical
Publication of JP3103665B2 publication Critical patent/JP3103665B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To obtain a semiconductor device having an extremely small reverse leakage current, a low loss, high withstand voltage and high speed. CONSTITUTION:This semiconductor device is so constituted that, if the shortest distance of one-conduction type semiconductor 1 (for instance N) sandwiched by a pair of reverse conduction type semiconductor regions 6 (for instance P+) is WN, and if the depletion layer width having zero potential to be decided by specific resistance of the regions of a one-conduction type semiconductor and a reverse conduction type semiconductor is Wbi, it is to be 0<WN<=2Wbi, further, the one-conduction type semiconductor of the part to come in contact with an electrode A is made a second one-conduction type semiconductor 8 having a different resistant value from one-conduction type semiconductor of the other part.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体装置の構造に関
するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the structure of a semiconductor device.

【0002】[0002]

【従来の技術】周知のように、半導体装置の特性、特
に、順方向特性、逆方向特性、及びス(2)イッチング
特性の改善のための開発が進められ、種々の構造が提案
されている。
2. Description of the Related Art As is well known, development has been advanced to improve the characteristics of semiconductor devices, in particular, the forward characteristics, the backward characteristics, and the switching characteristics (2), and various structures have been proposed. ..

【0003】図1に、周知のショットキバリア型半導体
装置の断面構造図を示す。1は一導電型半導体(例えば
N型)、1′は高濃度一導電型半導体(例えばN+型)、2
はガ−ドリング領域(例えばP+型)、3は絶縁膜、4
は電極、5はオ−ミック電極である。このような構造で
は、ガ−ドリング領域2の形成により耐圧を高めている
が、電極4と一導電型半導体1の接触の中央部における
逆漏れ電流を減少していない。又、図1の従来構造を改
善するため、特公昭59−35183等が提案されてい
る。
FIG. 1 shows a cross-sectional structural view of a known Schottky barrier type semiconductor device. 1 is a one conductivity type semiconductor (eg N type), 1'is a high concentration one conductivity type semiconductor (eg N + type), 2
Is a guarding region (for example, P + type), 3 is an insulating film, 4
Is an electrode, and 5 is an ohmic electrode. In such a structure, the breakdown voltage is increased by forming the guard ring region 2, but the reverse leakage current at the central portion of the contact between the electrode 4 and the one conductivity type semiconductor 1 is not reduced. Further, in order to improve the conventional structure shown in FIG. 1, Japanese Patent Publication No. 59-35183 and the like have been proposed.

【0004】[0004]

【発明が解決しようとする課題】半導体装置の利用上、
前記せる従来構造より、更に、逆漏れ電流が小さく、し
かも順方向特性及びスイッチング特性がPN接合構造の
それらより改善された半導体装置が要求されている。
SUMMARY OF THE INVENTION In utilizing a semiconductor device,
There is a demand for a semiconductor device having a reverse leakage current smaller than that of the conventional structure described above, and more improved forward characteristics and switching characteristics than those of the PN junction structure.

【0005】[0005]

【課題を解決するための手段】一導電型半導体の表面に
複数の逆導電型半導体領域を形成し、該逆導電型半導体
領域ではさまれた一導電型半導体の表面に電極を設け、
一対の逆導電型半導体領域ではさまれた一導電型半導体
の最短距離をWN、一導電型半導体と逆導電型半導体領
域の比抵抗で決まる零電位の空乏層幅をWbiとしたと
き、0<WN≦2Wbiであるように構成し、かつ、電極
と接する部分の一導電型半導体を他の部分の一導電型半
導体とは抵抗値の異なる第2の一導電型半導体とするこ
とを基本的な特徴とするものであり、それにより前記の
課題を解決する。
A plurality of opposite conductivity type semiconductor regions are formed on the surface of a one conductivity type semiconductor, and electrodes are provided on the surface of the one conductivity type semiconductor sandwiched between the opposite conductivity type semiconductor regions.
When the shortest distance between one conductivity type semiconductors sandwiched between a pair of opposite conductivity type semiconductor regions is WN and the zero potential depletion layer width determined by the specific resistance between the one conductivity type semiconductor and the opposite conductivity type semiconductor regions is Wbi, 0 < Basically, it is configured such that WN ≦ 2Wbi, and the one-conductivity-type semiconductor in contact with the electrode is a second one-conductivity-type semiconductor having a resistance value different from that of the other-part one-conductivity-type semiconductor. It is a feature and solves the above problems.

【0006】[0006]

【実施例】(3)図2及び図3は本発明の実施例を示す
断面構造図であり、図1と同一符号は同一部分をあらわ
す、一導電型半導体の表面形状を、図2では平面状に、
又、図3では凹凸状とした実施例である。
(3) FIG. 2 and FIG. 3 are sectional structural views showing an embodiment of the present invention, in which the same reference numerals as those in FIG. In a
In addition, FIG. 3 shows an example in which unevenness is provided.

【0007】本発明の主たる構造的特徴は、第1に、逆
導電型半導体領域6(例えば、P+型)を形成し、一導
電型半導体1と逆導電型半導体領域6の比抵抗で決まる
零電位の空乏層をWbiとしたとき、一対の逆導電型半導
体領域6ではさまれた一導電型半導体1の最短距離WN
が0<WN≦2Wbiの関係にあること、及び第2に、一
導電型半導体1とは抵抗値の異なる第2の一導電型半導
体8を電極4と接触せしむることにある。なお、抵抗値
の異なる第2の一導電型半導体8の形成の一般的手段
は、一導電型半導体1の不純物濃度より高濃度又は低濃
度にすることにより得られる。
The main structural feature of the present invention is that, firstly, a reverse conductivity type semiconductor region 6 (for example, P + type) is formed and is determined by the specific resistance of the one conductivity type semiconductor 1 and the reverse conductivity type semiconductor region 6. When the depletion layer of zero potential is Wbi, the shortest distance WN of the one conductivity type semiconductor 1 sandwiched between the pair of opposite conductivity type semiconductor regions 6
Is in the relation of 0 <WN ≦ 2Wbi, and secondly, the second one conductivity type semiconductor 8 having a resistance value different from that of the one conductivity type semiconductor 1 is brought into contact with the electrode 4. A general means for forming the second one-conductivity-type semiconductor 8 having a different resistance value can be obtained by setting the impurity concentration to be higher or lower than the impurity concentration of the one-conductivity-type semiconductor 1.

【0008】電極4として周知のバリア金属を用いた本
発明構造のショットキバリア半導体装置を制作し、図4
に逆方向特性図、図5に順方向特性図、及び図6にスイ
ッチング特性図をそれぞれ示し、本発明構造の優れた特
性を、従来構造の特性に対比した。いずれもa及びbの
曲線が本発明構造による特性を示し、従来構造として、
図1の構造のものと、図2の形状であっても一導電型半
導体1の最短距離WNと零電位の空乏層幅Wbiの関係が
WN>2Wbiの構造のものを比較のために示した。
A Schottky barrier semiconductor device having the structure of the present invention using a well-known barrier metal as the electrode 4 is manufactured and shown in FIG.
A reverse characteristic diagram is shown in FIG. 5, a forward characteristic diagram is shown in FIG. 5, and a switching characteristic diagram is shown in FIG. 6, respectively, and the excellent characteristics of the structure of the present invention are compared with those of the conventional structure. In both cases, the curves of a and b show the characteristics according to the structure of the present invention.
For comparison, the structure of FIG. 1 and the structure of FIG. 2, in which the relationship between the shortest distance WN of one conductivity type semiconductor 1 and the depletion layer width Wbi at zero potential is WN> 2Wbi are shown. ..

【0009】図2及び図3の電極4は第2の一導電型半
導体8の表面と逆導電型半導体領域6の表面にまたがっ
て設けられているが、実施の態様によっては必ずしもま
たがって設ける必要はなく、少なくとも、第2の一導電
型半導体8の表面、及び一対の逆導電型半導体領域6の
表面に存在すればよい。
The electrodes 4 of FIGS. 2 and 3 are provided over the surface of the second semiconductor 8 of one conductivity type and the surface of the semiconductor region 6 of opposite conductivity type. However, depending on the embodiment, it is not always necessary to provide them. However, it suffices that it exists at least on the surface of the second one conductivity type semiconductor 8 and the surface of the pair of opposite conductivity type semiconductor regions 6.

【0010】電極4の材料としてはショットキ接触をな
すバリア金属でなくともよく、オ−ミック金属、その他
の導電材料など電極を形成し得る材料のいずれであっ
(4)てもよい。
The material of the electrode 4 does not have to be a barrier metal which makes Schottky contact, but may be any material capable of forming an electrode (4) such as an ohmic metal or other conductive material.

【0011】次いで、本発明構造の作用を具体的な実施
例にもとづいて説明する。図7は電子ポテンシアルダイ
アグラムであり、a及びbに本発明構造の曲線を示し
た。即ち、aは第2の一導電型半導体8として、厚さ
0.7μm、比抵抗0.5Ω・cm、bは第2の一導電型
半導体8として、厚さ0.7μm、比抵抗8Ω・cmを
公知のエピタキシアルシリコン堆積により形成して得た
ものである。第2のN型半導体8とショットキバリア金
属4が0.5eVの接触電位、N型半導体1として5Ω
cm比抵抗、WNとして0.5μm、P+半導体領域6は
不純物表面濃度1×1020Atoms/cm3、Side Dif
fusion率0.1、P+半導体領域6の拡散深さ2μm、P
+半導体領域6の幅2μmの場合における一対のP+半導
体領域6の最短距離WNの中央点OからN型半導体1の
深さ方向への距離Xに至る電子ポテンシアルを示してい
る。図7のごとく、WN>2Wbiの従来構造ではみられ
ない電子ポテンシアルのもち上がり現象が生じた。
Next, the operation of the structure of the present invention will be described based on a specific embodiment. FIG. 7 is an electronic potential diagram, and the curves of the structure of the present invention are shown in a and b. That is, a is the second one-conductivity type semiconductor 8 having a thickness of 0.7 μm and a specific resistance of 0.5 Ω · cm, and b is the second one-conductivity type semiconductor 8 having a thickness of 0.7 μm and a specific resistance of 8 Ω · cm was formed by known epitaxial silicon deposition. The contact potential of the second N-type semiconductor 8 and the Schottky barrier metal 4 is 0.5 eV, and the resistance of the N-type semiconductor 1 is 5Ω.
cm resistivity, WN 0.5 μm, P + semiconductor region 6 has an impurity surface concentration of 1 × 10 20 Atoms / cm 3, Side Dif
fusion rate 0.1, P + semiconductor region 6 diffusion depth 2 μm, P
2 shows the electronic potential from the center point O of the shortest distance WN of the pair of P + semiconductor regions 6 to the distance X in the depth direction of the N-type semiconductor 1 when the width of the + semiconductor region 6 is 2 μm. As shown in FIG. 7, a phenomenon of lifting of the electronic potential, which was not seen in the conventional structure of WN> 2Wbi, occurred.

【0012】即ち、第2のN型半導体8と電極4による
ショットキ接触電位φM、P+半導体領域6ではさまれる
N型半導体1内の伝導帯ポテンシアルφX、図1のごと
くN導電型半導体と電極4のみの構成によって生じるN
導電型半導体1内の伝導帯ポテンシアルをφNとしたと
き、a曲線によるφM≧φX>φN、又はb曲線によるφM
≦φXの状態を形成できる。
That is, the Schottky contact potential φM by the second N-type semiconductor 8 and the electrode 4, the conduction band potential φX in the N-type semiconductor 1 sandwiched between the P + semiconductor regions 6, the N-conductivity type semiconductor and the electrode as shown in FIG. N caused by only 4 configurations
When the conduction band potential in the conductivity type semiconductor 1 is φN, φM ≧ φX> φN according to the a curve, or φM according to the b curve.
A state of ≦ φX can be formed.

【0013】前記の最短距離WNと零電位の空乏層幅Wb
iの関係でみると、WN>2Wbiのときは、図1の特性の
曲線のポテンシアル分布となり、WNの中心線上のポテ
ンシアルは、元のN型半導体の伝導帯及び価電帯の高さ
となる。しかして、WN=2Wbiのときは、P+半導体領
域から延びるポテンシアルの中心線OX上におけるxの
位置での伝導帯ポテンシアルはφNに一致する。又、WN
<2Wbiのときは、中心線OX上のポテンシアルはφN
より高い位置(5)で、二つのP+半導体領域から延び
るポテンシアルが交差する。従って、図7のa及びbに
示すように、電極4と接する第2のN型半導体8の不純
物濃度を操作することと、さらに、隣接するP+半導体
領域の距離を接近させることで、ポテンシアルを調整で
きる。このことは、ポテンシアルφXを調整できる疑似
P領域を形成したことになる。
The shortest distance WN and the zero potential depletion layer width Wb
From the relationship of i, when WN> 2Wbi, the potential distribution of the characteristic curve of FIG. 1 is obtained, and the potential on the center line of WN is the height of the conduction band and valence band of the original N-type semiconductor. Thus, when WN = 2Wbi, the conduction band potential at the position of x on the centerline OX of the potential extending from the P + semiconductor region coincides with φN. Also, WN
<2Wbi, the potential on the center line OX is φN
At the higher position (5), the potentials extending from the two P + semiconductor regions intersect. Therefore, as shown in FIGS. 7A and 7B, by manipulating the impurity concentration of the second N-type semiconductor 8 in contact with the electrode 4 and further making the distance between the adjacent P + semiconductor regions close, Can be adjusted. This means that the pseudo P region in which the potential φX can be adjusted is formed.

【0014】本発明構造は、疑似P領域の形成によっ
て、P+半導体領域6ではさまれるN型半導体1内の伝
導帯ポテンシアルφXは、φM≧φX>φN、又はφM≦φX
の状態に変化し得る。
According to the structure of the present invention, the conduction band potential φX in the N-type semiconductor 1 sandwiched between the P + semiconductor regions 6 by the formation of the pseudo P region is φM ≧ φX> φN or φM ≦ φX.
Can change to the state of.

【0015】第2の一導電型半導体8として高濃度層を
形成したφM≧φX>φNの場合、順方向特性は、図5の
a曲線で示され、主として、φMの高さで決まる。又、電
極4と接する第2の一導電型半導体8を一導電型半導体
1と同一の不純物濃度としたときより、実効的φMが小
さくなることと、シリ−ズ抵抗が小さくなるため、順方
向特性は更に改善される。逆方向特性については、φM
で決まるのみでなく、φXが形成する電極4と第2のN
型半導体8の接合面における電界強度Eは、図1の構
造、及びWN>2Wbiの構造に較べて、前記せる疑似P
領域の形成によるφXの増加分だけ電界強度Eが小さく
なる。従って、逆漏れ電流は、公知の逆漏れ電流の式か
ら明らかなように減少し、電圧依存性も小さくなり、図
4のa曲線のごとく優れた特性を示す。又、φM=φXの
場合、接合を横切る電界強度Eは、ほぼ、零となるた
め、逆漏れ電流は、そのバリア金属で決まるショットキ
バリア・ダイオ−ドとして最小の飽和電流値になる。
When φM ≧ φX> φN in which a high-concentration layer is formed as the second one-conductivity-type semiconductor 8, the forward characteristic is shown by the curve a in FIG. 5, and is mainly determined by the height of φM. Further, since the effective φM is smaller and the series resistance is smaller than when the second one-conductivity-type semiconductor 8 in contact with the electrode 4 has the same impurity concentration as the one-conductivity-type semiconductor 1, the forward resistance is reduced. The properties are further improved. For reverse characteristics, φM
Not only is determined by, but also the electrode 4 and the second N formed by φX.
The electric field strength E at the junction surface of the type semiconductor 8 is higher than that of the structure of FIG. 1 and the structure of WN> 2Wbi.
The electric field strength E is reduced by the increase in φX due to the formation of the region. Therefore, the reverse leakage current decreases as is clear from the known reverse leakage current formula, the voltage dependence also decreases, and excellent characteristics are shown as the curve a in FIG. When .phi.M = .phi.X, the electric field strength E across the junction is almost zero, and the reverse leakage current has a minimum saturation current value as a Schottky barrier diode determined by the barrier metal.

【0016】第2の一導電型半導体8として低濃度層を
形成したφM≦φXの場合、順方向及び逆方向特性は、シ
ョットキ接触電位φMの高さで支配されなくなり、φXの
高さで支配される特性となる。即ち、逆漏れ電流は、前
記の最小の飽和電流値より、更に小となり、図4のb曲
線のようになる。又、電極4と接する(6)第2の一導
電型半導体8を一導電型半導体1と同一の不純物濃度と
したときよりφXを高くすることができるため逆漏れ電
流は小さくなる。しかしながら、順方向特性は、φXに
見合うだけのしきい値電圧が必要になると共に、シリ−
ズ抵抗が若干大きくなるため、ダイオ−ドとしての順方
向電圧降下VFはb曲線のように若干、大とならざるを
得ない。ただし、PIN接合のしきい値電圧より小とな
る。
When φM ≦ φX in which a low-concentration layer is formed as the second one-conductivity-type semiconductor 8, the forward and reverse characteristics are not governed by the height of the Schottky contact potential φM, but are governed by the height of φX. It will be the characteristic that is. That is, the reverse leakage current becomes smaller than the minimum saturation current value described above, and becomes like the curve b in FIG. Further, since φX can be made higher than when the second conductive semiconductor 8 (6) contacting the electrode 4 has the same impurity concentration as the conductive semiconductor 1, the reverse leakage current becomes small. However, the forward characteristic requires a threshold voltage commensurate with φX, and
Therefore, the forward voltage drop VF as a diode has to be slightly large as shown by the curve b. However, it becomes smaller than the threshold voltage of the PIN junction.

【0017】次いで、図6のスイッチング特性図につい
て説明する。trrは、順方向電流通電時から逆極性に
スイッチしてキャリアが消滅するまでの、いわゆる逆回
復時間である。例えば、N型高抵抗層として5Ω・c
m、厚さ30μmのシリコンに、P+型高濃度層として
表面濃度1×1020Atoms/cm3の接合深さ3μm、接
合面積1cm2を形成したPIN接合では、175Amp
/cm2の順方向電流通電時から逆方向電圧50Vでスイ
ッチすると約400nsecのtrrを必要とする。
Next, the switching characteristic diagram of FIG. 6 will be described. trr is a so-called reverse recovery time from when the forward current is applied to when the carrier is switched to the opposite polarity and disappears. For example, as the N-type high resistance layer, 5Ω · c
175 Amp for a PIN junction in which a P + type high-concentration layer having a surface concentration of 1 × 10 20 Atoms / cm 3 and a junction depth of 3 μm and a junction area of 1 cm 2 are formed on silicon with a thickness of 30 μm and a thickness of 30 μm.
When a reverse voltage of 50 V is applied after the forward current of / cm2 is applied, a trr of about 400 nsec is required.

【0018】本発明構造の0<WN≦2Wbiで、Ti金
属とN型半導体をショットキ接触し、P+半導体領域と
はオ−ミック接触させ、その他の構造条件を前記のPI
Nと同等とした場合は、図6のようにtrrを50ns
ec以下にできた。
When 0 <WN ≦ 2Wbi in the structure of the present invention, the Ti metal and the N-type semiconductor are in Schottky contact, and the P + semiconductor region is in ohmic contact.
If it is equal to N, trr is 50 ns as shown in FIG.
It could be less than ec.

【0019】そのメカニズムを本発明構造のφM≧φX>
φNとφM≦φXの二つの実施態様に分けて説明する。第
2の一導電型半導体8が高濃度層のφM≧φX>φNの場
合は、図7のポテンシアル分布でわかるようにφMの影
響の大なる範囲であり、Tiショットキ性の少数キャリ
アの注入そのものが少ないこと、及びWNの比較的広い
ことから、図1のような単純なショットキ接合と同等の
短いtrr、即ち、数nsec〜20nsecの高速を
得る。
The mechanism is represented by φM ≧ φX> of the structure of the present invention.
Description will be given separately for two embodiments of φN and φM ≦ φX. When the second one-conductivity-type semiconductor 8 has a high-concentration layer of φM ≧ φX> φN, the influence of φM is large as can be seen from the potential distribution in FIG. 7, and the injection of the Ti Schottky minority carrier itself. 1 and a relatively wide WN, a short trr equivalent to that of a simple Schottky junction as shown in FIG. 1, that is, a high speed of several nsec to 20 nsec is obtained.

【0020】第2の一導電型半導体8が低濃度のφM≦
φXの場合は、図8の電子ポテンシアルダイアグラムに
示すように、外部電圧が印加されなくとも、P+半導体
(7)領域の深さ形成領域における伝導帯ECにφMよ
りもエネルギレベルの高いコブ状ポテンシアルが形成さ
れる。又、価電子帯EVのコブ状ポテンシアルの上端は
P+半導体領域の価電子帯に可成り近づくため、順方向
電流の通電期間中にホ−ルがコブ状ポテンシアル形成部
分に蓄積される。その結果、WNの距離が2Wbiよりも十
分せまく、完全に空乏化すべき距離にありながら、コブ
状ポテンシアル形成部分に多量のホ−ルを蓄積し、前記
せる疑似P領域の形成を容易とする。この疑似P領域は
P+半導体領域ではさまれた第2のN型半導体8の表面
に設けた電極の直下のN型半導体内に形成される。しか
も、電気的中性条件を満たすため、コブ状ポテンシアル
形成部分の伝導帯にもホ−ルと同等濃度の電子が存在し
ており、ショットキ接触に向かって強いポテンシアル勾
配(内部電界)を有している。
The second one conductivity type semiconductor 8 has a low concentration of φM ≦.
In the case of φX, as shown in the electron potential diagram of FIG. 8, even if no external voltage is applied, the conduction band EC in the depth formation region of the P + semiconductor (7) region has a bump shape higher in energy level than φM. Potential is formed. Further, since the upper end of the bump-like potential of the valence band EV approaches the valence band of the P + semiconductor region as much as possible, a hole is accumulated in the bump-like potential forming portion during the conduction of the forward current. As a result, the WN distance is sufficiently smaller than 2 Wbi, and a large amount of holes are accumulated in the hump-shaped potential forming portion, while facilitating the formation of the pseudo P region, while the depletion distance is to be completely depleted. The pseudo P region is formed in the N type semiconductor immediately below the electrode provided on the surface of the second N type semiconductor 8 sandwiched between the P + semiconductor regions. Moreover, since the conditions for electrical neutrality are satisfied, electrons having the same concentration as that of the holes are present in the conduction band of the bump-like potential forming portion, and a strong potential gradient (internal electric field) is obtained toward the Schottky contact. ing.

【0021】本発明構造におけるスイッチング動作時の
逆回復時間は、擬似P領域によるコブ状ポテンシアルの
形成により、従来構造のごとく、単に、ホ−ルは陰極側
へ、又、電子は陽極側に移動することにより、消滅する
現象ではなく、特異な現象によって短縮することを発見
した。
The reverse recovery time at the time of switching operation in the structure of the present invention simply moves the holes to the cathode side and the electrons to the anode side as in the conventional structure due to the formation of the hump-like potential due to the pseudo P region. By doing so, it was discovered that the phenomenon is shortened by a unique phenomenon rather than the phenomenon of disappearing.

【0022】即ち、P+半導体領域の深さ形成領域にお
ける伝導帯EC及び価電子帯EVに蓄積された各々のキ
ャリアは逆極性に切り換わった直後の数nsec以内の
短時間に強い内部電界に吸引され、電子は外部電界にさ
からってショットキ金属電極の方へ流れ、ホ−ルはP+
半導体領域からショットキ金属電極内へ流れ込む。即
ち、従来構造と異なり、ホ−ルも電子も、それぞれ同一
方向の電極金属に流れる期間が存在する。そして、ショ
ットキ接触電極金属内で電子及びホ−ルが再結合して消
滅する。この動作は電極金属に取り付けた電流計で観測
することは困難であり、P+半導体領域の電荷の振るま
いにより観測し得る。
That is, each of the carriers accumulated in the conduction band EC and the valence band EV in the depth formation region of the P + semiconductor region has a strong internal electric field within a few nsec immediately after switching to the opposite polarity. The electrons are attracted and the electrons flow toward the Schottky metal electrode against the external electric field, and the holes move to P +.
It flows from the semiconductor region into the Schottky metal electrode. That is, unlike the conventional structure, there is a period in which both holes and electrons flow in the electrode metal in the same direction. Then, electrons and holes are recombined and disappear in the Schottky contact electrode metal. This operation is difficult to observe with an ammeter attached to the electrode metal, and can be observed due to the behavior of charges in the P + semiconductor region.

【0023】以上の現象は、本発明構造である逆導電型
半導体領域(P+)ではさまれた(8)一導電型半導体
(N)の最短距離WNが0<WN≦2Wbiの範囲において
生じる前記せる伝導帯と価電子帯のもち上がり現象によ
るものである。従って、0<WN≦2Wbiの範囲で設計
配分することにより、逆回復時間trrを通常のショッ
トキ接触の領域からPIN接合の約1/8以下の範囲の
高速に調整設計し得るものである。このように、逆回復
時間の短縮に利用されていた重金属によるライフタイム
キラ−の拡散等の必要がない。
The above phenomenon occurs in the range (0) where the shortest distance WN of one conductivity type semiconductor (N) sandwiched between the opposite conductivity type semiconductor regions (P +) of the present invention is 0 <WN ≦ 2Wbi. This is due to the lifting phenomenon of the conduction band and valence band. Therefore, by designing and distributing in the range of 0 <WN ≦ 2Wbi, the reverse recovery time trr can be adjusted and designed at a high speed within the range of the normal Schottky contact region to about ⅛ or less of the PIN junction. As described above, there is no need to diffuse the lifetime killer due to the heavy metal used for shortening the reverse recovery time.

【0024】本発明構造の他の実施例として、図9に高
耐圧トランジスタの断面構造図、図10にSITのゲ−
ト部の断面構造図を示し、同一符号は同一部分をあらわ
す。その他IGBTをはじめ各種の半導体装置に利用で
きる。
As another embodiment of the structure of the present invention, FIG. 9 is a sectional structural view of a high breakdown voltage transistor, and FIG. 10 is a SIT gate.
The cross-sectional structural drawing of a toe part is shown, and the same code | symbol represents the same part. In addition, it can be used for various semiconductor devices such as IGBT.

【0025】導電型の等価的変換をはじめ、本発明の構
造要件を満足するならば、いずれの変形、付加、変換等
の変更を行っても本発明の範囲に含まれるものである。
Any modification, addition, conversion or other change is included in the scope of the present invention as long as it satisfies the structural requirements of the present invention including the equivalent conversion of conductivity type.

【0026】[0026]

【発明の効果】以上、説明したごとく、本発明の半導体
装置は特に、低損失、高耐圧、かつ高速の特性を得るこ
とができ、パワ−用をはじめ各種の産業機器に利用され
る整流素子、トランジスタ、スイッチ素子等の半導体装
置として広く適用でき、その効果きわめて大なるもので
ある。
As described above, the semiconductor device of the present invention can obtain the characteristics of low loss, high breakdown voltage and high speed, and is a rectifying element used for various industrial equipment including power applications. It can be widely applied as a semiconductor device such as a transistor and a switching element, and its effect is extremely great.

【図面の簡単な説明】[Brief description of drawings]

【図1】従来の半導体装置の断面構造図である。FIG. 1 is a cross-sectional structural diagram of a conventional semiconductor device.

【図2】本発明の実施例を示した断面構造図である。FIG. 2 is a sectional structural view showing an embodiment of the present invention.

【図3】本発明の他の実施例を示した断面構造図であ
る。
FIG. 3 is a sectional structural view showing another embodiment of the present invention.

【図4】逆方向特性図である。(9)FIG. 4 is a reverse characteristic diagram. (9)

【図5】順方向特性図である。FIG. 5 is a forward characteristic diagram.

【図6】スイッチング特性図である。FIG. 6 is a switching characteristic diagram.

【図7】[Figure 7]

【図8】電子ポテンシアルダイアグラムである。FIG. 8 is an electronic potential diagram.

【図9】本発明を高耐圧トランジスタに実施した断面構
造図である。
FIG. 9 is a cross-sectional structure diagram in which the present invention is applied to a high breakdown voltage transistor.

【図10】本発明をSITのゲ−ト部に実施した断面構
造図である。
FIG. 10 is a cross-sectional structure diagram in which the present invention is applied to a gate portion of a SIT.

【符号の説明】[Explanation of symbols]

1 一導電型半導体(例えば、N型) 1′ 高濃度一導電型半導体(例えば、N+型) 2 ガ−ドリング領域(例えばP+) 3 絶縁膜 4 電極 5 オ−ミック電極 6 逆導電型半導体領域(例えば、P+型) 7 凹部 8 一導電型半導体1と抵抗値の異なる第2の一
導電型半導体(例えば、N+型又はN-型) A 陽極 C 陰極 WN 6ではさまれた1の最短距離 Wbi 1と6の比抵抗で決まる零電位の空乏層幅 φM 1と4によるショットキ接触電位 φN 1と4のみの構成により生じる1内の伝導帯
ポテンシアル φX 6ではさまれた1内の伝導帯ポテンシアル (10)VF 順方向電圧 IF 順方向電流 VR 逆方向電圧 IR 逆方向電流 a 本発明実施例で8が高濃度層の場合のφM≧
φX>φNの特性曲線 b 本発明実施例で8が低濃度の場合のφM≦φX
の特性曲線 EC 伝導帯 EV 価電子帯
DESCRIPTION OF SYMBOLS 1 One conductivity type semiconductor (for example, N type) 1'High concentration one conductivity type semiconductor (for example, N + type) 2 Guarding region (for example P +) 3 Insulating film 4 Electrode 5 Ohmic electrode 6 Reverse conductivity type Semiconductor region (for example, P + type) 7 Recessed portion 8 Second conductive type semiconductor (for example, N + type or N− type) having a resistance value different from that of the one conductive type semiconductor 1 A Anode C Cathode WN 6 The shortest distance of 1 Wbi The Schottky contact potential due to the zero potential depletion layer width φM 1 and 4 which is determined by the specific resistance of 6 and N 4 The conduction band potential within 1 which is caused by the configuration of φN 1 and 4 Conduction band potential (10) VF forward voltage IF forward current VR reverse voltage IR reverse current a φM ≧ 8 in the embodiment of the present invention when 8 is a high concentration layer
Characteristic curve of φX> φN b φM ≦ φX when 8 is low concentration in the embodiment of the present invention
Characteristic curve of Ec conduction band EV valence band

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 FI 技術表示箇所 H01L 29/73 29/804 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification code Internal reference number FI technical display location H01L 29/73 29/804

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 一導電型半導体の表面に複数の逆導電型
半導体領域を形成し、該逆導電型半導体領域ではさまれ
た一導電型半導体の表面に電極を設け、一対の逆導電型
半導体領域ではさまれた一導電型半導体の最短距離をW
N、一導電型半導体と逆導電型半導体領域の比抵抗で決
まる零電位の空乏層幅をWbiとしたとき、0<WN≦2
Wbiであるように構成した半導体装置において、電極と
接する部分の一導電型半導体を他の部分の一導電型半導
体とは抵抗値の異なる第2の一導電型半導体にしたこと
を特徴とする半導体装置。
1. A pair of opposite conductivity type semiconductors, wherein a plurality of opposite conductivity type semiconductor regions are formed on the surface of one conductivity type semiconductor, and electrodes are provided on the surface of the one conductivity type semiconductor sandwiched between the opposite conductivity type semiconductor regions. The shortest distance of one conductivity type semiconductor sandwiched between regions is W
N, 0 <WN ≦ 2, where Wbi is the width of the depletion layer at zero potential determined by the specific resistances of the one conductivity type semiconductor and the opposite conductivity type semiconductor region.
In a semiconductor device configured to be Wbi, a semiconductor of one conductivity type in a portion in contact with the electrode is a second semiconductor of one conductivity type having a resistance value different from that of one semiconductor in another portion. apparatus.
【請求項2】 第2の一導電型半導体の表面と逆導電型
半導体領域にまたがって電極を設け、その電極は第2の
一導電型半導体の表面とはショットキ接触又はオ−ミッ
ク接触を形成し、逆導電型半導体領域とはオ−ミック接
触を形成していることを特徴とする請求項1の半導体装
置。
2. An electrode is provided straddling the surface of the second one conductivity type semiconductor and the opposite conductivity type semiconductor region, and the electrode forms Schottky contact or ohmic contact with the surface of the second one conductivity type semiconductor. The semiconductor device according to claim 1, wherein an ohmic contact is formed with the opposite conductivity type semiconductor region.
【請求項3】 一対の逆導電型半導体領域ではさまれた
一導電型半導体内に生じる電子ポテンシアルの高さが、
第2の一導電型半導体の表面と電極のみの構成によって
生じる電子ポテンシアルの高さより大きくなるように構
成したことを特徴とする請求項1又は請求項2の半導体
装置。
3. The height of the electronic potential generated in a semiconductor of one conductivity type sandwiched between a pair of semiconductor regions of opposite conductivity type is:
3. The semiconductor device according to claim 1, wherein the height of the electronic potential generated by only the surface of the second one conductivity type semiconductor and the electrode is higher than the height of the electronic potential.
【請求項4】 一導電型半導体の表面形状を凹凸状と
し、その凹部の底面又は側面又はそれら両面に逆導電型
半導体領域を形成したことを特徴とする請求項1、請求
項2、又は請求項3の半導体装置。
4. The one-conductivity-type semiconductor has an uneven surface shape, and a reverse-conductivity-type semiconductor region is formed on the bottom surface or side surface of the recess or both surfaces thereof. Item 3. The semiconductor device according to item 3.
JP8605892A 1992-03-09 1992-03-09 Semiconductor device Expired - Fee Related JP3103665B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8605892A JP3103665B2 (en) 1992-03-09 1992-03-09 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8605892A JP3103665B2 (en) 1992-03-09 1992-03-09 Semiconductor device

Publications (2)

Publication Number Publication Date
JPH05259437A true JPH05259437A (en) 1993-10-08
JP3103665B2 JP3103665B2 (en) 2000-10-30

Family

ID=13876099

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8605892A Expired - Fee Related JP3103665B2 (en) 1992-03-09 1992-03-09 Semiconductor device

Country Status (1)

Country Link
JP (1) JP3103665B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000049362A (en) * 1998-07-27 2000-02-18 Nissan Motor Co Ltd Unipolar rectifying element
JP2006352006A (en) * 2005-06-20 2006-12-28 Sumitomo Electric Ind Ltd Rectifier element and manufacturing method thereof
JP2011142355A (en) * 2011-04-21 2011-07-21 Sumitomo Electric Ind Ltd Rectifying element
JP2011166181A (en) * 2011-05-31 2011-08-25 Sumitomo Electric Ind Ltd Rectifying element and method of manufacturing the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000049362A (en) * 1998-07-27 2000-02-18 Nissan Motor Co Ltd Unipolar rectifying element
JP2006352006A (en) * 2005-06-20 2006-12-28 Sumitomo Electric Ind Ltd Rectifier element and manufacturing method thereof
JP2011142355A (en) * 2011-04-21 2011-07-21 Sumitomo Electric Ind Ltd Rectifying element
JP2011166181A (en) * 2011-05-31 2011-08-25 Sumitomo Electric Ind Ltd Rectifying element and method of manufacturing the same

Also Published As

Publication number Publication date
JP3103665B2 (en) 2000-10-30

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