JPH0525200B2 - - Google Patents
Info
- Publication number
- JPH0525200B2 JPH0525200B2 JP59043247A JP4324784A JPH0525200B2 JP H0525200 B2 JPH0525200 B2 JP H0525200B2 JP 59043247 A JP59043247 A JP 59043247A JP 4324784 A JP4324784 A JP 4324784A JP H0525200 B2 JPH0525200 B2 JP H0525200B2
- Authority
- JP
- Japan
- Prior art keywords
- printed wiring
- hole
- wiring board
- plug
- board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 229910052751 metal Inorganic materials 0.000 claims description 42
- 239000002184 metal Substances 0.000 claims description 42
- 239000004065 semiconductor Substances 0.000 claims description 30
- 239000012790 adhesive layer Substances 0.000 claims description 16
- 229920005989 resin Polymers 0.000 claims description 12
- 239000011347 resin Substances 0.000 claims description 12
- 239000000463 material Substances 0.000 claims description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 26
- 229910052802 copper Inorganic materials 0.000 description 23
- 239000010949 copper Substances 0.000 description 23
- 239000000758 substrate Substances 0.000 description 12
- 238000007747 plating Methods 0.000 description 8
- 230000017525 heat dissipation Effects 0.000 description 7
- 238000000034 method Methods 0.000 description 7
- 239000011521 glass Substances 0.000 description 6
- 239000010410 layer Substances 0.000 description 6
- 229910000679 solder Inorganic materials 0.000 description 6
- 239000000919 ceramic Substances 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 239000004020 conductor Substances 0.000 description 4
- 239000004593 Epoxy Substances 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 239000011889 copper foil Substances 0.000 description 3
- 229920006332 epoxy adhesive Polymers 0.000 description 3
- 239000003822 epoxy resin Substances 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 229910052718 tin Inorganic materials 0.000 description 2
- JYEUMXHLPRZUAT-UHFFFAOYSA-N 1,2,3-triazine Chemical compound C1=CN=NN=C1 JYEUMXHLPRZUAT-UHFFFAOYSA-N 0.000 description 1
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 229910000640 Fe alloy Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Description
【発明の詳細な説明】
本発明は、有機系樹脂素材のプリント配線用基
板に金属板を貼着し半導体素子からの熱放散性を
向上させたプラグインパツケージ基板（ピングリ
ツドアレーともいう）に関する。Detailed Description of the Invention The present invention is a plug-in package board (also referred to as a pin grid array) in which a metal plate is attached to a printed wiring board made of an organic resin material to improve heat dissipation from semiconductor elements. Regarding.
従来、基板裏面に外部接続用の入出力ピンを配
設した半導体塔載用プラグインパツケージとして
は第１図の斜視図に示すようなセラミツクス製基
板のものがあり、アルミナ基板等の各種セラミツ
クス焼結体から成る基板イの表面に、半導体素子
塔載部分ロを中心として略放射線状にプリント配
線回路の導体部分ハが形成され、該回路と導通し
て外部接続用の入出力ピンニが基板の裏面に格子
の交差点上に整列して配設されたものである。 Conventionally, as a plug-in package for mounting a semiconductor module with input/output pins for external connections arranged on the back side of the board, there is a ceramic board as shown in the perspective view of Figure 1, and various types of ceramic sintered packages such as alumina board are available. On the surface of the substrate A consisting of a solid body, conductor portions C of a printed wiring circuit are formed approximately radially around the semiconductor element mounting portion B, and are electrically connected to the circuit so that input/output pins for external connections are connected to the substrate. They are arranged at the intersections of a grid on the back side.
最近の半導体素子は高集積化され、半導体素子
からの発熱が多くなり、アルミナなどのセラミツ
クス基板では半導体素子からの発熱に対し十分な
熱放散が得られず、比較的低い出力の半導体素子
すなわち発熱が少い半導体素子のみに適用されて
おり、高い出力の半導体素子は放熱用のフインを
用けるなどの対策が必要である。 Recent semiconductor devices have become highly integrated and generate more heat, and ceramic substrates such as alumina do not provide sufficient heat dissipation for the heat generated by semiconductor devices. This method is applied only to semiconductor devices with low output power, and high output semiconductor devices require measures such as the use of heat dissipation fins.
半導体素子からの発熱を効率よく外部へ放散す
るプラグインパツケージ基板としては第２図の断
面図に示す構造のプラグインパツケージ基板が考
えられる。 As a plug-in package board that efficiently dissipates heat generated from a semiconductor element to the outside, a plug-in package board having a structure shown in the sectional view of FIG. 2 can be considered.
第２図においてａはプリント配線基板であり表
面にはプリント配線回路ｈが形成されており、該
プリント配線基板ａの裏面全体に接着層ｂを介し
て金属板ｃが貼着されている。ｄはプリント配線
基板のスルホールであり、該スルホールには、外
部接続用のピンｅがはんだｆにより固定されるこ
とにより、プリント配線回路と電気的に接続して
いる。ｇは半導体素子塔載用の凹部であり底面は
金属面が露出している。該凹部の金属板に半導体
素子をダイボンデイングし、ワイヤーボンデイン
グ後、エポキシ樹脂などを用いて半導体素子及び
半導体素子周辺を封止することによつて外部から
半導体素子を保護する。半導体素子から発生する
熱は、熱伝導性の高い金属板ｃを通して外部へ速
やかに放散されるため、高い出力の半導体素子を
塔載しても半導体素子表面の温度上昇は極めて少
く、従つて熱による半導体素子への影響は、ほと
んど見られない。このように第２図のプラグイン
パツケージ基板は、高い放熱特性を備えた基板で
あるが、次の様な問題点を持つている。第３図は
第２図のプラグインパツケージ基板のスルホール
周辺部を拡大した断面図である。第３図におい
て、接着層ｂが薄い場合は、金属板ｃをプリント
配線基板ａに貼着後、プリント配線基板ａのスル
ホール及びランドｉが金属板ｃと電気的に短絡し
て性能面の支障が生じる。又逆に接着層が厚い場
合は金属板をプリント配線基板に貼着時に、接着
層が、スルホール内部へ流れ込んでスルホールの
一部を接着層で埋めるためピンをスルホールへ挿
入する際に障害となつたり、あるいは、ピンとス
ルホールが電気的に接触不良を起こしたりする。
さらに第３図のｊに示すようにランド周辺部の接
着層内部に気泡が残るため金属板とプリント配線
基板の密着が著しく低下する。さらにはスルホー
ル内への外部接続ピンは片面からのみしか挿入で
きず、基板構造や製造方法が限定される欠点があ
る。 In FIG. 2, a is a printed wiring board, on the surface of which a printed wiring circuit h is formed, and a metal plate c is adhered to the entire back surface of the printed wiring board a via an adhesive layer b. d is a through hole in the printed wiring board, and a pin e for external connection is fixed to the through hole with solder f, thereby electrically connecting to the printed wiring circuit. g is a recessed portion for mounting a semiconductor element, and a metal surface is exposed at the bottom. A semiconductor element is die-bonded to the metal plate in the recessed portion, and after wire bonding, the semiconductor element and the area around the semiconductor element are sealed using an epoxy resin or the like to protect the semiconductor element from the outside. The heat generated from the semiconductor element is quickly dissipated to the outside through the highly thermally conductive metal plate c, so even if a high output semiconductor element is mounted, the temperature rise on the surface of the semiconductor element is extremely small. Almost no effect on semiconductor devices is observed. As described above, the plug-in package board shown in FIG. 2 is a board with high heat dissipation characteristics, but it has the following problems. FIG. 3 is an enlarged sectional view of the area around the through hole of the plug-in package board of FIG. 2. FIG. In Fig. 3, if the adhesive layer b is thin, after the metal plate c is attached to the printed wiring board a, the through-holes and lands i of the printed wiring board a will electrically short-circuit with the metal plate c, which will impede performance. occurs. On the other hand, if the adhesive layer is thick, when attaching the metal plate to the printed wiring board, the adhesive layer will flow into the through-hole and fill a portion of the through-hole with the adhesive layer, creating an obstacle when inserting the pin into the through-hole. Or, the pin and through hole may cause electrical contact failure.
Further, as shown in FIG. 3J, air bubbles remain inside the adhesive layer around the land, resulting in a significant decrease in the adhesion between the metal plate and the printed wiring board. Furthermore, the external connection pin can only be inserted into the through hole from one side, which has the disadvantage that the substrate structure and manufacturing method are limited.
本発明は、上記従来のプラグインパツケージ基
板の欠点である熱放散性を向上させるために、金
属板の放熱特性を最大限に発揮させる構造とすべ
く、プリント配線基板と金属板とを接着剤を介し
て接合し一体化することにより、半導体素子など
の電子部品から発生する熱を金属板を通じて効率
良く放散できる構造とし、しかも電気的に信頼性
の高いプラグインパツケージ基板を提供すること
を目的とするものである。 In order to improve heat dissipation, which is a drawback of the conventional plug-in package board, the present invention aims to create a structure that maximizes the heat dissipation properties of the metal plate by bonding the printed wiring board and the metal plate with adhesive. The purpose is to provide a plug-in package board that has a structure that allows heat generated from semiconductor elements and other electronic components to be efficiently dissipated through the metal plate by bonding and integrating them through the metal plate, and that is also highly electrically reliable. That is.
本発明は、有機系樹脂素材からなるプリント配
線基板のスルホール部に外部接続用の入出力ピン
が整列して配設されたプラグインパツケージ基板
であつて、前記プリント配線基板の裏面に接着層
を介して貼着された金属板は、外部に露出した一
主面と、前記プリント配線基板に設けた半導体素
子搭載用の貫通孔を塞ぎ露出した他の主面と、
個々の前記スルホール部に対応した位置に当該ス
ルホール部およびそのランド部よりも大きい穴と
を有することを特徴とするプラグインパツケージ
基板である。 The present invention is a plug-in package board in which input/output pins for external connection are arranged in a through-hole part of a printed wiring board made of an organic resin material, and an adhesive layer is provided on the back surface of the printed wiring board. The metal plate pasted through the metal plate has one principal surface exposed to the outside, and the other principal surface exposed by closing a through hole for mounting a semiconductor element provided in the printed wiring board,
The plug-in package board is characterized in that it has a hole larger than the through-hole portion and its land portion at a position corresponding to each of the through-hole portions.
以下本発明を図面に基いて具体的に説明する。
第４図は本発明のプラグインパツケージ基板の金
属板側から見た平面図であり、第５図は第４図の
Ａ−Ｂ間の断面図を示している。第４図、第５図
において１は有機系樹脂素材からなるプリント配
線基板である。代表的なものはガラスエポキシ樹
脂基板、紙フエノール樹脂基板、紙エポキシ樹脂
基板、ガラスポリイミド樹脂基板、ガラストリア
ジン樹脂基板などである。２は接着層であり、未
硬化のエポキシ樹脂含浸のガラスクロス、又は耐
熱性の接着シート、又は液状の樹脂などを用い
る。３は金属板であり銅、銅合金、鉄、鉄合金、
アルミニウム、アルミニウム合金などの比較的熱
伝導率が高い金属板が望しく、必要に応じて金属
板表面に金属メツキを行つてもよい。４は外部接
続用の金属製ピンであり、通常スズ、はんだ、金
などのメツキが施してある。５は金属製ピンをス
ルホール、ランドに固定した、はんだである。金
属製ピンの別の固定方法として、少くともスルホ
ール径より太い部分を有する金属製ピンをスルホ
ールに嵌挿固着して固定してもよい。６はプリン
ト配線基板のスルホール及びランドであり、７
は、半導体素子塔載用の凹部であり、金属板が露
出している。該凹部の金属面、側壁面に金属メツ
キ層を形成すれば熱放散性がより向上する。なお
プリント配線基板において金属板との接合面に、
ランド以外のプリント配線回路が形成されている
時は、その部分の銅板を取り除けばよい。 The present invention will be specifically explained below based on the drawings.
FIG. 4 is a plan view of the plug-in package board of the present invention viewed from the metal plate side, and FIG. 5 is a sectional view taken along line A--B in FIG. 4. In FIGS. 4 and 5, reference numeral 1 denotes a printed wiring board made of an organic resin material. Typical examples include glass epoxy resin substrates, paper phenol resin substrates, paper epoxy resin substrates, glass polyimide resin substrates, and glass triazine resin substrates. 2 is an adhesive layer, which is made of uncured epoxy resin-impregnated glass cloth, a heat-resistant adhesive sheet, or a liquid resin. 3 is a metal plate made of copper, copper alloy, iron, iron alloy,
A metal plate having a relatively high thermal conductivity such as aluminum or an aluminum alloy is preferable, and the surface of the metal plate may be plated with metal if necessary. 4 is a metal pin for external connection, which is usually plated with tin, solder, gold, or the like. 5 is a solder in which metal pins are fixed to through holes and lands. As another method for fixing the metal pin, a metal pin having at least a portion thicker than the diameter of the through hole may be inserted and fixed into the through hole. 6 are through holes and lands of the printed wiring board; 7
is a recess for mounting a semiconductor element, and a metal plate is exposed. If a metal plating layer is formed on the metal surface and side wall surface of the recess, heat dissipation performance will be further improved. In addition, in the printed wiring board, on the joint surface with the metal plate,
If a printed wiring circuit other than the land is formed, the copper plate in that area can be removed.
以上の様な本発明のプラグインパツケージ基板
は、プリント配線基板のスルホール及びランドと
金属とが完全に絶縁化されることにより電気的な
短絡は全く起こることはなく、接着層がスルホー
ルへ流れ込むこともなく、又金属板とプリント配
線基板との接着層にエアーを巻きこむことは極め
て少く、信頼性が著しく向上する。さらに第６図
に示すように金属板側からのピン挿入も可能であ
り、自由度が極めて高くなる。又金属板の穴を樹
脂封止することにより、穴を通して外部の水が浸
入することが防止でき、さらにはより強くピンが
固定可能である。 In the plug-in package board of the present invention as described above, the through-holes and lands of the printed wiring board are completely insulated from the metal, so no electrical short circuit occurs at all, and the adhesive layer does not flow into the through-holes. In addition, there is very little air being drawn into the adhesive layer between the metal plate and the printed wiring board, and reliability is significantly improved. Furthermore, as shown in FIG. 6, it is also possible to insert pins from the metal plate side, providing an extremely high degree of freedom. Furthermore, by sealing the hole in the metal plate with resin, it is possible to prevent external water from entering through the hole, and furthermore, the pin can be fixed more strongly.
次に本発明のプラグインパツケージ基板の製造
方法について説明する。 Next, a method for manufacturing a plug-in package board according to the present invention will be explained.
第７図の図あは銅板３に未硬化エポキシ接着シ
ート２を仮接着した状態の断面図である。図いは
前記銅板並びに未硬化エポキシ接着シートに穴８
を明けた状態の断面図である。穴明けはドリリン
グマシーン、金型などで行う。図うは公知の工程
で回路形成されたガラスエポキシの両面プリント
配線基板１に図いに示す銅板をプレスで、加熱圧
着し、エポキシ接着シートを加熱硬化させてプリ
ント配線基板と銅板を一体化した状態の断面図を
示している。この時銅板の穴はスルホール及びラ
ンド部より大きい穴である。図えは、前記プリン
ト配線基板側からザグリを行い底面に銅板を露出
させ半導体素子塔載用の凹部７を形成したもので
ある。図おは、前記プリント配線基板のスルホー
ルに外部接続用の金属製ピン４を挿入固定した本
発明のプラグインパツケージ基板の断面図であ
る。 Figure A in FIG. 7 is a cross-sectional view of the state in which the uncured epoxy adhesive sheet 2 is temporarily bonded to the copper plate 3. The figure shows holes 8 in the copper plate and uncured epoxy adhesive sheet.
FIG. Holes are made using a drilling machine, mold, etc. The figure shows a copper plate shown in the figure being heat-pressed by a press to a glass epoxy double-sided printed wiring board 1 on which a circuit has been formed using a known process, and the printed wiring board and copper plate are integrated by heating and curing the epoxy adhesive sheet. A cross-sectional view of the condition is shown. At this time, the hole in the copper plate is larger than the through hole and the land portion. In the figure, a counterbore is made from the printed wiring board side to expose the copper plate on the bottom surface and form a recess 7 for mounting a semiconductor element. FIG. 3 is a sectional view of a plug-in package board of the present invention in which a metal pin 4 for external connection is inserted and fixed into the through hole of the printed wiring board.
又回路形成後のプリント配線基板の半導体素子
塔載部を、あらかじめ金型による打ち抜き加工又
はザグリ加工などで貫通孔を形成した後に図いに
示すように銅板を貼着してもよい。この場合半導
体素子塔載部に相当する銅板表面には接着層を用
けないで、銅板表面を露出させておく。 Alternatively, a copper plate may be attached to the semiconductor element mounting portion of the printed wiring board after circuit formation, as shown in the figure, after forming through holes in advance by punching or counterboring using a mold. In this case, no adhesive layer is applied to the surface of the copper plate corresponding to the semiconductor element mounting portion, and the surface of the copper plate is left exposed.
次に第８図は本発明のプラグインパツケージ基
板の別の製造方法を示す断面図である。第８図に
おいて図かはガラスエポキシからなる片面銅張り
積層板９に接着層２を介して銅板３を貼着した状
態の断面図を示す。該図において１０は銅箔であ
る。又通常の両面銅張り積層板の製造において片
面側の銅箔に代つて銅板を使用すれば特別な接着
層を必要としない。図きは銅板を貼着した積層板
にスルホール用の穴８を明けた状態の断面図であ
る。図くは半導体塔載部をザグリ加工し銅板表面
を露出させ凹部７を形成した状態の断面図であ
る。図けは該基板及び銅板全体に公知の方法によ
りスルホールメツキを行い、表面に銅メツキ層１
１を形成した状態の断面図である。次に図こに示
すように該基板表面に感光性樹脂被膜１２を貼着
し半導体素子塔載用の凹部を含む回路パターンを
形成し、エツチングにより導体回路を形成後感光
性樹脂被膜を除去し、図さの断面図に示すような
導体回路を持つた基板を得ることができる。図さ
において、凹部７の内壁面及び底面には銅メツキ
層が形成されており、又銅板側のランド１３は銅
板で形成され、他の銅板１４とは電気的に完全に
絶縁化状態である。図さの状態を形成する別の方
法として、感光性樹脂によりネガパターンを形成
し、異金属メツキ、例えば、錫、はんだ、金など
のメツキにより半導体素子塔載用の凹部を含む回
路パターンを形成し、該異金属メツキをエツチン
グレジストとして、所望の導体回路を形成するこ
ともできる。又凹部に金属メツキ層を必要としな
い時は、所望の導体回路を形成後ザグリ加工によ
り凹部を形成すればよい。次に図しは前記プリン
ト配線基板のスルホールに外部接続用のピン４を
挿入固定した本発明のプラグインパツケージ基板
の断面図である。 Next, FIG. 8 is a sectional view showing another method of manufacturing the plug-in package board of the present invention. In FIG. 8, a sectional view is shown in which a copper plate 3 is adhered to a single-sided copper-clad laminate 9 made of glass epoxy via an adhesive layer 2. In the figure, 10 is a copper foil. Further, in the production of normal double-sided copper-clad laminates, if a copper plate is used in place of the copper foil on one side, no special adhesive layer is required. The figure is a cross-sectional view of a laminated board to which a copper plate is attached, with holes 8 for through-holes made therein. The figure is a cross-sectional view of the semiconductor tower mounting portion in which the surface of the copper plate is exposed and a recess 7 is formed by counterboring. In the figure, through-hole plating is performed on the entire board and copper plate by a known method, and a copper plating layer 1 is applied to the surface.
FIG. Next, as shown in the figure, a photosensitive resin coating 12 is pasted on the surface of the substrate to form a circuit pattern including a recess for mounting a semiconductor element, and after forming a conductor circuit by etching, the photosensitive resin coating is removed. , it is possible to obtain a substrate having a conductive circuit as shown in the cross-sectional view of the figure. In the figure, a copper plating layer is formed on the inner wall surface and bottom surface of the recess 7, and the land 13 on the copper plate side is formed of a copper plate, and is completely electrically insulated from the other copper plate 14. . Another method for forming the state shown in the figure is to form a negative pattern using photosensitive resin, and then form a circuit pattern including recesses for mounting semiconductor elements by plating with a different metal, such as tin, solder, or gold. However, it is also possible to form a desired conductor circuit by using the dissimilar metal plating as an etching resist. When a metal plating layer is not required in the recess, the recess may be formed by counterboring after forming the desired conductor circuit. Next, the figure is a sectional view of the plug-in package board of the present invention in which pins 4 for external connection are inserted and fixed into the through holes of the printed wiring board.
第１図は従来のセラミツク製プラグインパツケ
ージの斜視図、第２図はプリント基板裏面に金属
板を貼着した状態の断面図、第３図は、第２図の
スルホール周辺部を拡大した断面図、第４図は本
発明のプラグインパツケージ基板の金属板側の平
面図、第５図及び第６図は本発明のプラグインパ
ツケージ基板の断面図、第７図及び第８図は本発
明のプラグインパツケージ基板の製造方法の断面
図の例である。
イ…セラミツク基板、ロ…半導体塔載用凹部、
ハ…プリント配線回路、ニ…外部接続用入出力ピ
ン、ａ…プリント配線基板、ｂ…接着層、ｃ…金
属板、ｄ…スルホール、ｅ…外部接続用の入出力
ピン、ｆ…はんだ、ｇ…半導体塔載用凹部、ｈ…
プリント配線回路、ｉ…スルホール及びランド、
ｊ…気泡、１…有機系樹脂素材のプリント配線基
板、２…接着層、３…金属板、４…外部接続用の
金属製ピン、５…はんだ、６…スルホール・ラン
ド、７…半導体素子塔載用凹部、８…穴、９…片
面銅張り積層板、１０…銅箔、１１…銅メツキ
層、１２…感光性樹脂被膜、１３…ランド、１４
…銅板。
Figure 1 is a perspective view of a conventional ceramic plug-in package, Figure 2 is a cross-sectional view of a metal plate attached to the back of a printed circuit board, and Figure 3 is an enlarged cross-section of the area around the through hole in Figure 2. 4 is a plan view of the metal plate side of the plug-in package board of the present invention, FIGS. 5 and 6 are sectional views of the plug-in package board of the present invention, and FIGS. 7 and 8 are the plan views of the plug-in package board of the present invention. 2 is an example of a cross-sectional view of a method for manufacturing a plug-in package board. A...Ceramic substrate, B...Recess for mounting semiconductor layer,
C... Printed wiring circuit, D... Input/output pin for external connection, a... Printed wiring board, b... Adhesive layer, c... Metal plate, d... Through hole, e... Input/output pin for external connection, f... Solder, g ...Semiconductor tower mounting recess, h...
Printed wiring circuit, i...Through hole and land,
j...Bubble, 1...Printed wiring board made of organic resin material, 2...Adhesive layer, 3...Metal plate, 4...Metal pin for external connection, 5...Solder, 6...Through hole land, 7...Semiconductor element tower Mounting recess, 8... Hole, 9... Single-sided copper-clad laminate, 10... Copper foil, 11... Copper plating layer, 12... Photosensitive resin coating, 13... Land, 14
...Copper plate.
Claims (1)
スルホール部に外部接続用の入出力ピンが整列し
て配設されたプラグインパツケージ基板であつ
て、前記プリント配線基板の裏面に接着層を介し
て貼着された金属板は、外部に露出した一主面
と、前記プリント配線基板に設けた半導体素子搭
載用の貫通孔を塞ぎ露出した他の主面と、個々の
前記スルホール部に対応した位置に当該スルホー
ル部およびそのランド部よりも大きい穴とを有す
ることを特徴とするプラグインパツケージ基板。1 A plug-in package board in which input/output pins for external connection are arranged in a through-hole section of a printed wiring board made of an organic resin material, and is attached to the back surface of the printed wiring board via an adhesive layer. The attached metal plate has one principal surface exposed to the outside, the other principal surface exposed by closing the through hole for mounting a semiconductor element provided in the printed wiring board, and a position corresponding to each of the through holes. A plug-in package board comprising a through-hole portion and a hole larger than the land portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4324784A JPS60187098A (en) | 1984-03-07 | 1984-03-07 | Plug-in package substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4324784A JPS60187098A (en) | 1984-03-07 | 1984-03-07 | Plug-in package substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60187098A JPS60187098A (en) | 1985-09-24 |
| JPH0525200B2 true JPH0525200B2 (en) | 1993-04-12 |
Family
ID=12658552
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4324784A Granted JPS60187098A (en) | 1984-03-07 | 1984-03-07 | Plug-in package substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60187098A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6432660A (en) * | 1987-04-15 | 1989-02-02 | Matsushita Electric Works Ltd | Pin grid array |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53111472A (en) * | 1977-03-01 | 1978-09-29 | Fujitsu Ltd | Printed circuit board |
| JPS5721888A (en) * | 1980-07-14 | 1982-02-04 | Nippon Electric Co | Printed board mounted with circuit parts |
| JPS5873142A (en) * | 1981-10-27 | 1983-05-02 | Nec Corp | Multichip lsi package |
| JPS5877299A (en) * | 1981-11-02 | 1983-05-10 | 松下電器産業株式会社 | Heat sink substrate for mounting electronic part |
-
1984
- 1984-03-07 JP JP4324784A patent/JPS60187098A/en active Granted
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53111472A (en) * | 1977-03-01 | 1978-09-29 | Fujitsu Ltd | Printed circuit board |
| JPS5721888A (en) * | 1980-07-14 | 1982-02-04 | Nippon Electric Co | Printed board mounted with circuit parts |
| JPS5873142A (en) * | 1981-10-27 | 1983-05-02 | Nec Corp | Multichip lsi package |
| JPS5877299A (en) * | 1981-11-02 | 1983-05-10 | 松下電器産業株式会社 | Heat sink substrate for mounting electronic part |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60187098A (en) | 1985-09-24 |
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