JPH05249193A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To inspect a package containing analog and digital circuits in a mixed state and, at the same time, mounted with a surfacemounting type integrated circuit with a general purpose in-circuit tester. CONSTITUTION:In the title integrated circuit 1, such circuits for inspection as a parallel-input shift register 11, parallel-output shift register 12, selector circuit 13, one-and two-input analog switches 14 and 15 are added as the peripheral circuits of an internal device 30 incorporating analog and digital circuits in a mixed state and, when the circuit 1 is inspected with a general purpose in-circuit tester, an output pin is measured by setting arbitrary data to an input pin and impressing a clock signal upon the input pin from a test clock pin.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a large-scale semiconductor integrated circuit, and more particularly to a semiconductor integrated circuit suitable for inspecting a package under test mounted on the package.

[0002]

2. Description of the Related Art As a means for testing a package in which electronic components are mounted on a printed wiring board and connected, there are an in-circuit test method, a function test method, etc. in a general-purpose board tester.

In the in-circuit test system, as shown in FIG. 2, the test probe pin 5 is brought into contact with the input terminal and output terminal of the logic IC 8a to be tested, and the output state of the logic IC 8b connected to the preceding stage is determined. Regardless of this, the current is forcibly injected from the low-impedance driver circuit 6 in a short time, the input condition of the truth value test of the logic IC 8a is satisfied, and the sensor circuit 7 checks the output of the logic IC 8a.

The function test system is a system in which hundreds or thousands of patterns of logic signals are applied to the input terminals of the package under test to check the truth value of the output pattern output from the package under test. As is apparent from this, the in-circuit test method is a method of testing individual electronic components, whereas the function test is a method of testing the function of the entire package under test.

In recent years, the degree of integration of ICs mounted in a package has become large, and the shape of the IC has changed from a normal dual type to an SOP (Small Out line Pack).
age) and QFP (Quad Flat Pack)
e) and other types are mounted. FIG. 2 is a diagram showing a typical example of an LSI.

L such as SOP and QFP is added to the package under test.
When a plurality of SIs are mounted, defects at the manufacturing stage (eg, no solder, solder bridge, difference in parts, etc.) are expected to increase the production of solderless, solder bridge, etc. compared to the conventional dual-in type. To be done. The in-circuit test method is the most suitable for detecting manufacturing defects, but as shown in FIG. 2, the input / output pins 20 to 23 and the internal device 30 are used.
Since and are directly connected, the function of the internal device 30 must be checked. Therefore, an enormous amount of test patterns are required, and a current is applied to the output of the preceding stage LSI for a considerable time, which may damage the preceding stage LSI.

Further, in an LSI in which analog and digital circuits are mixed, it is necessary to apply an analog signal to check the analog circuit section, and the in-circuit test method cannot be used for inspection. Therefore, the quality of the package is assured by conducting an inspection by mounting the device.

[0008]

As described above, when a plurality of LSIs such as SOP and QFP in which an analog circuit and a digital circuit are mixed are mounted on the package under test, manufacturing defects such as unsolder and solder bridge may occur. At the time of detection, it becomes difficult to perform an inspection with a general-purpose in-circuit tester. Therefore, the visual inspection requires a sufficient time, and the inspection requires a device mounting inspection, which requires a considerable time for diagnosing a defective package.

[0009]

A semiconductor integrated circuit according to the present invention comprises an analog switch connected to an analog input / output pin and an input / output side of an internal device, a parallel input shift register connected to a logic input pin, and the internal device. Selector circuit connected to the output side of the selector circuit, a parallel output shift register connected to the other input side of the selector circuit, a logical output pin connected to the output of the selector circuit, the parallel input shift register and the parallel circuit. ON / OF of the analog switch and a selector input pin connected to a test clock pin connected to the clock input of the shift register and a switching input of the selector circuit
And an analog select pin for controlling F.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention. The logic input pin 21 of the semiconductor integrated circuit 1 is connected to the input side of the internal device 30 having the original LSI function via a lead wire, and further connected to the input side (data input) of the parallel input shift register 11. ing.
The logic output pin 23 is connected to the output side of the selector circuit 13 via a lead wire, and the two inputs of the selector circuit 13 are connected to the output side of the internal device 30 and the parallel output shift register 1.
2 is connected to the output side. Each selector circuit 13 is controlled by the logic select pin 26.

Next, the analog input pin 20 has two 1-input analog switches 1 (select inputs are positive and negative logic).
4 and the two output sides are connected to the input sides of the internal device 30 and the parallel input shift register 11, respectively. The analog output pin 22 is connected to the output side of the 2-input analog switch 15, and the two input sides are connected to the internal device 30 and the output side of the parallel output shift register. The analog switches 14 and 15 are controlled by the analog select pin 25.

The output of the parallel input shift register 11 is sequentially connected to the input side (serial input) of the parallel input register 11 of the next stage, and the output of the parallel input shift register 11 of the final stage is the parallel output shift register 12 of the first stage. Connected to the input side (data input) of. The output of the parallel output shift register 12 is the selector circuit 13
Is connected to one side of the input and the input side (data input) of the parallel output shift register 12 in the next stage is sequentially connected. Clock inputs of all shift registers 11 and 12 are connected to a test clock input pin 24.

Next, a description will be given of an in-circuit test method inspecting method performed by a general-purpose board tester when the semiconductor integrated circuit 1 is mounted on a package.

First, the analog input pin 20, the logic input pin 22, and the test clock pin 2 of the semiconductor integrated circuit 1 are described.
4, analog select pin 25 and logic select pin 2
6 is brought into contact with the test probe pin 5 (including through holes on the substrate), and the input pins 20, 22, 24, 25,
26 is connected to the driver circuit 6 of the package tester 2.

The analog output pin 21 and the logic output pin 23 are also connected to the sensor circuit 7 of the package tester 2 via the test probe pin 5. This semiconductor integrated circuit 1
In the in-circuit test, the analog select pin 25 is forcibly set to a low level in advance and the analog input pin 20 and the input side of the parallel input shift register 11 are connected via the 1-input analog switch.
The output side of the parallel output register 12 and the analog output pin 21 are also connected. Further, when the logic select pin 26 is also forced to the low level, the output side level of the parallel output shift register 12 is selected as the logic output pin 23 via the selector circuit 13.

Next, an arbitrary truth value input is applied to the analog input pin 20 and the logic input pin 21 from the driver circuit 6, and a clock signal is sequentially applied to the shift registers 11 and 12 through the driver circuit 6 from the test clock pin 24. To do. This is a method in which the sensor circuit 7 of the package tester checks the truth values of the logic outputs of the analog and logic output pins 21 and 23 after applying the above inputs.

The function of the package in which the semiconductor integrated circuit 1 is mounted is to open (high level) the test clock pin 24, the analog select pin 25 and the logic select input pin of the integrated circuit 1, respectively. The analog input / output pins 20 and 21 and the logic input / output pins 22 and 23 are connected to the input / output side of the internal device 30 having a function as an LSI, and the test circuit can be ignored.

[0019]

As described above, the semiconductor integrated circuit of the present invention can be mounted on a package and inspected by an in-circuit test system by a general-purpose board tester.
It is possible to easily detect manufacturing defects such as unsoldered solder and solder bridges that are likely to occur due to mounting of QFP or the like. Moreover, since the test pattern is the minimum, the test program development time can be significantly shortened, and the time required for the visual inspection can be greatly shortened.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram showing a conventional example.

FIG. 3 is a diagram showing an example of an inspection method of a package mounting a semiconductor integrated circuit.

[Explanation of symbols]

 1 semiconductor integrated circuit 11 parallel input shift register 12 parallel output shift register 13 selector circuit 14 1 input analog switch 15 2 input analog switch 20 analog input pin 21 analog output pin 22 logic input pin 23 logic output pin 24 test clock pin 25 analog select Pin 26 Logic select pin

Claims (1)

[Claims] 1. A semiconductor integrated circuit comprising an internal device having a plurality of functions of an electronic circuit, and input and output pins connected to the input / output side via lead wires, wherein an analog input / output pin and an internal device are connected. An analog switch connected to the output side, a parallel input shift register connected to the logic input pin, a selector circuit connected to the output side of the internal device, and a parallel output connected to the other input side of the selector circuit. Shift register,
A logic output pin connected to the output of the selector circuit,
A parallel input shift register, a test clock pin connected to a clock input of the parallel shift register, a selector input pin connected to a switching input of a selector circuit, and an analog select pin for controlling ON / OFF of the analog switch. And a semiconductor integrated circuit.