JPH05244218A - Frame structure for cyclic transmission - Google Patents

Abstract

PURPOSE:To shorten the transmission period of the data requiring high speed communication and to realize the high speed cyclic transmission by transmitting data capable of communication at a low speed while the data are divided into plural data frames. CONSTITUTION:Each of data frames F1-Fi constituting one cycle consists of plural blocks each composed of a data character s2 requiring high communication speed and a data character s4 requiring low communication speed. Then the data for the low communication speed are sent while being divided into plural frames. In such constitution, the data for the low communication speed are divided and only a part of the divided data each is sent per one cycle. Thus, one frame length is decreased and the data requiring the high communication speed are sent every time while being superimposed on a short frame to realize the high speed cyclic transmission.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data frame structure of a cyclic procedure in data transmission for information processing in remote control, remote measurement, etc., and particularly to a data frame length which constitutes a cycle with a large amount of information. The present invention relates to a cyclic transmission frame structure capable of highly efficient data transmission that can shorten the cyclic transmission time of data that requires high-speed communication even when it needs to be long.

[0002]

2. Description of the Related Art Data transmission carried out by remote control or telemetry is executed by a system having a structure as shown in FIG. 4, for example. In FIG. 4, 1 is a control sequencer, 2 is a controlled drive device such as a motor control inverter in an industrial machine, and 3 is a bidirectional data transmission line provided between the control sequencer 1 and the controlled drive device 2. Therefore, the data transmission line 3 has a control sequencer 1
Command data to the controlled drive device 2 is transmitted from the controlled drive device 2, and report data such as measurement data to the control sequencer 1 is cyclically and continuously transmitted from the controlled drive device 2. A data message cyclically transmitted through the data transmission line 3 is configured as shown in FIG. 5, for example. In FIG. 5, Fo1, Fo2, and Foi each represent a data frame for one cycle, and each data frame has n data blocks so.
, So2, ..., Son. Each of the data blocks so1, so2, ..., Son represents predetermined and defined data in the system. That is, on the transmission side, for each frame that is a series of data, the head data block s of each frame
Predetermined data is written in each block from o1 to son and continuously and repeatedly transmitted. If the receiving side receives from the head data block so1 to the tail block son and there is no error in the received signal, a series of data for one frame is taken in, and if there is a transmission error, this series of data is discarded.

[0003]

By the way, in the conventional data transmission method as described above, the data block s
Even if the content of o1 is data that requires high speed, such as a feedback signal or an emergency signal for automatic control, all the data is transmitted under the same conditions, so the repetitive transmission time is 1 frame length and It is limited by the repetition period of click transmission and affects the characteristics of the entire system. It is necessary to limit the amount of data transmitted per cycle in order to prioritize the high speed of the transmitted data, but it is not possible to limit the amount of data per cycle due to the large amount of data even at low speed transmission. It was impossible. The present invention makes it possible to increase the transmission cycle of data that requires high-speed transmission and increase the transmission efficiency of data transmission in a data transmission system using a cyclic procedure that includes data that requires high-speed transmission and data that requires low-speed transmission. It is an issue.

[0004]

In order to solve the above problems, in the frame structure of cyclic transmission according to the present invention, a data frame forming one cycle can be transmitted at low speed with a data character which requires high speed communication. It is characterized in that it is composed of a plurality of blocks consisting of different data characters, and that low-speed communicatable data is divided into a plurality of frames for transmission.

[0005]

Since the frame structure of the cyclic transmission according to the present invention is configured as described above, it is possible to divide the data capable of low speed communication and to transmit a part of the divided data per one cycle. It became so.
Therefore, the length of one frame can be shortened, and data requiring high-speed communication is transmitted every time on a shortened frame, so that high-speed cyclic transmission can be realized.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An example in which the frame structure of cyclic transmission according to the present invention is applied to the system described in the prior art with reference to FIG. 4 will be described with reference to FIGS. FIG. 2 shows a data transmission circuit between the control sequencer 1 and the controlled drive device 2 in the system shown in FIG. 4, and 3 is provided between the control sequencer 1 and the controlled drive device 2. It is a bidirectional data transmission line. A general random transmission procedure from the control sequencer 1 to the controlled drive device 2 and a cyclic transmission procedure from the controlled drive device 2 to the control sequencer 1 are performed. In FIG. 2, 11 is a sequencer main body having a function of managing and controlling the entire control sequencer 1 and a sequencer function, 12 is a storage function for temporarily recording data (hereinafter referred to as high speed data) that requires high speed communication, and 13 is low speed. A storage function for temporary recording of communicable data (hereinafter referred to as low-speed data), 14 denotes a communication function including a data conversion function for data communication including a function according to the present invention and a transmission / reception function. In FIG. 2, reference numeral 21 denotes a drive device main body including a function of controlling and controlling the entire controlled drive device 2 and a drive circuit, 22 denotes a storage function for temporarily recording data requiring high speed communication (hereinafter referred to as high speed data), 23 Is a storage function for temporary recording of data that can be transmitted at low speed (hereinafter referred to as low speed data), and 24 is a communication function including a data conversion function for data communication including a function according to the present invention and a transmission / reception function. Although the configuration of each element function described above has been individually assigned reference numerals, the sequencer body 11, the control circuit of the drive circuit included in the drive device body 21 including the drive circuit, the control sequencer 1 and the controlled drive device. Depending on the conditions of the internal electronic circuit, the functions may be included in the same microcomputer function, for example. Further, each of the memory functions 12, 13, and 22, 23 may use a part of the memory device combined with the microcomputer. Further, depending on the form of the data transmission system after receiving the control sequencer 1, either or both of the temporary storage functions 12 and 13 may be excluded, and a data frame for cyclic transmission of the controlled drive device 2 may be created. Depending on the procedure, either or both of the temporary storage functions 22 and 23 may be excluded.
In addition, if the required function is formed based on the present invention, the conventional circuit may be used appropriately according to the conditions of the information processing system.

Next, the structure of a cyclic transmission data frame (hereinafter referred to as a frame) according to the present invention transmitted in the above circuit structure and its function will be described with reference to FIGS. In FIG. 1, S denotes a flow of data that is cyclically and continuously transmitted.
2, F3, · Fi · are respectively Fo1, F shown in FIG.
Similarly to o2, ..., Foi, data frames for one cycle are shown. In addition, each frame includes s1, s3, s5, and s6 marker characters and s
It is composed of 2, s4 data blocks. The above-mentioned s1 is STX, that is, the start indicator of one frame, s
2 is a high-speed data block, s3 is a label indicating the contents of low-speed data transmitted in this frame indicating the type of low-speed data or the recording address of the storage function, s4 is a low-speed data block, and s5 is ETX, that is, the end of this frame. As shown, s6 is an additional character for BCC, that is, an error check. As shown in FIG. 3, the series of frames shown in FIG. 1 includes a frame F1 including a high speed data block s12 and a low speed data block s14, and a high speed data block s14.
22 and a frame F2 including the low speed data block s24
.... The frame Fn including the high-speed data block sn2 and the last divided low-speed data block sn4 is transmitted through the transmission line, and the above-mentioned frames F1 to Fn are the data blocks of the changed data, if any. Is changed cyclically through the transmission line shown in FIG. In FIG. 3, the entry of the various marking characters shown in FIG. 2 is omitted. In the above-mentioned configuration, the high-speed data temporary storage function 12, 22 shown in FIG.
In this case, a storage capacity of, for example, 32 words, which is set based on the data condition that requires high-speed transmission in the information processing system that performs this cyclic transmission, is secured. The low-speed data temporary storage functions 13 and 23 are set based on the data conditions that allow low-speed transmission in the information processing system that performs this cyclic transmission, for example, 20 words in 32 word units A storage capacity necessary for a list or the like in which a label to be attached and an address for storing low-speed data corresponding to the label are associated with each other is secured.

In FIG. 1, a communication function 24 inside the controlled drive device 2 shown in FIG. 2 attaches a data block s2 read from a high speed data temporary storage function 22 after STXs1 by a timing signal provided inside, Low-speed data to be transmitted based on a command transmitted from the sequencer main body 11 or an operator or a higher-level management function such as a higher-level management system (not shown) and transmitted through the transmission line 3 or according to a predetermined condition. Of the low-speed data block s4
, The low-speed data corresponding to the label content is read from the low-speed data temporary storage function 23 and added after the label s3. After that, E indicating the end of one frame cycle
TXC5 and BCCs6 are attached according to the preset condition from the bit contents of the data items arranged so far, and the frame F
1 and outputs to the data transmission line 3. The communication function 24 repeats the above-described operation to create a frame at a preset time, for example, every 2 msec, and F1, F2, and
The data is continuously output to the transmission line 3 like F3 ....
Therefore, high speed data is transmitted every 2 msec. The low-speed data is divided into, for example, n frames when the amount of data is n frames, and one series of data is transmitted over a time of n times 2 msec. That is, as the low-speed data, for example, n different data for each frame according to a command issued from the control sequencer 2 are sequentially transmitted, including some data divided into several frames, and 2 × n
It is transmitted cyclically and repeatedly every msec. The communication function 14 inside the control sequencer 1 detects a series of frames, for example, the frame F1 from STXs1 and ETXs5 attached to the frames that are continuously transmitted, and B
Determine the correctness of the data sent by CCs6. If it judges that the sent data has an error, it will reject the data. If the data is correct, high speed data and low speed data are processed according to preset conditions. For example, high speed data is recorded in a temporary storage function 12 as a buffer and then transmitted to a predetermined electronic device or display device. The divided low-speed data is a temporary low-speed data temporary storage function 13
When the data is recorded in the above, the data is transmitted to a predetermined processing function. Alternatively, some low-speed data that fits in one frame is directly transmitted to a predetermined electronic circuit without being temporarily recorded. In the above description, the high-speed data is explained as being read from the high-speed data temporary storage function 22 and transmitted.
The urgent data may be directly transmitted without cyclic recording by a sampling process if the timing of cyclic transmission is appropriate, and may be recorded in a temporary storage device later if necessary. Also, every few seconds with low speed data
The data may be transmitted once, and when the data length is short, the data may be directly collected at the transmission timing without temporarily recording. Others may be appropriately configured / processed in accordance with the conditions that constitute this data transmission system. In the above description, the case in which the cyclic transmission procedure is performed from the controlled drive device 2 to the control sequencer 1 has been described, but cyclic transmission is performed by performing the same circuit function configuration among other devices. Of course, can be implemented.

[0009]

Since the frame structure of cyclic transmission according to the present invention is constructed and operates as described above, the following excellent effects are obtained. Even if low-speed data that does not require high speed is transmitted at an allowable long time interval, data that needs to be transmitted at high speed can be transmitted at a shorter repeat time interval by increasing the transmission cycle. Low speed data can be divided and transmitted. High-speed data and low-speed data can be efficiently transmitted according to their needs.

[Brief description of drawings]

FIG. 1 is a data frame diagram for explaining a structure of data in a data frame structure of cyclic transmission according to the present invention.

FIG. 2 is a schematic block configuration diagram showing an embodiment of a data communication system using a data frame configuration of cyclic transmission according to the present invention.

FIG. 3 is a flow chart of a data frame for explaining data transmission according to a data frame structure of cyclic transmission according to the present invention.

FIG. 4 is a schematic block configuration diagram showing a system example to which a data frame configuration of cyclic transmission according to the present invention is applied.

FIG. 5 is a data frame diagram for explaining a data frame structure of a data frame in conventional cyclic transmission.

[Explanation of symbols]

 F1, F2, F3, Fi, Fn: Data frame s2: High speed data block s4: Low speed data block

Claims (1)

[Claims] 1. In an information processing system for performing cyclic transmission for information transmission between devices, a data frame forming one cycle of transmission information is composed of a data character that requires high-speed communication and a data character that enables low-speed communication. A frame structure for cyclic transmission characterized by being composed of multiple blocks, and data that can be transmitted at low speed is divided into multiple data frames for transmission.