JPH05243725A - Direct bonding method of ceramic substrate and copper - Google Patents

Direct bonding method of ceramic substrate and copper

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Publication number
JPH05243725A
JPH05243725A JP4506592A JP4506592A JPH05243725A JP H05243725 A JPH05243725 A JP H05243725A JP 4506592 A JP4506592 A JP 4506592A JP 4506592 A JP4506592 A JP 4506592A JP H05243725 A JPH05243725 A JP H05243725A
Authority
JP
Japan
Prior art keywords
copper
ceramic substrate
conductor
ceramic
bonding method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4506592A
Other languages
Japanese (ja)
Inventor
Takao Okada
孝夫 岡田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP4506592A priority Critical patent/JPH05243725A/en
Publication of JPH05243725A publication Critical patent/JPH05243725A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To provide a direct bonding method of ceramic substrate and copper, in which satisfactory soldering can be performed even if the surface and rear face of the ceramic substrate differ from each other in the area of a required circuit conductor pattern. CONSTITUTION:In the direct bonding method of ceramic and copper in which copper circuit conductors respectively differing in required area are arranged on both sides of a ceramic substrate 1 in the manner of adhering closely to each other and heated to a predetermined temperature in the atmosphere with a predetermined oxygen content so that copper is bonded to the both sides of the ceramic substrate 1, copper dummy conductors are arranged in space areas 41, 42, where required copper is not arranged, on the surface of the ceramic substrate on the side of the smaller required area of copper in the manner of adhering closely to each other.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、マイクロ波集積回路や
高周波平面回路、あるいは半導体搭載回路やマイクロ波
非可逆回路などに用いられるセラミックの基板、例えば
アルミナやフェライト、窒化アルミの基板に回路導体で
ある銅を接合するセラミック基板と銅の直接接合法に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit substrate on a ceramic substrate used for a microwave integrated circuit, a high frequency plane circuit, a semiconductor mounting circuit, a microwave nonreciprocal circuit or the like, for example, a substrate of alumina, ferrite or aluminum nitride. The present invention relates to a direct bonding method of copper and a ceramic substrate for bonding copper.

【0002】[0002]

【従来の技術】セラミックは、その耐熱性や絶縁性、あ
るいは機械的特性が優れ、直流から超高周波まで電子回
路用の基板として幅広く利用されている。その材質も、
古くはアルミナやステアタイト、フォルステライト、フ
ェライトなどが、近年では窒化アルミや炭化硅素などい
わゆるファインセラミックスと呼ばれるものが用いられ
ている。
2. Description of the Related Art Ceramics are widely used as substrates for electronic circuits from direct current to super high frequency because of their excellent heat resistance, insulating properties, and mechanical properties. The material is also
In the old days, alumina, steatite, forsterite, ferrite, etc. are used, and in recent years, so-called fine ceramics such as aluminum nitride and silicon carbide are used.

【0003】このセラミックを電子回路用の基板として
用いるとき、その表面に金属導体膜を形成することが多
い。
When this ceramic is used as a substrate for an electronic circuit, a metal conductor film is often formed on its surface.

【0004】従来、セラミックに金属導体膜を形成する
方法としては、(a)モリブデン粉末などをセラミック
の表面に塗布して焼結後、ニッケルなどの金属メッキを
施して銀ろうなどによって導体膜を接合・形成するろう
付け法、(b)銅や金あるいは銀・パラジウムなどの粉
末ペーストを塗布後、焼結して導体膜を形成する厚膜
法、(c)真空中で金属を溶融・蒸発させて導体膜を形
成する真空蒸着法、(d)導体となる金属とセラミック
の間にチタン合金などの活性金属を介在させて焼結・接
合を行う活性金属法、などがある。
Conventionally, as a method of forming a metal conductor film on a ceramic, (a) molybdenum powder or the like is applied to the surface of the ceramic and sintered, and then the metal is plated with nickel or the like and the conductor film is formed by silver brazing or the like. A brazing method for joining and forming, (b) a thick film method for forming a conductor film by applying a powder paste such as copper or gold or silver / palladium, and (c) melting and evaporating metal in vacuum There are a vacuum vapor deposition method for forming a conductor film by performing the above, and (d) an active metal method for performing sintering and joining by interposing an active metal such as a titanium alloy between a metal serving as a conductor and a ceramic.

【0005】しかし近年、銅とセラミックとを他の金属
を介在することなしに、直接接合するダイレクト・ボン
ド・カッパー(以下略してDBCと記する。)法が、そ
の工程の単純性や熱伝導の良さなどの点から用いられる
ようになってきた。
However, in recent years, a direct bond copper (hereinafter abbreviated as DBC) method of directly joining copper and ceramic without interposing another metal is a simple process and heat conduction. It has come to be used because of its goodness.

【0006】DBC法は、セラミックと銅を密着させて
適度な酸素濃度を有する雰囲気(例えば窒素ガス)中
で、適度な温度に加熱し表面層の銅のみを溶融させ、こ
の溶融した銅がセラミック表面を濡らすことによってセ
ラミックと銅を接合する方法である。
[0006] In the DBC method, ceramic and copper are brought into close contact with each other and heated to an appropriate temperature in an atmosphere having an appropriate oxygen concentration (for example, nitrogen gas) to melt only the copper in the surface layer. It is a method of joining ceramic and copper by wetting the surfaces.

【0007】図2は銅Cuと酸素Oの相態図を示した
もので、縦軸は温度(単位は℃)横軸は酸素濃度(単位
は重量%)である。銅を加熱したとき、銅自身の酸素含
有量を含む雰囲気中の酸素濃度によって銅の相状態がど
のように変化するかを示したものである。
FIG. 2 shows a phase diagram of copper Cu and oxygen O 2 , in which the vertical axis represents temperature (unit: ° C.) and the horizontal axis represents oxygen concentration (unit: wt%). It shows how the phase state of copper changes when the copper is heated, depending on the oxygen concentration in the atmosphere containing the oxygen content of the copper itself.

【0008】常温から温度が上昇すると、銅は酸素濃度
が0のとき1083℃で溶解する。しかし酸素の有る状
態では酸素との共晶状態が存在し、溶解温度は低下す
る。銅と酸素の共晶温度は1065℃であり、図2にお
ける領域DおよびEは共晶状態のない固相である。
When the temperature rises from room temperature, copper melts at 1083 ° C. when the oxygen concentration is 0. However, in the presence of oxygen, a eutectic state with oxygen exists and the melting temperature decreases. The eutectic temperature of copper and oxygen is 1065 ° C., and regions D and E in FIG. 2 are solid phases without a eutectic state.

【0009】酸素濃度が0.008重量%のときから共
晶状態が存在し、また完全に溶解する温度は1083℃
より徐々に低下して、酸素濃度が0.39重量%のとき
共晶温度と一致する(図中F点)。領域Aは液相であ
り、領域Bは低濃度酸素における酸化第1銅の固溶体相
を示し、固体と液体の混合相である。酸素濃度が0.3
9重量%を超えると銅は酸素リッチな酸化第2銅の固溶
体相(領域C)を呈するが、もはやこの固溶体はセラミ
ックになじまず接合はできない。
The eutectic state is present when the oxygen concentration is 0.008% by weight, and the temperature at which it is completely dissolved is 1083 ° C.
It decreases more gradually, and coincides with the eutectic temperature when the oxygen concentration is 0.39% by weight (point F in the figure). The region A is a liquid phase, and the region B is a solid solution phase of cuprous oxide in low concentration oxygen and is a mixed phase of solid and liquid. Oxygen concentration is 0.3
Above 9% by weight, copper exhibits an oxygen-rich cupric oxide solid solution phase (region C), which is no longer compatible with the ceramic and cannot be joined.

【0010】DBC法が可能な銅の温度範囲は1065
〜1083℃で、かつ所要酸素濃度が0.39重量%以
下の図1の領域B(斜線部)である。
The temperature range of copper applicable to the DBC method is 1065.
This is a region B (hatched portion) in FIG. 1 where the required oxygen concentration is 0.39 wt% or less at -1083 ° C.

【0011】実際にDBC法によってセラミック基板を
作成する手順としては、先ずセラミック基板の両面に所
要の形状の銅板を密着させ、それを前述の温度および酸
素濃度条件を満たす電気炉内に配置し、適当な時間放置
するだけで良い。
As a procedure for actually producing a ceramic substrate by the DBC method, first, a copper plate having a required shape is adhered to both surfaces of the ceramic substrate, and the copper plate is placed in an electric furnace satisfying the above temperature and oxygen concentration conditions. All you have to do is leave it for a suitable time.

【0012】しかし領域Bの温度差は18℃、酸素濃度
差は0.39重量%と狭く、セラミックや銅板の大きさ
や厚さによって電気炉の温度や雰囲気中の酸素の量の制
御が困難になってくる。特に銅板の厚さが薄いときは温
度が数℃上昇したり、酸素の量が数十ppm増加すると
銅板は表面層だけでなく全体が溶解する。電気炉の温度
制御もその中に収納する材料の種類や大きさ、量によっ
て定常的に一定に保つことは難しい。
However, the temperature difference in the region B is as small as 18 ° C. and the oxygen concentration difference is as small as 0.39% by weight, which makes it difficult to control the temperature of the electric furnace and the amount of oxygen in the atmosphere due to the size and thickness of the ceramic or copper plate. Is coming. In particular, when the temperature of the copper plate is increased by several degrees Celsius or the amount of oxygen is increased by several tens ppm when the thickness of the copper plate is thin, not only the surface layer but also the entire copper plate is dissolved. It is difficult for the temperature control of an electric furnace to constantly maintain a constant value depending on the type, size, and amount of materials contained therein.

【0013】また作成するセラミック基板は、その用途
によって直流からマイクロ波までさまざまな形態があ
る。例えば導体は片面のみに接合するだけでよいもの、
あるいは両面必要なもの、接合する銅板が厚くなければ
ならないもの、あるいは薄い必要性のあるものなどであ
る。
The ceramic substrate to be produced has various forms from direct current to microwave depending on its application. For example, conductors need only be bonded to one side,
Alternatively, it is necessary for both sides, the copper plate to be joined must be thick, or must be thin.

【0014】しかし両面に導体を必要とする場合、その
大半は両面の導体形状が異なっている。それは片面を電
気的に接地導体として使用するためにセラミック基板の
全面に導体を接合するからである。これに対し他の面に
は例えば半導体チップを配置するための導体部や外部線
路との接続を行うための配線部などの導体パターンが接
合され、必ずしもセラミック基板の全面に導体が接合さ
れない。
However, when conductors are required on both sides, most of them have different conductor shapes on both sides. This is because the conductor is bonded to the entire surface of the ceramic substrate in order to electrically use one surface as a ground conductor. On the other hand, conductor patterns such as a conductor portion for arranging a semiconductor chip and a wiring portion for connecting to an external line are joined to the other surface, and the conductor is not necessarily joined to the entire surface of the ceramic substrate.

【0015】図3はこのような導体パターンを密着・配
置したDBC前のセラミック基板1を示したものであ
る。
FIG. 3 shows a ceramic substrate 1 before DBC in which such a conductor pattern is closely attached and arranged.

【0016】セラミック基板1の裏面は図3(b)に示
すようにセラミック基板のほぼ全面に接地導体3が配置
され、表面は図3(a)に示すように所望の導体21〜
24が配置される。表面の導体21〜24は必ずしもセ
ラミック基板1の全面にわたって配置されない。
As shown in FIG. 3 (b), the ground conductor 3 is disposed on the back surface of the ceramic substrate 1 on substantially the entire surface of the ceramic substrate, and the front surface thereof has desired conductors 21 to 21 as shown in FIG. 3 (a).
24 are arranged. The conductors 21 to 24 on the surface are not necessarily arranged over the entire surface of the ceramic substrate 1.

【0017】[0017]

【発明が解決しようとする課題】導体パターンを密着・
配置したセラミック基板1を電気炉に入れ加熱した場
合、表面の銅板と裏面の銅板の温度が同じであれば良い
が、表面と裏面の銅板の量が異なるため、セラミック基
板の面の温度分布が不均一になる。
[Problems to be Solved by the Invention]
When the placed ceramic substrate 1 is placed in an electric furnace and heated, the temperature of the front copper plate and the back copper plate may be the same, but since the amounts of the front and back copper plates are different, the temperature distribution on the surface of the ceramic substrate is It becomes uneven.

【0018】図4は図3(a)のAーB断面を示したも
ので、この断面においてセラミック基板1の表面側にお
ける熱分布は、導体のある部分の方が導体のない空き領
域41、42の部分より低くなる。これは銅板が有るか
無いかでこのミクロ的な領域の熱容量が異なるからであ
る。
FIG. 4 shows a cross section taken along the line AB of FIG. 3 (a). In this cross section, the heat distribution on the surface side of the ceramic substrate 1 is such that the portion with the conductor has an empty area 41 without the conductor, It becomes lower than the part 42. This is because the heat capacity of this microscopic area differs depending on whether or not there is a copper plate.

【0019】このため温度の僅かな上昇によって裏面の
接地導体3のうち領域31、32の部分が溶解するとい
う欠点があった。領域31、32の部分が溶解しないよ
うに温度を下げると、表面の導体21が温度不足となり
接合不良を生じる。
For this reason, there is a drawback that the regions 31, 32 of the ground conductor 3 on the back surface are melted by a slight increase in temperature. If the temperature is lowered so that the regions 31 and 32 are not melted, the temperature of the conductor 21 on the surface becomes insufficient, resulting in defective bonding.

【0020】なお領域31、32の部分が溶解すると、
図5に示すようにその部分が表面張力によって丸く固ま
ったり、接地導体3の中央部に引き寄せられてしまう。
When the regions 31 and 32 are melted,
As shown in FIG. 5, the portion is rounded and solidified by the surface tension or is attracted to the central portion of the ground conductor 3.

【0021】このようになったセラミック基板は、例え
ば放熱板にはんだ付けや圧着などで取り付けるとき空気
層が生じたり放熱面積が狭くなったりして、高電力半導
体を装荷することができなくなる。またマイクロ波帯で
は接地導体3をキャリアプレートと呼ばれる金属板には
んだ付けすることが良く行われる。この場合はんだ付け
の面積が狭くなり機械的総合力の低下をきたし衝撃や振
動に対してはがれなどを生じる。
In such a ceramic substrate, when it is attached to the heat dissipation plate by soldering or pressure bonding, for example, an air layer is generated or the heat dissipation area becomes small, so that the high power semiconductor cannot be loaded. In the microwave band, the ground conductor 3 is often soldered to a metal plate called a carrier plate. In this case, the soldering area is reduced, resulting in a decrease in mechanical total force and peeling off due to shock or vibration.

【0022】本発明は上記の欠点を解決するもので、セ
ラミック基板の表面と裏面とで所要の回路導体パターン
の面積の大きさがが異なるときにも、良好なはんだ付け
が行えるセラミック基板と銅との直接接合法を提供する
ことを目的とする。
The present invention solves the above-mentioned drawbacks. A ceramic substrate and a copper substrate which can be well soldered even when the required area of the circuit conductor pattern is different between the front surface and the back surface of the ceramic substrate. It is intended to provide a direct joining method with.

【0023】[0023]

【課題を解決するための手段】本発明は、セラミック基
板の両面に所要の回路導体パターンの面積の大きさが異
なる銅を密着して配置し、所定の酸素濃度の雰囲気中で
所定の温度に加熱し、セラミック基板の両面に銅を接合
する場合に、所要の回路導体パターンの面積が小さい側
のセラミック基板の面で、所要の銅が配置されない空き
領域に疑似導体の銅を密着して配置する。
SUMMARY OF THE INVENTION According to the present invention, copper having different area sizes of required circuit conductor patterns is closely attached to both surfaces of a ceramic substrate, and the copper is kept at a predetermined temperature in an atmosphere of a predetermined oxygen concentration. When heating and joining copper to both sides of the ceramic substrate, place the pseudo conductor copper in close contact with the empty area where the required copper is not placed on the side of the ceramic substrate where the required circuit conductor pattern area is small. To do.

【0024】[0024]

【作用】上記のようなセラミック基板と銅の直接接合法
によれば、セラミック基板の両面で銅の面積がほぼ等し
いため、セラミック基板の全面にわたって温度分布が一
様にでき、熱容量の差が少ない状態でセラミック基板と
銅の直接接合が行える。
According to the above-described direct bonding method of the ceramic substrate and copper, since the areas of copper are substantially equal on both sides of the ceramic substrate, the temperature distribution can be made uniform over the entire surface of the ceramic substrate and the difference in heat capacity is small. In this condition, the ceramic substrate and copper can be directly bonded.

【0025】[0025]

【実施例】以下、本発明の一実施例を図面を参照して説
明する。なお、各図面において従来の技術の説明で参照
した図面と同一部分には同一符号を付して詳細な説明を
省略する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. In each drawing, the same parts as those in the drawings referred to in the description of the conventional technique are designated by the same reference numerals, and detailed description thereof will be omitted.

【0026】図1はセラミック基板1の表面側の回路導
体パターンを示す図で、所要の回路導体21〜24の他
に、所要の回路導体のない空き領域41、42にも疑似
導体の銅51、52を配置している。なお銅51、52
の配置にあたっては、本来の所要の回路導体21〜24
の機能、例えば絶縁性や高周波伝送特性などに影響を与
えないようにする。
FIG. 1 is a diagram showing a circuit conductor pattern on the front surface side of the ceramic substrate 1. In addition to the required circuit conductors 21 to 24, the pseudo conductor copper 51 is also provided in the empty regions 41 and 42 without the required circuit conductor. , 52 are arranged. Copper 51, 52
When arranging, the originally required circuit conductors 21 to 24
Function, such as insulation and high-frequency transmission characteristics, should not be affected.

【0027】図5ではセラミック基板1の裏面側の接地
導体3の導体パターンは特に示していないが、例えば図
3(b)のように全面にわたって銅を配置する。
Although the conductor pattern of the ground conductor 3 on the rear surface side of the ceramic substrate 1 is not shown in FIG. 5, copper is arranged over the entire surface as shown in FIG. 3B, for example.

【0028】なお銅51、52は回路導体21〜24と
同じ厚さでもあるいは異なっても良いが、熱容量を詳し
く予測することは困難なため、例えば試行錯誤的に決め
ることになる。
The copper layers 51 and 52 may have the same thickness as the circuit conductors 21 to 24 or may have different thicknesses, but it is difficult to predict the heat capacity in detail.

【0029】このようにセラミック基板の表面側と裏面
側とで回路導体パターンが異なる場合、所要の回路導体
パターンの面積が小さい側に、言わば疑似導体パターン
としての導体を配置している。
In this way, when the circuit conductor patterns are different on the front surface side and the back surface side of the ceramic substrate, the conductors as pseudo conductor patterns are arranged on the side where the area of the required circuit conductor pattern is small.

【0030】[0030]

【発明の効果】本発明によれば、セラミック基板の面の
全体にわたって温度分布が均一化し、熱容量差のないD
BC条件を得ることができ、セラミック基板の表面側と
裏面側とで所要の回路導体パターンの面積の大きさがが
異なるときにも、セラミック基板と銅との良好な直接接
合が可能である。
According to the present invention, the temperature distribution is made uniform over the entire surface of the ceramic substrate, and there is no difference in heat capacity.
The BC condition can be obtained, and good direct bonding between the ceramic substrate and copper is possible even when the required area of the circuit conductor pattern is different between the front surface side and the back surface side of the ceramic substrate.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例を説明する斜視図である。FIG. 1 is a perspective view illustrating an embodiment of the present invention.

【図2】銅と酸素の相状態を示す図である。FIG. 2 is a diagram showing a phase state of copper and oxygen.

【図3】従来の技術を説明する図である。FIG. 3 is a diagram illustrating a conventional technique.

【図4】従来の技術を説明する図である。FIG. 4 is a diagram illustrating a conventional technique.

【図5】従来の技術を説明する図である。FIG. 5 is a diagram illustrating a conventional technique.

【符号の説明】[Explanation of symbols]

1…セラミック基板 21〜24…回路導体 3…接地導体 41,42…空き領域 51、52…疑似導体の銅 DESCRIPTION OF SYMBOLS 1 ... Ceramic substrate 21-24 ... Circuit conductor 3 ... Ground conductor 41, 42 ... Empty area 51, 52 ... Pseudo conductor copper

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 セラミック基板の両面に、それぞれ所要
面積の大きさが異なる回路導体の銅を密着して配置し、
所定の酸素濃度の雰囲気中で所定の温度に加熱し、セラ
ミック基板の両面に銅を接合するセラミックと銅の直接
接合法において、回路導体の銅の所要面積の大きさが小
さい側のセラミック基板の面で、所要の銅が配置されな
い空き領域に疑似導体の銅を密着して配置するセラミッ
ク基板と銅の直接接合法。
1. The copper of a circuit conductor having a different required area is closely attached to both surfaces of the ceramic substrate,
In the direct bonding method of ceramic and copper, which is heated to a predetermined temperature in an atmosphere of a predetermined oxygen concentration and copper is bonded to both sides of the ceramic substrate, in the ceramic substrate on the side where the required area of copper of the circuit conductor is small. In terms of surface, a direct bonding method between a ceramic substrate and copper, in which a pseudo conductor copper is placed in close contact with an empty area where the required copper is not placed.
JP4506592A 1992-03-03 1992-03-03 Direct bonding method of ceramic substrate and copper Pending JPH05243725A (en)

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JP4506592A JPH05243725A (en) 1992-03-03 1992-03-03 Direct bonding method of ceramic substrate and copper

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Application Number Priority Date Filing Date Title
JP4506592A JPH05243725A (en) 1992-03-03 1992-03-03 Direct bonding method of ceramic substrate and copper

Publications (1)

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JPH05243725A true JPH05243725A (en) 1993-09-21

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JP4506592A Pending JPH05243725A (en) 1992-03-03 1992-03-03 Direct bonding method of ceramic substrate and copper

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023013684A1 (en) 2021-08-03 2023-02-09 京セラ株式会社 Ceramic sintered body, ceramic substrate, mounting substrate, electronic device, and method for manufacturing ceramic sintered body

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023013684A1 (en) 2021-08-03 2023-02-09 京セラ株式会社 Ceramic sintered body, ceramic substrate, mounting substrate, electronic device, and method for manufacturing ceramic sintered body

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