JPH05233748A - Simulation method - Google Patents

Abstract

PURPOSE:To realize an efficient arithmetic operation, and to execute a simulation at high speed at the time of the arithmetic execution of the simulation. CONSTITUTION:A division into combined circuits (dotted line) is operated. The same circuit patterns 23 and 24 which are repeated twice are registered. Input and output patterns to the circuits 23 and 24 are turned into a table, and registered. When the patterns which are the same as the input patterns turned into the table are inputted, the output patterns are searched from the registered table without performing the arithmetic operation. Circuits 21-24 whose operating frequency is 2 are registered. The input and output patterns to the circuits 21 and 22 are turned into the table, and registered. The circuits 21-24 are merged, and a merge circuit 26 is registered. The input and output pattern to the merge circuit 26 is turned into the table.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a simulation method for performing a simulation in the design stage of a logic circuit.

[0002]

2. Description of the Related Art A conventional simulation method is inefficient because a calculation is executed every time a pattern is input, and the same calculation is repeated even when the same input pattern is repeated. In addition, there is a problem of storage capacity in tabulating all the input / output patterns, and the calculation result cannot be tabulated.

On the other hand, simulation programs, etc.
It is possible to divide one program into several source files and write them, and compile them individually.
Finally, the linkage editor combines all the object files of the subroutines and functions used in the program into one execution module.

In recent years, so-called library routines and library functions such as standard input / output routines and arithmetic operation functions provided in the system are not combined, and they are called and executed when the program is executed.

However, in order to call a subroutine or function created by the user in a program, it is necessary to specify it in the source program in advance, and a function not specified in the source program cannot be called. For example, when calling a subroutine for displaying the simulation result graphically, the subroutine program must be specified in the source program.

[0006]

As described above, according to the conventional simulation method, the calculation is performed every time the pattern is input, and the same calculation is repeated even if the same input pattern is repeated, so that the high speed simulation is most required. Was a fatal drawback. In addition, there is a fatal drawback that the storage capacity becomes enormous in order to tabulate all the operations in order to obtain high speed.

When a simulation is executed by creating an object file from a program written in a programming language and combining the object files with a linkage editor to create one execution file, The subroutine or function to be called in the program had to be specified in the source program in advance.

Therefore, there is a problem that it is impossible to call a subroutine or function which is not specified in the source program, and it is impossible to call an arbitrary subroutine or function depending on the execution state of the program.

Further, in the case of frequent modifications such as a simulation program in the middle of development, it is necessary to relink the whole program every time the program is modified, which causes a problem in terms of program development efficiency. ..

The present invention solves such a problem, and the first object thereof is to improve the efficiency of simulation and to make the input / output pattern into a table with a realistic storage capacity. It is to provide a simulation method.

A second object is to load an object file of a subroutine or function arbitrarily designated by an operator into the main memory during the execution of a simulation, thereby calling a subroutine or function not specified in the source program. It is an object of the present invention to provide a simulation method having a program dynamic control means that can be executed.

[0012]

In order to solve such a problem, a first aspect of the present invention obtains the repetition frequency of each circuit pattern forming a logic circuit and displays the input / output pattern of a high frequency circuit pattern as a table. The operation frequency of each circuit pattern is calculated, and the simulation result of the circuit pattern having a high operation frequency is tabulated.

A second aspect of the invention is to create an object file from a program written in a programming language, combine the object files with a linkage editor, create one execution file and execute a simulation. , A means for inputting an arbitrary subroutine name or function name to the main main program, a means for holding the names of the subroutines or functions loaded in the main memory and their start addresses, To retrieve the start address of the subroutine or function with the arbitrarily specified name by searching the data held by the means that holds the name of the subroutine or function loaded in Sable that is loaded into main memory and included in the object file A means for extracting the name of the chin or function and its start address and adding it to the means for holding the name of the subroutine or function loaded in the main memory and its start address, and a subroutine or function from the extracted start address And a means for executing

[0014]

According to the first aspect of the invention, the circuit designed by the designer is analyzed to extract a circuit having a high operation frequency. For a circuit with a high operation frequency, the result of the operation performed once is held. When the same input pattern as before is input in a circuit with high operation frequency, the held calculation result is used as an output pattern.

In the second invention, first, an operator inputs and designates an arbitrary subroutine name or function name from a keyboard or the like. Next, if the subroutine or function with the specified name is already loaded in the main memory, the start address of the subroutine or function is fetched.

When the subroutine or function having the designated name is not loaded in the main memory yet, the object file including the corresponding subroutine or function is loaded in the main memory, and then the leading address is taken out.
Then, the subroutine or function is executed from the fetched start address.

As described above, in the second aspect of the invention, the operator specifies an arbitrary subroutine name or function name during the simulation by the dynamic control means of the program, and loads the object file on the main memory for execution. Calls a subroutine or function with an arbitrary name in the object file.

[0018]

The details of the present invention will be described below with reference to the illustrated embodiments.

First Invention FIG. 1 is a diagram showing a basic configuration for realizing the simulation method of the first invention. FIG. 2 is a diagram showing an example of a specific logic circuit. FIG. 3 is an example of a circuit pattern with high operation frequency in the circuit of FIG. FIG. 4 is an example of the input pattern. FIG. 5 shows the calculation result of the circuit pattern of FIG. FIG. 6 is a circuit equivalent to FIG. FIG. 7 is a table of the input / output patterns of the circuit 26 shown in FIG.

First, the outline will be described with reference to FIG. When the circuit description 2 described by the designer is read by the simulator 1, the circuit description analysis unit 5 divides the circuit description into combinational circuits, and analyzes whether similar circuit patterns are repeated. The repetition frequency of the circuit pattern is obtained, and the circuit pattern having a high repetition frequency is extracted and registered in the circuit frequency registration unit 6.

Next, a simulation is performed with the input pattern 3. If the high-frequency circuit pattern is a combinational circuit, the input / output pattern is tabulated and registered in the circuit table database 4. When the next input pattern is input, the input pattern analysis unit 7 checks whether or not the input pattern of the circuit registered by the circuit frequency registration unit 6 matches the table registered in the circuit table database 4.

If there is a match, the output is obtained using the table without performing the calculation. If there is no match, a new calculation is executed and the result is registered in the circuit table database 4 and tabulated.

When the simulation is performed several times in this way, the operation frequency is calculated in the operation circuit analysis unit 9 so that the combination circuit having a high operation frequency is registered in the circuit frequency registration unit 6.

Further, from the next simulation, the circuit table database 4 is used to tabulate the operation results in the circuits with high operation frequency. The circuit description analysis unit 5 determines whether or not the circuits registered by the circuit frequency registration unit 6 can be merged. If the circuits can be merged, the merged circuit is newly registered in the circuit frequency registration unit 6.

In this way, the calculation results can be made into a table, and the simulation can be performed from the next time as few times as possible.

Next, a specific example will be described. FIG. 2 is a circuit designed by the designer. This circuit is first divided into combinational circuits by the circuit description analysis unit 5 like the circuit surrounded by the dotted line in FIG. Next, when it is checked whether the same circuit pattern is repeated many times, the circuit shown in FIG. 3 is repeated twice.
Register with.

Assuming that the input pattern as shown in FIG. 4A is inputted, the circuit 23 shown in FIG.
The pattern 24 in FIG. 5 and the circuit 24 in the pattern 52 in FIG. The result is tabulated and registered in the circuit table database 4.

Next, when the input pattern of FIG. 4 (b) is input, the input pattern of the circuit 24 of FIG. 2 coincides with the input pattern 52 of FIG. Obtain the output from 4.

The circuit 23 of FIG. 2 has the input pattern 51 of FIG.
, The circuit table database 4 cannot be referred to. Therefore, the calculation is executed and the calculation result 53 is held in the circuit table database 4.

When the operation frequency up to now is calculated, the circuit 21,
22, 23, and 24 have a frequency of 2, but the circuit 25 has a frequency of 0.
Is. Therefore, the circuits 21, 22, 23, and 24 are registered in the circuit frequency registration unit 6. However, since the circuits 23 and 24 have already been registered, the circuits 21 and 22 are newly registered.

In the next simulation, the circuits 21 and 22
Are tabulated. Since the circuits 21 to 24 can be merged, the merged circuit is newly registered as the circuit 26 in the circuit frequency registration unit. At this time, the circuit of FIG. 2 becomes equivalent to the circuit of FIG. 6 and can be simplified. Further, by forming the merged circuit 26 into a table as shown in FIG. 7, more efficient calculation can be performed.

Second Invention FIG. 8 is a flow chart showing the dynamic control means of the program in the simulation method of the second invention.

First, in step 1, the main program is started. FIG. 9 shows an example of a main program written in the programming language C. Function_loadobj, which is a means for reading an object file, and function_search, which is a means for extracting the start address of a designated function name.
h, a function-type pointer variable dmysub that is means for executing from the start address is added.

Further, a series of descriptions for setting the dynamic control means 61 of the program at a place where an arbitrary function is desired to be called is set. The dynamic control means 61 can be set at a plurality of locations.

When the dynamic control means 61 of the program is executed during the execution of the main program, the input of the function name is waited at step 2. When the operator inputs an arbitrary function name from the keyboard, etc., in step 3, the function_sear
The start address of the function specified by ch () is taken out. FIG. 10 is a table showing the names of the functions loaded in the main memory and held in the data area and their start addresses.

In step 4, the correct address is returned when all the specified functions are loaded, so st
Go to ep6. If it is not loaded yet, -1 is returned, so in step 5, the object file containing the corresponding function is loaded into the main memory by the function _loadobj (), and the function name and start address, the function name and start address are set. After adding to the data area to be held, the start address is extracted again by the function _search ().

FIG. 11 is a schematic diagram showing the state of the main memory when the object files of the functions func1 and func2 arbitrarily specified by the operator are loaded on the main memory. The data of FIG. 10 is held in the data area in the figure. By substituting the function-type pointer variable dmyfnc to be executed from the start address fetched in step 6, an arbitrary function designated by the operator is executed from the start address. Hereinafter, every time the dynamic control means 61 of the program is executed, step 2 to step 6 are repeatedly executed.

FIG. 12 is a flow chart according to another embodiment of the second invention. In the present embodiment, when it is impossible to describe in advance a series of descriptions for providing the dynamic control means 61 of the program in the source program, for example, when there is no source program and only the execution file exists,
The invention of can be applied.

First, in step 1, the main program is started. At this time, an arbitrary break point is set. Once the program has been interrupted by the breakpoint, in step 7, in a well known manner, the program is patched to incorporate a series of descriptions that provide a dynamic control means 61 for the program. When the program is restarted, the dynamic control means 61 of the program is executed, and the steps after step 2 in FIG. 8 are executed.

As described above, according to this embodiment, it is possible to load the object file of the function having the name arbitrarily specified by the operator into the main memory and execute the program during the execution of the program.

According to the second aspect of the present invention, even if the data is necessary during the simulation execution, but there is no such data, the execution can be continued by inputting the component name or the module name. For example, a subroutine program that graphically displays the simulation result can be called. Alternatively, in the first invention,
It is also possible to specify and execute a program name for tabulating the input / output patterns.

The second invention is not limited to simulation, but can be applied to the entire software.

[0043]

As described above, according to the first aspect of the present invention, it is possible to realize efficient calculation when executing the calculation of the simulation, and to speed up the simulation. Further, by making only high-frequency input / output patterns into a table, a practical storage capacity can be used.

According to the second invention, since the object of the function having an arbitrary name is loaded into the main memory and executed during execution of the program, even if it is not specified in the source program, It can execute subroutines and functions. As a result, the function to be executed next is specified according to the execution state of the program, and the number of functions that can be selected is not limited, so that it is possible to construct a program with a high degree of freedom.

Further, in the case of frequent modifications such as a program in the middle of development, the labor of re-linking the entire program can be saved, and the program development efficiency can be improved.

[Brief description of drawings]

FIG. 1 is a diagram showing a basic configuration for realizing a simulation method of a first invention.

FIG. 2 is a diagram showing an example of a specific logic circuit in the first invention.

FIG. 3 is a diagram showing an example of a circuit pattern having a high operation frequency in the circuit of FIG.

FIG. 4 is a diagram showing an input pattern in the first invention.

FIG. 5 is a diagram showing a calculation result of the circuit pattern of FIG.

FIG. 6 is a diagram showing a circuit equivalent to FIG. 2 after merging.

FIG. 7 is a table showing the input / output patterns of the circuit 26 of FIG.

FIG. 8 is a flowchart showing dynamic control means of a program in the simulation method of the second invention.

FIG. 9 shows an example of a program written in a programming language C.

FIG. 10 is a table showing the names of the functions loaded in the main memory and held in the data area and their start addresses in the second invention.

FIG. 11 is a schematic diagram showing a state of main memory after loading an object file in the second invention.

FIG. 12 is a flowchart according to another embodiment of the second invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 simulator 2 circuit description 3 input pattern 4 circuit table database 5 circuit description analysis unit 6 circuit frequency registration unit 7 input pattern analysis unit 8 operation execution unit 9 operation circuit analysis unit 21 to 26 combination circuit 61 dynamic control means

Claims (2)

[Claims] 1. A repetition frequency of each circuit pattern forming a logic circuit is obtained, an input / output pattern of a high frequency circuit pattern is tabulated, an operation frequency of each circuit pattern is calculated, and a simulation of a circuit pattern having a high operation frequency is performed. A simulation method characterized by tabulating the results. 2. An object file is created from a program written in a programming language, the object files are combined using a linkage editor, and 1
When creating two execution files and executing a simulation, a means to input and instruct any subroutine name or function name to the main main program, and the name of the subroutine or function loaded in the main memory and its The means for holding the start address, the name of the subroutine or function loaded on the main memory and the data held by the means for holding the start address are searched, and the subroutine of the arbitrarily specified name or A means for fetching the start address of the function, and a subroutine loaded in the main memory by loading the object file onto the main memory and extracting the names and start addresses of the subroutines and functions included in the object file And means to add the name of the function and its start address to the means to hold Simulation method characterized by the addition of means for executing a subroutine or function from the head address.