JPH05224985A - Microprogram controller - Google Patents

Abstract

PURPOSE:To early detect and analyze such a bug that a microprogram may have a runaway when the reading address of a memory shows an unused area of the microprogram and a memory access is carried out. CONSTITUTION:An address holding circuit 3 holds the address which is outputted to an internal memory 2 from a memory processor 1. A comparator 5 compares the output of a constant circuit 4 which set the address of an unused area of the memory 2 as a parameter with the output of the circuit 3. If the coincidence is secured by the comparison, a stop request signal is outputted to the microprocessor 1. Thus, the microprocessor 1 stops its instructions to keep a state set right after the output of an abnormal address and can early detect and analyze the bugs.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a micro program control device, and more particularly to a micro program control device for program debugging or for preventing program abnormalities.

[0002]

2. Description of the Related Art A conventional microprogram control device of this type outputs a memory address from a microprocessor (MPU) to the outside when a microprogram is running and fetches the microprogram stored in the memory to Although an instruction is being executed, during program debugging, an instruction may be fetched by outputting an address where the microprogram is not stored in the memory due to a program design mistake, which causes abnormal program running. It may run out of control.

[0003]

In the above-described conventional microprogram control device, when a microprogram unimplemented area in the memory is accessed during debugging, an undefined program is executed and, as a result, the management table or the like is destroyed. Runaway, and I was collecting and analyzing the program trace for analysis, but since the time has elapsed from the start of the program until the program was stopped, the state when it became abnormal changed. However, there is a problem that it takes a lot of time to analyze the cause. Further, this problem may also cause the microprogram to run out of control in the case where the hardware of the microprogram control device itself fails and the hardware / microprogram cannot detect an error.

[0004]

A microprogram control device according to the present invention holds a microprocessor running by a microprogram, a memory storing the microprogram, and an address output to the outside by the microprocessor. The address holding circuit, a constant circuit that stores the address of an unused area of the memory as a constant in advance, a comparison circuit that compares the output of the address holding circuit with the output of the constant circuit, and this comparison circuit match. In this case, a stop means for stopping (HALT) the program running of the microprocessor is provided, and an address output to the outside when the microprocessor fetches an instruction is compared with the constant circuit indicating an unused area of the memory and coincides with each other. In this case, stop the above microprocessor to prevent program runaway. In which was to so that.

[0005]

According to the present invention, the address of the unused area in the internal memory is set in advance in the constant circuit, and the address output from the microprocessor at the time of memory access is compared with the parameter in the constant circuit. HALT.

[0006]

FIG. 1 is a block diagram showing an embodiment of the present invention. In FIG. 1, reference numeral 1 is a microprocessor (MPU) that runs with a microprogram, 2 is an internal memory in which the microprogram is stored, 3 is an address holding circuit that holds an address output from the microprocessor 1 to the outside, and 4 is A constant circuit which stores the address of an unused area of the memory as a constant in advance, 5 is a comparison circuit for comparing the output of the address holding circuit 3 and the output of the constant circuit 4, and 6 is an internal bus in the microprogram controller. Is. Reference numeral 7 denotes a stop (HALT) instruction signal that is output when the comparison results from the comparison of the parameters of the microprocessor 1 by the comparison circuit 5, and this path is the microprocessor when the comparison circuit 5 matches. The stop means for stopping (HALT) the program running of No. 1 is configured. Then, when the microprocessor (MPU) 1 fetches an instruction, the address output to the outside is compared with the constant circuit 4 indicating the unused area of the memory, and if they match,
The microprocessor 1 is stopped (HALT) to prevent a program runaway.

FIG. 2 is an explanatory diagram showing a configuration example of the internal memory 2 in FIG. In FIG. 2, address 00
000 (H) to 3FFFF (H) and E0000
(H) to EFFFF (H) indicate storage areas of micro programs actually used by the microprocessor 1 or areas such as control tables. And the address 400
00 (H) to 7FFFF (H) indicate unused areas of the microprogram although the memory area as hardware exists. Address 80000 (H) ~ DFFFF
(H) is an area where a memory as hardware does not exist.

Next, the operation of the embodiment shown in FIG. 1 will be described with reference to FIG. First, when the micro program is running, the microprocessor 1 outputs an address to fetch an instruction. The output address is held in the address holding circuit 3 to supply the address to the internal memory 2. Then, the data (instruction) in the internal memory 2 is read at the given address and is taken into the microprocessor 1 via the internal bus 6. The microprocessor 1 queues the fetched data (instruction), sequentially processes the queue, and executes the instruction.

Next, at the time of program debugging, an address (40000 (H) to 7FFFF) where the micro program does not exist in the internal memory 2 due to a design error of the micro program (for example, a jump destination address setting error).
When (H)) is output from the microprocessor 1, the data output from the internal memory 2 is queued in the microprocessor 1 with a value of all "0" after memory clear or an indefinite value. The queue is processed sequentially and indefinite data is processed as an instruction. Microprocessor 1
If the instruction fetched from the internal memory 2 is applicable to an executable instruction code, the instruction is executed, and as a result, the control information managed by the microprocessor 1 is updated and the next instruction is fetched. However, the result after the execution of this instruction means that erroneous processing is performed, and normal control information is destroyed one after another. Then, it may become clear that abnormal processing has been performed, and there may be no valid data even if the trace information is analyzed. In the present invention, the most significant digit (MSB) of the address of the unused area of the internal memory 2 is 4 bits (8/9 / A / B / C / D in the memory configuration of FIG. 2, 8/9 / A / B / C / D: number of leading digits) is set in the constant circuit 4 as a parameter, and the output of the address holding circuit 3 held when the internal memory 2 is accessed from the microprocessor 1 is compared with each parameter. Circuit 5 compares and if they match, H of microprocessor 1
Activates the signal to the ALT / STOP input terminal. When the instruction of the internal memory 2 is fetched into the instruction queue, the microprocessor 1 processes the interrupt from the HALT terminal and executes the instruction stop. As a result, the microprocessor 1 does not execute the erroneous instruction read from the internal memory 2, the instruction stops, and the control information managed by the microprocessor 1 is not destroyed. The state immediately after the memory access is retained.

[0010]

As described above, according to the present invention, the address of the unused area in the internal memory is set in advance in the constant circuit, and the address output at the time of memory access from the microprocessor is set as the parameter in the constant circuit. By comparing and matching, the microprocessor is halted (HALT), so the state can be retained immediately after the abnormal address is output. Therefore, even when the output address is abnormal due to a runaway of the microprogram during debugging or a hardware failure, failure analysis is possible. There is an effect that the time can be shortened.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is an explanatory diagram showing a configuration example of an internal memory in FIG.

[Explanation of symbols]

 1 Microprocessor (MPU) 2 Internal memory (memory) 3 Address holding circuit 4 Constant circuit 5 Comparison circuit

Claims (1)

[Claims] 1. A microprocessor running on a micro program, a memory in which the micro program is stored, an address holding circuit for holding an address output from the microprocessor to the outside, and an address of an unused area of the memory in advance. Is stored as a constant, a comparison circuit for comparing the output of the address holding circuit with the output of the constant circuit, and a stopping means for stopping the program running of the microprocessor when the comparison circuit matches. When the instruction fetches by the microprocessor, the address output to the outside is compared with the constant circuit indicating the unused area of the memory, and when the addresses match, the microprocessor is stopped to prevent program runaway. A microprogram controller characterized in that