JPH05217900A - Apparatus for manufacturing semiconductor device - Google Patents

Apparatus for manufacturing semiconductor device

Info

Publication number
JPH05217900A
JPH05217900A JP1734792A JP1734792A JPH05217900A JP H05217900 A JPH05217900 A JP H05217900A JP 1734792 A JP1734792 A JP 1734792A JP 1734792 A JP1734792 A JP 1734792A JP H05217900 A JPH05217900 A JP H05217900A
Authority
JP
Japan
Prior art keywords
vacuum chamber
semiconductor substrate
electrode
manufacturing apparatus
atmospheric pressure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP1734792A
Other languages
Japanese (ja)
Inventor
Hiroyuki Sugiuchi
博之 杉内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP1734792A priority Critical patent/JPH05217900A/en
Publication of JPH05217900A publication Critical patent/JPH05217900A/en
Withdrawn legal-status Critical Current

Links

Abstract

PURPOSE:To protect a semiconductor substrate from contamination caused by dust rising when the vacuum chamber is subjected to ambient pressure after the treatment process is finished. CONSTITUTION:An inside wall is grounded with an earth part 8 in a vacuum chamber 7 to be opened to ambient pressure, and an electrode other than one used for processing a semiconductor substrate is provided to apply a positive or negative voltage thereto. Then, an electric field is generated so that a dusty contamination can be attracted to the wall or to the electrode in the chamber.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体基板を大気圧中よ
り半導体製造装置内に搬入し、真空中で基板処理を行う
半導体製造装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing apparatus in which a semiconductor substrate is loaded into the semiconductor manufacturing apparatus from atmospheric pressure and the substrate is processed in vacuum.

【0002】[0002]

【従来の技術】従来の半導体製造装置は、真空室中で加
工した半導体基板を搬出する際には、気体を真空室内に
供給して室内を真空から大気圧に戻し、半導体基板を搬
出していた。また、半導体基板を加工する際は、搬入
後、室内を大気圧から真空にし、基板処理を行ってい
た。
2. Description of the Related Art In a conventional semiconductor manufacturing apparatus, when a semiconductor substrate processed in a vacuum chamber is carried out, gas is supplied into the vacuum chamber to return the inside of the chamber from atmospheric pressure to atmospheric pressure and carry out the semiconductor substrate. It was In addition, when processing a semiconductor substrate, the chamber is evacuated from atmospheric pressure to carry out the substrate processing after carrying in.

【0003】[0003]

【発明が解決しようとする課題】前述した従来の装置で
は、真空室内を真空より大気圧に戻す際、または半導体
基板搬入後、真空にする際、真空室内下部に降下し付着
していた塵埃が舞い上がり、半導体基板に付着するとい
う欠点がある。
In the above-mentioned conventional apparatus, when returning the inside of the vacuum chamber from the vacuum to the atmospheric pressure, or when bringing the semiconductor substrate into a vacuum state, dust adhering to the lower part of the vacuum chamber and adhering It has the drawback of rising and adhering to the semiconductor substrate.

【0004】本発明の目的は、半導体基板が塵埃により
汚染されるのを防止する半導体製造装置を提供すること
にある。
An object of the present invention is to provide a semiconductor manufacturing apparatus which prevents a semiconductor substrate from being contaminated with dust.

【0005】[0005]

【課題を解決するための手段】本発明は内部を大気圧に
開放した状態で半導体基板を搬出入する真空室を有する
半導体製造装置において、真空室壁をアースし、真空室
内に半導体基板処理用とは別の正または負に印加できる
電極を有することを特徴とする半導体製造装置である。
SUMMARY OF THE INVENTION The present invention is a semiconductor manufacturing apparatus having a vacuum chamber for loading and unloading a semiconductor substrate with the inside opened to atmospheric pressure. The vacuum chamber wall is grounded to process the semiconductor substrate. The semiconductor manufacturing apparatus is characterized by having an electrode that can be applied to the positive or negative side different from the above.

【0006】[0006]

【実施例】次に本発明について図面を参照して説明す
る。図1は本発明の一実施例の断面図である。真空室7
内には、半導体基板1をカセット2内に収納して搬出,
搬入するための搬送部6を有し、また、真空室壁には、
真空室内を真空から大気圧に戻すための気体供給口3、
および室内を排気し真空にする気体排気口4を有する。
The present invention will be described below with reference to the drawings. FIG. 1 is a sectional view of an embodiment of the present invention. Vacuum chamber 7
Inside, the semiconductor substrate 1 is stored in the cassette 2 and carried out.
It has a carrying section 6 for carrying in, and the vacuum chamber wall is
A gas supply port 3 for returning the vacuum chamber from vacuum to atmospheric pressure,
And a gas exhaust port 4 for evacuating the interior of the chamber to create a vacuum.

【0007】さらに、真空室壁には、真空室壁をアース
するアース部8を取り付け、真空室内には、内壁と対向
させて電極9を設ける。電極9は室外の電源10に接続
されて正または負に印加できる。なお、この電極9は、
基板処理用の電極とは別に設けている。本実施例によれ
ば、電極9と室内壁との間に電界が発生するため、塵埃
を吸着することができる。
Further, a ground portion 8 for grounding the vacuum chamber wall is attached to the vacuum chamber wall, and an electrode 9 is provided in the vacuum chamber so as to face the inner wall. The electrode 9 is connected to an outdoor power source 10 and can be applied positively or negatively. The electrode 9 is
It is provided separately from the substrate processing electrode. According to this embodiment, since an electric field is generated between the electrode 9 and the indoor wall, dust can be adsorbed.

【0008】[0008]

【発明の効果】以上説明したように本実施例によれば、
真空室壁と電極との間に電界が出来る為、帯電している
塵埃は、その電界の影響により真空室壁又は電極に吸着
され、真空室を大気圧に戻す際、塵埃が舞い上がらず半
導体基板の塵埃による汚染を防止できる。
As described above, according to this embodiment,
Since an electric field is generated between the vacuum chamber wall and the electrode, the charged dust is adsorbed to the vacuum chamber wall or the electrode due to the influence of the electric field, and when returning the vacuum chamber to atmospheric pressure, the dust does not rise and the semiconductor substrate It is possible to prevent contamination due to dust.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例を示す半導体製造装置の断面
図である。
FIG. 1 is a sectional view of a semiconductor manufacturing apparatus showing an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 半導体基板 2 カセット 3 気体供給口 4 気体排気口 5 搬送部 7 真空室 8 アース部 9 電極 10 電源 1 Semiconductor Substrate 2 Cassette 3 Gas Supply Port 4 Gas Exhaust Port 5 Transfer Section 7 Vacuum Chamber 8 Earth Section 9 Electrode 10 Power Supply

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 内部を大気圧に開放した状態で半導体基
板を搬出入する真空室を有する半導体製造装置におい
て、真空室壁をアースし、真空室内に半導体基板処理用
とは別の正または負に印加できる電極を有することを特
徴とする半導体製造装置。
1. A semiconductor manufacturing apparatus having a vacuum chamber for loading and unloading a semiconductor substrate, the interior of which is opened to atmospheric pressure, wherein a vacuum chamber wall is grounded and a positive or negative electrode different from that for semiconductor substrate processing is provided in the vacuum chamber. A semiconductor manufacturing apparatus having an electrode that can be applied to the semiconductor device.
JP1734792A 1992-02-03 1992-02-03 Apparatus for manufacturing semiconductor device Withdrawn JPH05217900A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1734792A JPH05217900A (en) 1992-02-03 1992-02-03 Apparatus for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1734792A JPH05217900A (en) 1992-02-03 1992-02-03 Apparatus for manufacturing semiconductor device

Publications (1)

Publication Number Publication Date
JPH05217900A true JPH05217900A (en) 1993-08-27

Family

ID=11941519

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1734792A Withdrawn JPH05217900A (en) 1992-02-03 1992-02-03 Apparatus for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JPH05217900A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5614600A (en) * 1994-06-03 1997-03-25 Kashima Oil Co., Ltd. Fiber-reinforced resin plate and process for producing the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5614600A (en) * 1994-06-03 1997-03-25 Kashima Oil Co., Ltd. Fiber-reinforced resin plate and process for producing the same

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Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 19990518