JPH0521713A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To control operation and non-operation states of respective blocks by a single kind of power supply potential in an integrated circuit which is formed on a single semiconductor chip and divided into a plurality of blocks. CONSTITUTION:Power is directly supplied to a subsystem block 23a from supply terminals V1 to V8. Power is supplied to a main system block 22 from the supply terminals V1 to V8 via switching elements S11 to S17. Power is supplied to a subsystem block 23b from the supply terminals V1 to V8 via switching elements S21 to S24. The switching elements are turned ON/OFF according to a value of power supply potential. In addition controlling operation and non-operation states of respective blocks by the switching elements according to the value of power supply potential eliminates a need for an external means for controlling ON/OFF. It is possible to reduce a fluctuation in power supply potential supplied into a semiconductor integrated circuit device.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device, and more particularly to a power feeding means to each block obtained by dividing an integrated circuit in the semiconductor integrated circuit device.

[0002]

2. Description of the Related Art A conventional technique will be described with reference to FIG. FIG. 7 is a plan view of a conventional semiconductor integrated circuit device.
1 is a semiconductor chip, 4 is a power supply line to which a first power supply potential V _DD is supplied, 5 is a power supply line to which a second power supply potential V _SS is supplied, 6 is an internal power supply bus, and V31 to V34 are power supplies It is a terminal.

Power is supplied by a single power source. Therefore, the power supply potential V _DD is simultaneously supplied to the power supply terminals V31 and V33, and the power supply potential V _SS is simultaneously supplied to V32 and V34 to operate the semiconductor integrated circuit.

[0004]

The conventional semiconductor integrated circuit is configured as described above, and the technology for processing and miniaturizing the semiconductor integrated circuit has been advancing year by year, and the degree of chip integration is now increasing. The operating power supply of the integrated circuit itself also increases, and the power consumption of the entire system also increases. Further, in a system such as a battery driven personal computer, there is a problem that it is necessary to separate the main system integrated circuit and drive the subsystem integrated circuit as another chip.

The present invention has been made in order to solve the above-mentioned problems, and it is possible to reduce the power consumption, and a subsystem integrated circuit which is driven separately from the main system integrated circuit is provided in one chip. It is an object of the present invention to obtain a semiconductor integrated circuit device that can be incorporated into a semiconductor integrated circuit device.

[0006]

According to another aspect of the present invention, there is provided a semiconductor integrated circuit device having a plurality of blocks formed on a single semiconductor chip and dividing the integrated circuit, and a power supply potential is supplied to each block. And a switching element that connects one end to each of the blocks, connects the other end to the power supply line, and turns on and off according to the value of the power supply potential to control power supply to the block. It is equipped with.

According to another aspect of the semiconductor integrated circuit device of the present invention, an input terminal and a first terminal having one end connected to the input terminal are provided.
And a second voltage drop means having one end connected to the other end of the first voltage drop means and the other end connected to a reference potential, and the other end of the first voltage drop means. Second
Connect the control electrode to the connection point at one end of the voltage drop means of
It has a voltage detection circuit including a transistor having one electrode connected to one end of the first voltage drop means.

A semiconductor integrated circuit device according to a third aspect of the present invention includes a plurality of voltage detection circuits according to the second aspect, and the input terminals of the plurality of voltage detection circuits are commonly connected. , Further comprising current-voltage conversion means having respective input terminals connected to the other ends of the transistors constituting the voltage detection circuit, and a decoder connected to output terminals of the plurality of current-voltage conversion means. ing.

[0009]

In the semiconductor integrated circuit device according to the present invention, a plurality of blocks which are formed on a single semiconductor chip and divide the integrated circuit, and a power supply line for supplying a power supply potential to each block are provided. , A switching element having one end connected to each of the blocks and the other end connected to a power supply line, and the power supply to the block is controlled by turning on / off the switching element according to the value of the power supply potential. Therefore, each block independently determines the operating / non-operating state according to the value of the power supply potential supplied to the power supply line. Further, one kind of power supply potential is simultaneously supplied from the outside to the power supply line, and the power supply line is commonly used by all blocks.

Further, in the semiconductor integrated circuit device according to the invention of claim 2, the input terminal, the first voltage drop means having one end connected to the input terminal, and the other end of the first voltage drop means. A control electrode is connected to a second voltage drop means having one end connected to the reference potential and the other end connected to a reference potential, and a connection point between the other end of the first voltage drop means and one end of the second voltage drop means. The voltage detection circuit is provided with a transistor having one electrode connected to one end of the first voltage drop means, and the output of the voltage detection circuit differs depending on the power supply voltage, and there is a power supply voltage. You can see if it is above or below the value.

Further, in the semiconductor integrated circuit device according to the invention of claim 3, a plurality of voltage detection circuits according to claim 2 are provided, and respective input terminals of the plurality of voltage detection circuits are commonly connected. Since it further includes a current-voltage conversion unit having its input end connected to the other end of each of the transistors forming the voltage detection circuit, and a decoder connected to the output ends of the plurality of current-voltage conversion units, It outputs digital data having the number of bits corresponding to the number of voltage detection circuits with one power supply potential.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the first invention will be described below with reference to FIGS.

FIG. 1 is a plan view of a semiconductor integrated circuit device which is the background of the present invention. In the figure, 1 is a semiconductor chip,
Reference numeral 2 is a main system block, 3a and 3b are subsystem blocks, 4a to 4c are power feeding lines to which a first potential is fed, 5a to 5c are power feeding lines to which a second potential is fed, and 7a to 7j are Input / output terminals, 8a to 8h are buffers,
V1 and V8 are supply terminals to which the power supply potential is supplied. The subsystem blocks 3a and 3b are blocks having functions such as a calendar and a clock. It is highly necessary for laptop personal computers and the like to keep functions such as a calendar and a clock even when the system is stopped. The main system block 2 and the subsystem blocks 3a and 3b formed on the semiconductor chip 1 operate by being supplied with power from the supply terminals V1 to V8.

FIG. 2 is a diagram schematically showing a power supply system of the semiconductor integrated circuit device shown in FIG. 22, 23a, 2
Reference numeral 3b denotes a divided block of the semiconductor integrated circuit and a power supply line arranged around the block. From a power supply pin individually provided to the power supply terminal V1, the group of power supply terminals V2 to V7, and the power supply terminal V8. Power is supplied. The power supply terminals V2 to V7 are connected to the power supply lines arranged around the main system block 22.
Is fed from the feeding terminals V2 to V7, and the feeding line arranged around the subsystem block 23a has a feeding terminal V1.
Are connected, and the subsystem block 23a is connected to the power supply terminal V1.
More power is supplied, and the power supply terminal V8 is connected to the power supply line arranged around the subsystem block 23b, and the subsystem block 23b is supplied with power from the power supply terminal V8. Then, each block of the semiconductor integrated circuit is configured to be able to operate independently.

Next, the operation will be described. Power supply terminal V1
When all the power supply terminals from V to V8 are supplied with power, all the blocks of the semiconductor integrated circuit become operable,
This is the normal operating state of the semiconductor integrated circuit. on the other hand,
For example, when power supply to the power supply terminals V2 to V7 is stopped and power is supplied to the power supply terminals V1 and V8, the subsystem blocks 23a and 23b are in the operating state and the main system block 22 is in the non-operating state. At this time, signals between the subsystem blocks 23a and 23b in the operating state and the main system block 22 in the non-operating state are logic pinned (pull-up or pull-down) interface pins in the buffers 8a, 8b, 8e to 8f. It is fixed by. Further, by stopping power supply to the power supply terminals V1 and V8 and supplying power to the power supply terminals V2 to V7, the subsystem blocks 23a and 23b can be deactivated and the main system block 22 can be activated. . In this way, only necessary blocks can be operated, and power consumption can be reduced.

However, since the main system block 22 and the subsystem blocks 23a and 23b are supplied with power from the power supply pins individually provided, the power supply points are biased and the potentials in the integrated circuit are varied. For example, in the subsystem block 23a, power is supplied from the power supply terminal V1 arranged around the semiconductor chip 1, and the closer to the center of the semiconductor chip 1, the farther from the power supply point, the lower the power supply potential becomes. In addition, the operation of the main system block 22 and the subsystem blocks 23a and 23b
In the non-operating state, the supply of the power supply potential to the power supply pin provided individually is controlled by turning on / off externally. For example, by stopping the supply of power to the power supply pin that supplies power to the power supply terminal V1 externally, the subsystem block 23a becomes inactive. As described above, there has been a trouble that an external means for on / off controlling the supply of the power supply potential to the power supply pin must be provided.

Next, an embodiment of the first invention which solves the above-mentioned weak points of the semiconductor integrated circuit device described with reference to FIGS. 1 and 2 will be described with reference to FIGS. 3 and 4. FIG. 3 is a diagram showing a switching element. FIG. 4 is a diagram schematically showing a power supply system of a semiconductor integrated circuit device using the switching element shown in FIG. In FIGS. 3 and 4, 1 is a semiconductor chip, 22 is a main system block and a power supply line arranged around the main system block, 23a,
23b is a subsystem block and a feeder line arranged around the subsystem block, V1 to V8 are feeder terminals, V
_DD is the power supply potential, GND is the ground potential (0V), T1, T2
The P-type MOS transistor, R1, R2 are resistors, N1 is a node indicating a connection point of the _{circuit, V DD 0, V DD 1} , V DD 2 is output, S11 to S17, is S21~S24 a switching element.

In FIG. 4, the main system block 22 and the subsystem blocks 23a and 23b formed on the semiconductor chip 1 are supplied to the power supply potential V1 from the power supply terminals V1 to V8.
_DD is supplied, and the power supply potential V _DD is further supplied to the main system block 22 via the switching elements S11 to S17. To subsystem block 23b,
Further, the power supply potential V _DD is supplied via the switching elements S21 to S24.

In the switching element shown in FIG. 3, one end of the resistor R1 is connected to the power supply potential V _DD , and the other end is connected to one end of the resistor R2 at the node N1. The other end of the resistor R2 is connected to the ground potential GND. The source of the P-type MOS transistor T1 is connected to the power supply potential V _DD , the gate is connected to the node N1, the back gate potential is fixed to the power supply potential V _DD , and the drain is connected to the output terminal V _DD 1. P
The source of the MOS transistor T2 is connected to the power supply potential V _DD , the gate is connected to the node N1, the back gate potential is fixed to the power supply potential V _DD , and the drain is the output terminal V _DD 2
Connected to. By manipulating the parameters such as the gate length and the gate width of the MOS transistor, for example, a P-type MO
The gate-source voltage of the S transistor T1 is 0.75
The threshold voltage is set to turn on / off the channel with V, and the P-type MOS transistor T2 sets the threshold voltage to turn on / off the channel with a gate-source voltage of 1.0V. Resistance R
1 is set to 100 KΩ and R2 is set to 300 KΩ.

First, assuming that the potential difference between the power supply potential V _DD and the ground potential GND is 5 V, the P-type MOS transistors T1 and T
The gate-source voltage of 2 becomes 1.25V, and the P-type M
The OS transistors T1 and T2 are turned on. Therefore, the power supply potential V _DD is output to the output terminals V _DD 1 and V _DD 2.

Next, assuming that the potential difference between the power supply potential V _DD and the ground potential GND is 4 V, the P-type MOS transistors T1 and T
The gate-source voltage of 2 becomes 1.0V, and P-type MO
The S transistor T1 is turned on, but the P-type MOS transistor T2 is turned off. Therefore, the output terminal V
The _DD 1 outputs the power supply potential V _DD, but V _DD 2 not output the power supply potential V _DD.

Further, assuming that the potential difference between the power supply potential _VDD and the ground potential GND is 3V, the P-type MOS transistors T1, T
The gate-source voltage of 2 is 0.75V, and P-type M
The OS transistors T1 and T2 are turned off. Therefore, the power supply potential V _DD is not output to the output terminals V _DD 1 and V _DD 2.

[0023] Then, using a P-type MOS transistor T1 to the switching devices S21~S24 semiconductor integrated circuit device shown in FIG. 4, when a P-type MOS transistor T2 to the switching devices S11 to S17, and the power supply potential V _DD When the potential difference of the ground potential GND is 5V, the P-type MOS transistors T1 and T2 are turned on. Therefore, the main system block 22 and the subsystem block 23
Power supply potential V _DD is supplied to a and 23b, and each block is in an operating state. Note that the transistors in the integrated circuit can operate normally when the power supply potential is 5V to 3V. Next, when the potential difference between the power supply potential V _DD and the ground potential GND is 4 V, the P-type MOS transistor T1 is turned on,
The P-type MOS transistor T2 is turned off. Therefore, the power supply potential V _DD is supplied to the subsystem blocks 23a and 23b, and the subsystem blocks 23a and 23b.
Is in operation. The power supply potential V _DD is not supplied to the main system block 22 and the main system block 22
Is inactive. Next, the power supply potential V _DD and the ground potential G
When the potential difference of ND is 3 V, the P-type MOS transistors T1 and T2 are turned off. Therefore, the power supply potential V _DD is not supplied to the main system block 22 and the subsystem blocks 23a and 23b, and each block is in a non-operating state.

As described above, the value of one kind of power supply potential V _DD supplied from the outside is changed without controlling the operating state of each block divided inside the integrated circuit externally. The operating state of each block can be controlled by turning on / off the switching element connected to the power supply line. In addition, since the power supply potential of each block is common to one type of power supply potential V _DD , power is supplied to each block from all the power supply terminals V1 to V8 arranged around the integrated circuit, and the power is supplied from the periphery of the integrated circuit. To prevent variations in the power supply potential V _DD in the integrated circuit by providing a power supply line inside the circuit and appropriately increasing the number of switching elements connected to the power supply line to increase the number of power supply points to each block. You can

Next, one embodiment of the second invention is shown in FIG.
Will be explained. In FIG. 5, IN1 is an input terminal. R3 is a first terminal in which one terminal is connected to the input terminal IN1.
It is a resistor that is a voltage drop means. R4 has one terminal connected to the other terminal of the resistor R3 which is the first voltage drop means,
Second with the other end connected to the ground potential GND, which is the reference potential
It is a resistor that is a voltage drop means. T3 is a first voltage drop unit that connects a gate that is a control electrode to a connection point between the other end of the resistor R3 that is the first voltage drop unit and one end of the resistor R4 that is the second voltage drop unit. This is a P-type MOS transistor in which the source which is one electrode is connected to one end of the resistor R3. R5 is a resistor, AMP is an amplifier circuit, one end of the resistor R5 is grounded, the other end of the resistor R5 is a P-type M
The drain, which is the other electrode of the OS transistor T3, is connected to the input terminal of the amplifier circuit AMP, and the resistor R5 and the amplifier circuit AM are connected.
P constitutes a current-voltage conversion circuit that outputs a high level or a low level depending on whether the P-type MOS transistor T3 is on or off. OUT1 is an output terminal connected to the output of the current-voltage conversion circuit.

In this way, the input terminal IN1, the resistor R3,
The R4 and the P-type MOS transistor T3 form a voltage detection circuit. If the voltage across the resistor R3, which is determined by the potential difference between the potential input to the input terminal IN1 and the ground potential GND, is higher than the threshold voltage of the P-type MOS transistor T3, the P-type MOS transistor T3 is turned on and the amplifier circuit AMP is turned on. Becomes an input potential, and if the voltage across the resistor R3 determined by the potential difference between the potential input to the input terminal IN1 and the ground potential GND is smaller than the threshold voltage of the P-type MOS transistor T3, the P-type MOS transistor T3 Turns off and the input of the amplifier circuit AMP becomes the ground potential. The input is amplified and shaped by the amplifier circuit AMP and output from the output terminal OUT1.

The voltage level of the power supply can be sensed by connecting the input terminal IN1 of this voltage detection circuit to the supply line of the power supply. Further, the configuration of this voltage detection circuit is the same as that of the switching element of FIG. 3, and it can be used as the switching element of FIG.

Although a resistor is used as the voltage drop means in the above embodiment, the voltage drop means is not limited to a resistor and may be another means, and the same effect as that of the above embodiment can be obtained.

Although the P-type MOS transistor is used in the above embodiment, the transistor used is not limited to the P-type MOS transistor and may be another transistor.
The same effect as that of the above embodiment is obtained.

Further, in the above embodiment, the case of detecting the power supply voltage of the power supply line has been described, but the voltage to be detected may be the voltage of another portion, and the voltage can be sensed as in the above embodiment.

Next, another embodiment of the second invention will be described with reference to FIG. FIG. 6 is a block diagram of an analog-digital conversion circuit in which the voltage detection circuit shown in FIG. 5 is arranged in a ladder. In the figure, IN2 is an input terminal, SS1.
SS3 is the circuit shown in FIG. 3, and is composed of a plurality of voltage detection circuits each having an input terminal connected to the input terminal IN2 and a current-voltage conversion circuit connected to each of the voltage detection circuits, each of which senses a different voltage level. Reference numeral 10 is a decoder in which the input terminals are connected to the output terminals of the circuits SS1 to SS3 composed of a plurality of detection circuits and current-voltage conversion circuits, and OUT2 is an output terminal connected to the output terminal of the decoder 10. For example, this analog-to-digital conversion circuit has a resolution of 3 bits with respect to a voltage value, and an output digital signal is 3-bit data.

The input terminal IN2 is connected to the power supply line to detect the power supply potential V _DD , and the 3 based on the obtained 3-bit data.
When the switching elements of the integrated circuit divided into one block are turned on / off, for example, in FIG. 4, if the output data is 101 in binary, the main system block 22 is in the operating state and the subsystem block 23 is
If a is a non-operating state, subsystem block 23b is an operating state, and the output data is 001 in binary,
Control such that the main system block 22 is in the non-operating state, the subsystem block 23a is in the non-operating state, and the subsystem block 23b is in the operating state can be performed, and the operating / non-operating states of the respective blocks can be freely combined.

By connecting the input terminal IN2 of this analog-digital conversion circuit to the power supply line, the voltage level of the power supply can be sensed with high resolution. Also,
The main part of the voltage detection circuit used in this analog-digital conversion circuit except for the current-voltage conversion circuit is the same as the switching element of FIG. 3 and can be shared with the switching element of FIG.

In the above embodiment, the voltage detection circuits are arranged in three ladders, but the number of ladders arranged may be increased or decreased as necessary.

[0035]

As described above, according to the semiconductor integrated circuit device of the present invention, the plurality of blocks obtained by dividing the integrated circuit formed on a single semiconductor chip and the value of the power supply potential are used. It is configured to include a switching element that controls power supply to the block by turning it on and off, so that each block operates or does not operate independently depending on the value of the power supply potential supplied to the power supply line. The effect that the integrated circuit having different functions can be incorporated in one chip as a block that operates / does not operate independently can be determined. In addition, since each block can independently determine the operating / non-operating state according to the value of the power supply potential supplied to the power supply line, it is not necessary to control the power supply potential supply on / off externally. effective. Then, one kind of power supply potential supplied from the outside is simultaneously supplied to the power supply pad arranged around the integrated circuit, and all the blocks commonly use the power supply line connected to the power supply pad. By appropriately arranging the switching elements connected to the electric wires, there is an effect that variations in power supply potential within the semiconductor integrated circuit are reduced.

According to another aspect of the semiconductor integrated circuit device of the present invention, the input terminal, the first voltage drop means having one end connected to the input terminal, and the other end of the first voltage drop means. A second voltage drop means having one end connected to the reference potential and the other end connected to a reference potential, and a control electrode at a connection point between the other end of the first voltage drop means and one end of the second voltage drop means. And a voltage detection circuit having a transistor having one electrode connected to one end of the first voltage drop means, the output of the voltage detection circuit differs depending on the power supply voltage, and the power supply voltage is It is possible to know whether it is above or below a certain value, and the power supply voltage can be sensed. Further, there is an effect that the voltage detection circuit can be used as the switching element according to the first aspect.

Further, in the semiconductor integrated circuit device according to the invention of claim 3, an input terminal, a plurality of the voltage detecting circuits having input terminals connected to the input terminals, and input terminals at output terminals of the plurality of detecting circuits. Since it is configured to have a decoder connected to the output terminal and an output terminal connected to the output terminal of the decoder, it is possible to output digital data having a bit number corresponding to the number of voltage detection circuits with one power supply potential, and The power supply voltage can be sensed with resolution. Further, by controlling the switching element in the invention described in claim 1 by the output data, there is an effect that the operating / non-operating state of each block can be freely manipulated.

[Brief description of drawings]

FIG. 1 is a plan view of a semiconductor integrated circuit device which is a background of the first invention.

FIG. 2 is a diagram schematically showing the semiconductor integrated circuit device shown in FIG.

FIG. 3 is a diagram showing a switching element used in an embodiment of the first invention.

FIG. 4 is a plan view of a semiconductor integrated circuit device which is an embodiment of the first invention.

FIG. 5 is a circuit diagram of a voltage detection circuit used in a semiconductor integrated circuit device according to an embodiment of the second invention.

FIG. 6 is a circuit diagram of a voltage detection circuit used in a semiconductor integrated circuit device according to another embodiment of the second invention.

FIG. 7 is a plan view of a conventional semiconductor integrated circuit device.

[Explanation of symbols]

1 semiconductor chip 22 Main system block 23a, 23b subsystem block V1 to V8 power supply terminals S11-S17, S21-S24 switching elements

[Procedure amendment]

[Submission date] November 14, 1991

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0028

[Correction method] Change

[Correction content]

Although a resistor is used as the voltage drop means in the above embodiment, the voltage drop means is not limited to a resistor and may be another means.
It may be present , and the same effect as that of the above embodiment is obtained.

Claims (3)

[Claims] 1. A semiconductor integrated circuit device formed on a single semiconductor chip, comprising: a plurality of blocks into which an integrated circuit is divided; a power supply line for supplying a power supply potential to each of the blocks; and one end of each of the blocks. A semiconductor integrated circuit device having a switching element for controlling power supply to the block by connecting to the power supply line and the other end thereof to the power supply line and turning on and off according to the value of the power supply potential. 2. An input terminal, a first voltage drop means having one end connected to the input terminal, one end connected to the other end of the first voltage drop means, and the other end connected to a reference potential. The second voltage drop means, and the control electrode is connected to a connection point between the other end of the first voltage drop means and one end of the second voltage drop means, and the control electrode is connected to one end of the first voltage drop means. A semiconductor integrated circuit device having a voltage detection circuit including a transistor having one electrode connected thereto. 3. A plurality of the voltage detection circuits are provided, the input terminals of the plurality of the voltage detection circuits are commonly connected, and each of the transistors forming the voltage detection circuit is connected to the other end of the transistor. The semiconductor integrated circuit device according to claim 2, further comprising: a current-voltage conversion unit having an input terminal connected thereto; and a decoder connected to an output terminal of the plurality of current-voltage conversion units.