JPH05213693A - Formation of crystalline layer of compound semiconductor - Google Patents

Formation of crystalline layer of compound semiconductor

Info

Publication number
JPH05213693A
JPH05213693A JP1878792A JP1878792A JPH05213693A JP H05213693 A JPH05213693 A JP H05213693A JP 1878792 A JP1878792 A JP 1878792A JP 1878792 A JP1878792 A JP 1878792A JP H05213693 A JPH05213693 A JP H05213693A
Authority
JP
Japan
Prior art keywords
compound semiconductor
substrate
silicon substrate
porous
grown
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1878792A
Other languages
Japanese (ja)
Inventor
Hiroya Kimura
浩也 木村
Mitsuru Shimazu
充 嶋津
Kouichi Koukado
浩一 香門
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP1878792A priority Critical patent/JPH05213693A/en
Publication of JPH05213693A publication Critical patent/JPH05213693A/en
Pending legal-status Critical Current

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  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

PURPOSE:To form a crystalline layer of a compd. semiconductor nearly free from dislocation and residual stress on a porous silicon substrate. CONSTITUTION:When the surface of a silicon substrate is made porous and compd. semiconductor crystals are grown on the substrate to form a crystalline layer of the compd. semiconductor, the substrate is heated at a relatively low temp. of <=500 deg.C in a vacuum of <=10<-1>Torr before introducing gaseous starting materials for the crystal growth and carrier gas.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、多孔質シリコン基板上
に化合物半導体の結晶層を形成する方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a crystal layer of a compound semiconductor on a porous silicon substrate.

【0002】[0002]

【従来の技術】GaAs等の化合物半導体をシリコン基
板上に成長させる試みは、低コスト化、ハイブリッド化
等の観点から、多数行われてきた。しかし、化合物半導
体とシリコンの間には物性上の差異(格子不整合、熱膨
張係数の差、無極性物質上に有極性物質を成長する問題
等)があるため、通常の成長方法とは異なる手法が必要
となる。例えば、2段階成長、熱サイクルアニール、歪
超格子等の方法が用いられ、シリコン基板上に異種材料
である化合物半導体の単結晶薄膜の成長を行ってきた。
2. Description of the Related Art Many attempts have been made to grow a compound semiconductor such as GaAs on a silicon substrate from the viewpoint of cost reduction and hybridization. However, due to the difference in physical properties between the compound semiconductor and silicon (lattice mismatch, difference in thermal expansion coefficient, problem of growing polar substance on non-polar substance, etc.), it is different from normal growth method. A method is needed. For example, methods such as two-step growth, thermal cycle annealing, and strained superlattice have been used to grow a single crystal thin film of a compound semiconductor, which is a different material, on a silicon substrate.

【0003】[0003]

【発明が解決しようとする課題】しかし、上記のシリコ
ン基板を用いる方法は、化合物半導体単結晶基板上に成
長させる場合と比較して成長薄膜の結晶性が劣るという
問題があった。即ち、上記の物性上の差異により発生す
る転位、残留応力、反り等の問題が完全に解決されず、
転位密度を例にすると、LEC法で得たGaAs基板の
転位密度が104cm-2程度であるのに対し、シリコン
基板上に成長したGaAs結晶薄膜は10 6 cm-2とか
なり高い値を示している。そこで、本発明は、上記の欠
点を解消し、シリコン基板上に転位や残留応力の少ない
化合物半導体の結晶層を形成する方法を提供しようとす
るものである。
However, the above-mentioned silico
The method using a silicon substrate is a method of forming a compound semiconductor on a single crystal substrate.
It is said that the crystallinity of the grown thin film is inferior to the case of lengthening
There was a problem. That is, it is caused by the difference in the above physical properties.
Problems such as dislocation, residual stress, warpage, etc. are not completely solved,
Taking the dislocation density as an example, the GaAs substrate obtained by the LEC method
Dislocation density is 10Fourcm-2Whereas the degree is silicon
The GaAs crystal thin film grown on the substrate is 10 6cm-2And
It shows a fairly high value. Therefore, the present invention is
The points are eliminated, and there are few dislocations and residual stresses on the silicon substrate.
An attempt to provide a method for forming a crystalline layer of a compound semiconductor
It is something.

【0004】[0004]

【課題を解決するための手段】本発明は、シリコン基板
の表面を多孔質化する多孔質化工程と、化合物半導体結
晶の成長工程とを有する化合物半導体の結晶層を形成す
る方法において、化合物半導体結晶の成長工程で原料ガ
スやキャリアガスを導入する前に、10-1Torr以下
の真空中で500℃以下の比較的低温で加熱することを
特徴とする化合物半導体の結晶層の形成方法である。な
お、シリコン基板表面の多孔質化方法としては、フッ酸
溶液中での陽極化成法により多孔質化する方法が好まし
い。多孔質化層の厚みは、特に限定されるものではない
が、例えば、0.数μmから数百μmの厚みで形成する
ことができる。また、多孔質の孔径は、例えば20〜3
00Å程度の大きさとなる。
The present invention provides a method for forming a crystal layer of a compound semiconductor, which comprises a porosification step for making the surface of a silicon substrate porous and a compound semiconductor crystal growth step. A method for forming a crystal layer of a compound semiconductor, which comprises heating in a vacuum of 10 -1 Torr or less at a relatively low temperature of 500 ° C. or less before introducing a source gas or a carrier gas in a crystal growth step. . As a method of making the surface of the silicon substrate porous, a method of making it porous by an anodization method in a hydrofluoric acid solution is preferable. The thickness of the porous layer is not particularly limited, but may be, for example, 0. It can be formed with a thickness of several μm to several hundred μm. The pore size of the porous material is, for example, 20 to 3
The size is about 00Å.

【0005】シリコン基板上に成長させる化合物半導体
としては、例えば、GaAs、GaP、InP等の2元
系のIII-V族化合物半導体や、AlGaAs、AlGa
P、InAlAs、InAlP、GaAsP、GaIn
P等の3元系のIII-V族化合物半導体、さらには、Zn
S、ZnSe等のII-VI 族化合物半導体などから選択さ
れる。また、これらの化合物半導体を積層することもで
きる。
As a compound semiconductor grown on a silicon substrate, for example, a binary III-V group compound semiconductor such as GaAs, GaP, InP, or AlGaAs or AlGa.
P, InAlAs, InAlP, GaAsP, GaIn
Ternary III-V group compound semiconductors such as P, and Zn
It is selected from II-VI group compound semiconductors such as S and ZnSe. Further, these compound semiconductors can be stacked.

【0006】[0006]

【作用】多孔質化されたシリコン基板の上に化合物半導
体を成長させると、格子不整合による歪を緩和しながら
成長させることができるので、ミスフィット転位の導入
を防止できる。さらに、多孔質化されたシリコンは、通
常のシリコンに比べ、ヤング率が約10分の1というよ
うに柔軟性に富み、かつ、薄膜と基板の間の接触面積を
減少させることができる。そのため、III−V族化合物
半導体とシリコンのように熱膨張係数が大きく異なる組
み合わせであっても、2つの物質間の歪を多孔質の部分
で吸収することができ、化合物半導体層の転位や残留応
力を大幅に低減させることができる。
When the compound semiconductor is grown on the porous silicon substrate, the strain due to the lattice mismatch can be relaxed and grown, so that the introduction of misfit dislocations can be prevented. Further, the porous silicon has flexibility that Young's modulus is about 1/10 of that of ordinary silicon, and the contact area between the thin film and the substrate can be reduced. Therefore, even in a combination such as a III-V group compound semiconductor and silicon, which have greatly different thermal expansion coefficients, the strain between the two substances can be absorbed by the porous portion, and the dislocation or residual of the compound semiconductor layer can be absorbed. The stress can be significantly reduced.

【0007】従来は、シリコン基板をフッ酸溶液中で陽
極化成法で多孔質化した後、窒素ブローによる乾燥を行
い、成長炉に投入して化合物半導体単結晶の成長を開始
していた。この方法では、成長した化合物半導体薄膜の
結晶性が悪く、かつ良好な再現性が得られなかった。本
発明者等がその原因を調べたところ、多孔質化した部分
の孔径が20〜300Åと非常に小さいため、多孔質化
工程で孔の中に入り込んだ水やフッ酸を窒素ブロー乾燥
で十分に除去することができず、化合物半導体の成長工
程で基板表面に浸出して付着するため、結晶性が悪化す
ることを見いだした。
Conventionally, a silicon substrate was made porous in a hydrofluoric acid solution by an anodization method, dried by nitrogen blowing, and put into a growth furnace to start the growth of a compound semiconductor single crystal. According to this method, the crystallinity of the grown compound semiconductor thin film was poor, and good reproducibility could not be obtained. The present inventors investigated the cause and found that the pore diameter of the porous portion is as small as 20 to 300 Å, so that water or hydrofluoric acid that has entered the pores during the porosification step is sufficiently dried by nitrogen blow drying. It was found that the crystallinity deteriorates because it cannot be removed and is leached and adhered to the substrate surface in the compound semiconductor growth step.

【0008】また、結晶成長前に水素及びアルシン中で
シリコン基板を800〜1000℃で加熱することによ
り、孔内ではなく、シリコン台地部の表面を清浄化し、
かつ、原子再配列化して、成長した化合物半導体結晶の
特性を向上させるサーマルクリーニング法が提案されて
いるが、加熱温度が高いために十分な結晶性を得ること
ができず、再現性もよくなかった。
By heating the silicon substrate at 800 to 1000 ° C. in hydrogen and arsine before crystal growth, the surface of the silicon plateau is cleaned not in the holes,
Moreover, a thermal cleaning method has been proposed in which the properties of the grown compound semiconductor crystal are improved by rearrangement of atoms, but sufficient crystallinity cannot be obtained due to high heating temperature, and reproducibility is also poor. It was

【0009】そこで、本発明では、多孔質化されたシリ
コン基板を用いて化合物半導体を成長させる際に、原料
ガスや水素等のキャリアガスを導入する前に、10-1
orr以下の真空中で500℃以下の比較的低温で加熱
することにより、多孔質化工程で孔の中に入り込んだ水
やフッ酸を十分に除去することができ、その後に成長さ
せる化合物半導体の薄膜は結晶性が向上し、かつ、良好
な再現性を得ることができた。なお、多孔質シリコンは
熱に対して弱く、構造が変化し易く、500℃を越える
高温にすると、結晶性が低下するので、本発明では、5
00℃以下の比較的低温で加熱することとした。
Therefore, in the present invention, when a compound semiconductor is grown using a porous silicon substrate, 10 -1 T is introduced before introducing a source gas or a carrier gas such as hydrogen.
By heating at a relatively low temperature of 500 ° C. or lower in a vacuum of or or lower, it is possible to sufficiently remove water and hydrofluoric acid that have entered the pores in the porosification step, and to grow the compound semiconductor to be grown thereafter. The thin film had improved crystallinity and good reproducibility. Since porous silicon is vulnerable to heat and its structure is apt to change, and its crystallinity deteriorates at a high temperature of more than 500 ° C.
It was decided to heat at a relatively low temperature of 00 ° C. or less.

【0010】[0010]

【実施例】 (実施例)シリコン基板表面をフッ酸用液中で陽極化成
処理を施して多孔質化した基板に、第1図の成長プロフ
ァイルにしたがってGaAs薄膜を成長させた。まず、
多孔質化した基板を成長炉にセットした後、炉内を約1
-6Torrの真空に排気した状態で昇温し、400℃
で安定させて30分間保持した。その後、水素及びをア
ルシンガスを炉内に導入して420℃に昇温し、この温
度に安定させてGaAs薄膜を150Åの厚さまで成長
させ、次いで、550℃に昇温し、この温度に安定させ
てGaAs薄膜を2.5μmの厚さまで成長させ、さら
に、650℃に昇温し、この温度に安定させてGaAs
薄膜を2.5μmの厚さまで成長させた。
Example An GaAs thin film was grown on a substrate whose surface was made porous by anodizing in a hydrofluoric acid solution according to the growth profile shown in FIG. First,
After setting the porous substrate in the growth furnace,
The temperature was raised to 400 ° C while exhausted to 0 -6 Torr vacuum.
Stabilized for 30 minutes and held. After that, hydrogen and arsine gas were introduced into the furnace and the temperature was raised to 420 ° C, and the temperature was stabilized to grow the GaAs thin film to a thickness of 150Å. Then, the temperature was raised to 550 ° C and stabilized to this temperature. GaAs thin film is grown to a thickness of 2.5 μm, and the temperature is raised to 650 ° C. and stabilized at this temperature.
The thin film was grown to a thickness of 2.5 μm.

【0011】(比較例)シリコン基板表面をフッ酸用液
中で陽極化成処理を施して多孔質化した基板に、第2図
の成長プロファイルにしたがってGaAs薄膜を成長さ
せた。まず、多孔質化した基板を成長炉にセットした
後、水素及びをアルシンガスを炉内に導入して420℃
に昇温し、この温度に安定させてGaAs薄膜を150
Åの厚さまで成長させ、次いで、550℃に昇温し、こ
の温度に安定させてGaAs薄膜を2.5μmの厚さま
で成長させ、さらに、650℃に昇温し、この温度に安
定させてGaAs薄膜を2.5μmの厚さまで成長させ
た。
Comparative Example A GaAs thin film was grown on a substrate whose surface was made porous by anodizing the surface of a silicon substrate in a hydrofluoric acid solution according to the growth profile shown in FIG. First, after setting the porous substrate in the growth furnace, hydrogen and arsine gas were introduced into the furnace and the temperature was changed to 420 ° C.
The temperature of the GaAs thin film is raised to 150 ° C and stabilized at this temperature.
It is grown to a thickness of Å, then heated to 550 ° C, stabilized to this temperature to grow a GaAs thin film to a thickness of 2.5 μm, further heated to 650 ° C, stabilized to this temperature and made to GaAs. The thin film was grown to a thickness of 2.5 μm.

【0012】(比較評価)成長したGaAs薄膜を2結
晶X線回折法でGaAs薄膜に起因するピークの半値幅
を比較したところ、比較例で得たGaAs薄膜は、半値
幅が250秒と大きな値を示すのに対して、実施例の半
値幅はで得たGaAs薄膜は、半値幅が160秒と大幅
に小さな値を示し、結晶性が改善されたことが分かる。
(Comparison evaluation) When the grown GaAs thin films were compared with each other by the half-value width of the peak due to the GaAs thin films by the two-crystal X-ray diffraction method, the GaAs thin film obtained in the comparative example had a large half value width of 250 seconds. On the other hand, the GaAs thin film obtained with the half width of the example shows a significantly small half width of 160 seconds, which means that the crystallinity is improved.

【0013】[0013]

【発明の効果】本発明は、上記の構成を採用することに
より、多孔質シリコン基板上に半値幅の小さな、転位・
残留応力の少ない化合物半導体薄膜を成長させることが
できるようになった。
According to the present invention, by adopting the above-mentioned structure, dislocations having a small full width at half maximum can be formed on the porous silicon substrate.
It has become possible to grow a compound semiconductor thin film with little residual stress.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例で採用した成長温度プロファイ
ルを示した図である。
FIG. 1 is a diagram showing a growth temperature profile adopted in an example of the present invention.

【図2】比較例2で採用した成長温度プロファイルを示
した図である。
FIG. 2 is a diagram showing a growth temperature profile adopted in Comparative Example 2.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 シリコン基板の表面を多孔質化する多孔
質化工程と、化合物半導体結晶の成長工程とを有する化
合物半導体の結晶層を形成する方法において、化合物半
導体結晶の成長工程で原料ガスやキャリアガスを導入す
る前に、10 -1Torr以下の真空中で500℃以下の
比較的低温で加熱することを特徴とする化合物半導体の
結晶層の形成方法。
1. A porosity for making the surface of a silicon substrate porous.
Having a qualification step and a compound semiconductor crystal growth step
In a method for forming a crystalline layer of a compound semiconductor,
Introduce source gas and carrier gas in the conductor crystal growth process
10 before -1In vacuum below Torr, below 500 ° C
Of compound semiconductors characterized by heating at a relatively low temperature
Method for forming crystal layer.
JP1878792A 1992-02-04 1992-02-04 Formation of crystalline layer of compound semiconductor Pending JPH05213693A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1878792A JPH05213693A (en) 1992-02-04 1992-02-04 Formation of crystalline layer of compound semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1878792A JPH05213693A (en) 1992-02-04 1992-02-04 Formation of crystalline layer of compound semiconductor

Publications (1)

Publication Number Publication Date
JPH05213693A true JPH05213693A (en) 1993-08-24

Family

ID=11981326

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1878792A Pending JPH05213693A (en) 1992-02-04 1992-02-04 Formation of crystalline layer of compound semiconductor

Country Status (1)

Country Link
JP (1) JPH05213693A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10833175B2 (en) 2015-06-04 2020-11-10 International Business Machines Corporation Formation of dislocation-free SiGe finFET using porous silicon

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10833175B2 (en) 2015-06-04 2020-11-10 International Business Machines Corporation Formation of dislocation-free SiGe finFET using porous silicon

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