JPH05210090A - Signal input method - Google Patents

Abstract

PURPOSE:To speed up driving circuits by using single crystal semiconductors for transistors, using low-resistance metals or silicides for signal lines and inputting signals from plural points. CONSTITUTION:The clock signal lines in the peripheral driving circuits 5 to 8 are wired by the metals or silicides on an active matrix substrate contg. the peripheral driving circuits 5 to 8. The TRs in the peripheral driving circuits 5 to 8 are formed of the single crystal thin films and the signals are inputted from the plural points to the peripheral driving circuits 5 to 8. Namely, the respective display lines 3 of the active matrix substrate have the respectively plural driving circuits of the display line driving circuits 5, 6 and the scanning lines 4 have those circuits of the scanning line driving circuits 7, 8. The driving circuits 5 are inputted with clock signals from the plural points of clock signal input terminals 9, 9'. The other driving circuits 6 are similarly inputted with the clock signals from the plural points. The high-speed driving is enabled by using the plural driving circuits 5 to 8 in such a manner.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of inputting a signal to a peripheral drive circuit built in a substrate for active matrix driving a plurality of pixels arranged in a matrix such as a liquid crystal display device.

[0002]

2. Description of the Related Art In a liquid crystal display device for displaying images and the like, it is necessary to divide one screen into as many pixels as possible in order to increase the resolution and display finely. However, when the number of pixels becomes enormous and the number of corresponding scanning electrodes and display electrodes increases, there is a problem that normal time division driving becomes difficult. Therefore, a switching element is arranged for each pixel electrode. An active matrix system is used in which the pixel electrodes are turned on and off through the switching elements by matrix driving the switching elements.

The active matrix type is roughly classified into a three-terminal type and a two-terminal type depending on the type of switching element used. A three-terminal element, especially a TFT (thin film transistor) element is used in a drive circuit and is arranged in the periphery of a display portion. As a result, the display unit and the driving circuit can be integrated and built in at the same time on the same substrate, which is very useful in manufacturing or miniaturizing.

FIG. 5 shows a conventional active matrix substrate having a built-in drive circuit. In the figure, 1 is a pixel electrode, 2 is a transistor, 3 is a display line, 4 is a scanning line, 5 and 6 are display line driving circuits, 7 and 8 are scanning line driving circuits, and 9 and 10 are block signals of the display line driving circuit. Input terminals 11 and 12 are block signal input terminals of the scanning line drive circuit. Further, FIG. 2 shows a cross section of the p-Si (polycrystalline silicon) type TFT element incorporated in the display line driving circuit. 2 in the figure
Reference numeral 1 is a substrate (usually glass), 22 and 23 are sources or drains of transistors, and 25 between them is a channel portion which is made of polycrystalline silicon. Reference numeral 24 denotes a gate electrode, which is also made of polycrystalline silicon. 26-28
Is aluminum for wiring, and 27 and 28 are input lines for clock signals. Reference numeral 29 is a polycrystalline silicon film for wiring, which is usually formed at the same time as the gate electrode. Reference numeral 30 is a display line made of ITO (Indium Tin Oxide), and 31 to 40 are insulating layers.

[0005]

As described above, the image quality can be improved by increasing the number of pixels, but for that purpose, it is necessary to increase the scanning lines and the display lines and drive them at high speed. .. In addition, JP-A-60-1
Japanese Patent No. 66927 discloses a driving circuit in which the same ITO as the display line and the scanning line is used for the signal line to simplify the manufacturing process, and at the same time, the signal lines are input to the signal line to increase the speed. .. However, since ITO has high resistance and there is a limit to speeding up, and since conventional transistors use polycrystalline silicon with low mobility, even if signals are input from multiple locations, future speeding up is not possible. There was a limit.

[0006]

SUMMARY OF THE INVENTION The present invention solves the above problems and provides an input method capable of increasing the speed of a drive circuit and coping with high frequency drive.

That is, according to the present invention, in an active matrix substrate having a built-in peripheral drive circuit, clock signal lines in the peripheral drive circuit are wired by metal or silicide, and transistors in the peripheral drive circuit are formed of a single crystal thin film. ,
The signal input method is characterized in that signals are input to the drive circuit from a plurality of locations.

Further, according to the present invention, a plurality of driving circuits are provided for each of the scanning line and the display line, and signals can be input from a plurality of places to each driving circuit, whereby the speed can be further increased.

The material of the signal line used in the present invention is metal or silicide. Specifically, the metal is Al, Ti, Ta, Mo, Cu, W, and the silicide is TiSi ₂ , TaSi ₂ , WSi. ₂ , MoSi ₂ can be used.

Further, the structure of the transistor in the peripheral drive circuit used in the present invention is almost the same as that of the transistor used in the conventional peripheral drive circuit, but the semiconductor, that is, the active layer (source 22 shown in FIG. 2). , Drain 23, and channel 25) are formed of a single crystal thin film.

This single crystal thin film is manufactured using a porous substrate and is a high quality single crystal semiconductor with few defects. A method for forming this single crystal thin film will be described by taking a single crystal Si thin film as an example. The single crystal Si layer is formed by using a porous Si substrate obtained by making the single crystal Si substrate porous.

According to observation with a transmission electron microscope, holes having an average diameter of about 600 Å are formed in this porous Si substrate, and the density thereof is less than half that of single crystal Si. Nevertheless, its single crystallinity is maintained, and it is possible to epitaxially grow a single crystal Si layer on top of the porous layer. However, at 1000 ° C. or higher, rearrangement of internal holes occurs and the characteristics of enhanced etching are impaired. Therefore, for the epitaxial growth of the Si layer, the molecular beam epitaxial growth method, plasma CV
Low temperature growth such as D method, thermal CVD method, photo CVD method, bias sputtering method, liquid crystal growth method, etc. is suitable.

Here, a method of epitaxially growing a single crystal layer after making P-type Si porous will be described.

First, a Si single crystal substrate is prepared, and H
It is made porous by the anodization method using the F solution. The density of single crystal Si is 2.33 g / cm ³ , but the density of the porous Si substrate is changed to 0.6 to 1.1 g / cm ³ by changing the HF solution concentration to 20 to 50%. be able to. This porous layer is a P-type S for the following reasons.
It is easily formed on the i substrate.

Porous Si was prepared by Uhril et al.
It was discovered in the course of research on electropolishing of semiconductors in 6 years (A. Uhril, Bell System. Tech.
J. , Vol 35, p. 333 (1956)). Also, Unami et al. Studied the dissolution reaction of Si in anodization, and reported that the anodic reaction of Si in an HF solution requires holes, and the reaction is as follows (T Unagami: J. Electrochem. So
c. , Vol. 127, p. 476 (1980)).

Si + 2HF + (2-n) e ⁺ → SiF ₂ + 2H ⁺ + ne ^- SiF ₂ + 2HF → SiF ₄ + H ₂ SiF ₄ + 2HF → H ₂ SiF ₆ or Si + 4HF + (4-λ) e ⁺ → SiF ₄ + 4H ⁺ + λe ^- where _{SiF 4 + 2HF → H 2 SiF} 6, e + and, e ^- respectively represent a positive hole and an electron. Further, n and λ are the numbers of holes necessary for dissolving Si1 atoms, respectively, and porous Si is formed when the condition of n> 2 or λ> 4 is satisfied.

From the above, P-type Si in which holes are present
Can easily be said to be porous. This selectivity in porosity has been demonstrated by Nagano et al. And Imai (Nagano, Nakajima, Anno, Onaka, Kajiwara; Technical Report of IEICE, vol 79, SSD 79-9549 (197).
9)), (K. Imai; Solid-State El
electronics vol 24, 159 (198
1)).

On the other hand, it has been reported that high-concentration N-type Si can be made porous (RP Holmstrom,
I. J. Y. Chi Appl. Phys. Lett.
Vo. 42, 386 (1983)). Therefore, P type,
It can be made porous regardless of N type.

Further, since the porous layer has a large amount of voids formed therein, its density is reduced to less than half. As a result, the surface area increases dramatically compared to the volume,
Its chemical etching rate is significantly increased as compared with the etching rate of a normal single crystal layer.

The conditions for making single crystal Si porous by anodization are shown below. The starting material of porous Si formed by anodization is not limited to single crystal Si, and Si having another crystal structure may be used.

Applied voltage: 2.6 (V) Current density: 30 (mA · cm ^-2 ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1:
1: 1 time: 2.4 (hour) Thickness of porous Si: 300 (μm) Porosity: 56 (%) Single crystal Si thin film prepared by epitaxially growing Si on the porous Si substrate thus formed. To form.
The thickness of the single crystal Si thin film is preferably 50 μm or less, more preferably 20 μm or less.

Next, after oxidizing the surface of the above-mentioned single crystal Si thin film, a substrate which will eventually form a substrate is prepared,
The oxide film on the surface of the single crystal Si and the above substrate are bonded together. Alternatively, after the surface of a newly prepared single crystal Si substrate is oxidized, it is attached to the single crystal Si layer on the porous Si substrate. The reason for providing this oxide film between the substrate and the single crystal Si layer is that, for example, when glass is used as the substrate, the interface level generated by the underlying interface of the Si active layer is higher than that of the glass interface. This is because the level can be lowered and the characteristics of the electronic device can be significantly improved. Furthermore, only the single crystal Si thin film obtained by etching away the porous Si substrate by selective etching described below may be attached to a new substrate. For bonding, simply touch each surface at room temperature after cleaning and de
Although they are sufficiently adhered so that they cannot be easily peeled off by r Waals force, they are further heat-treated under a nitrogen atmosphere at a temperature of 200 to 900 ° C., preferably 600 to 900 ° C. to be completely bonded.

Further, a Si ₃ N ₄ layer is deposited as an etching prevention film on the whole of the above-mentioned two bonded substrates, and only the Si ₃ N ₄ layer on the surface of the porous Si substrate is removed.
Apiezon wax may be used instead of the Si ₃ N ₄ layer. Then, the porous Si substrate is entirely removed by a method such as etching to obtain a semiconductor substrate having a thin film single crystal Si layer.

A selective etching method for electroless wet etching only this porous Si substrate will be described.

As an etching solution which does not have an etching effect on crystalline Si and can selectively etch only porous Si, a buffered material such as hydrofluoric acid, ammonium fluoride (NH ₄ F) or hydrogen fluoride (HF) is used. Hydrofluoric acid, mixed solution of hydrofluoric acid or buffered hydrofluoric acid with hydrogen peroxide solution, hydrofluoric acid with alcohol or buffered hydrofluoric acid, hydrofluoric acid with hydrogen peroxide solution and alcohol or buffer A mixed solution of dehydrofluoric acid is preferably used. Etching is performed by moistening the substrate bonded to these solutions. The etching rate depends on the solution concentration and temperature of hydrofluoric acid, buffered hydrofluoric acid, and hydrogen peroxide solution. By adding hydrogen peroxide solution, the oxidation of Si can be accelerated and the reaction rate can be increased as compared with that without addition. By further changing the ratio of hydrogen peroxide solution, the reaction rate can be increased. Can be controlled. Further, by adding alcohol, it is possible to instantaneously remove the bubbles of the reaction product gas due to etching from the etching surface without stirring, and it is possible to uniformly and efficiently etch the porous Si.

The HF concentration in the buffered hydrofluoric acid is set within the range of preferably 1 to 95%, more preferably 1 to 85%, further preferably 1 to 70% with respect to the etching solution. The NH ₄ F concentration in the acid is set within the range of preferably 1 to 95%, more preferably 5 to 90%, and further preferably 5 to 80% with respect to the etching solution.

The HF concentration is preferably set in the range of 1 to 95%, more preferably 5 to 90%, further preferably 5 to 80% with respect to the etching solution.

The H ₂ O ₂ concentration is
It is preferably 1 to 95%, more preferably 5 to 90%, still more preferably 10 to 80%, and is set within a range in which the effect of the hydrogen peroxide solution is exhibited.

The alcohol concentration is preferably 80%, more preferably 60% or less, still more preferably 40% or less with respect to the etching solution, and is set within a range in which the effect of the alcohol is exhibited.

The temperature is preferably set in the range of 0 to 100 ° C, more preferably 5 to 80 ° C, and further preferably 5 to 60 ° C.

As the alcohol used in this step, in addition to ethyl alcohol, isopropyl alcohol or the like which can be used practically in the manufacturing process and which is desired to have the above-mentioned alcohol addition effect can be used.

In the semiconductor substrate thus obtained, a single crystal Si layer equivalent to that of an ordinary Si wafer is flatly and uniformly thinned to have a large area over the entire substrate.

The single crystal Si layer of this semiconductor substrate is separated by a partial oxidation method or etched into an island shape, and is doped with impurities to form a p- or n-channel transistor.

[0034]

The present invention will be described in more detail below.

FIG. 1 shows an active matrix substrate with a built-in peripheral drive circuit used in the present invention. Reference numerals in FIG. 1 indicate the same parts as in the description of the conventional substrate.

The active matrix substrate shown in FIG. 1 has a plurality of drive circuits of which the display lines 3 are 5 and 6, and the scanning lines 4 are 7 and 8, respectively, and the drive circuits 5 are a plurality of 9 and 9 '. Input the clock signal from the location. The other drive circuits 6, 7 and 8 similarly input clock signals from a plurality of locations. In the present invention, the driving circuit may be one for each of the scanning line and the display line, but it is possible to drive at a higher speed by using a plurality of driving circuits.

FIG. 3 shows a circuit diagram of the active matrix substrate when a CMOS type driving circuit is used. In the present invention, the scanning line 4 and the display line 3 for inputting the scanning signal and the display signal to the pixel 41 are connected to the driving circuits 7 and 8 and the driving circuits 5 and 6 as shown in FIG. ..

The 90% rise time of the power supply voltage of the clock signal according to the input method of the present invention is obtained as follows.

Τ = ρ _s · L · C / W τ is the time constant of the signal line, ρ _s is the sheet resistance, L is the wiring length, W is the wiring width, and C is the additional capacitance. ρ _s is 0.1Ω / □ of aluminum, C = 50pF, L = 130m
When m and W = 100 μm, there is an effect that the effective wiring length L is halved and the wiring width W is doubled when signals are input from two places, and at that time, τ = 375 psec. The 90% rise time is 2.3 times τ, and in the present embodiment, the time required for 90% rise is only 863 psec, which can cope with a high frequency of several hundred MHz.

On the other hand, 90% of the above-mentioned ITO wiring
Even if signals are input from two locations, the rise time is
ρ _s = 20 Ω / □, C = 50 pF, L = 15 mm, W =
200 μm, τ = 75 nsec to 170 nsec, and only about 5 MHz can be supported. Conventional methods include
Some have two sets of shift registers, but if the clock signal is not high-speed enough, the rounding of rising waveform is distributed in the line, and it appears as unevenness when viewed as an image.

In the signal input method of the present invention, in addition to the above-mentioned embodiment, it is also preferable to input signals from three points to one drive circuit as shown in FIG. Further, by increasing the number of driving circuits and adding signal input points, it is possible to cope with higher speed.

[0042]

According to the signal input method of the present invention, a single crystal semiconductor, which is capable of high-speed response and has high reliability, is used for a transistor as compared with a conventional polycrystalline or amorphous material, and a low resistance metal or silicide is used for a signal line. By using the same and inputting signals from a plurality of locations, the speed of the drive circuit is increased and high frequency drive of the active matrix substrate is realized. Therefore, a high-definition image in which the number of pixels is further increased and a large-area screen can be dealt with and clear display can be performed.

[Brief description of drawings]

FIG. 1 is a diagram showing one of embodiments of the present invention.

FIG. 2 is a diagram showing a circuit diagram of the substrate shown in FIG.

FIG. 3 is a cross-sectional view near a transistor formed in a peripheral drive circuit.

FIG. 4 is a diagram showing one of the embodiments of the present invention.

FIG. 5 is a diagram showing a conventional active matrix substrate.

[Explanation of symbols]

 1 Pixel electrode 2 Transistor 3 Display line 4 Scan line 5 and 6 Display line drive circuit 7 and 8 Scan line drive circuit 9 to 12 'Clock signal input terminal 21 Substrate 22 Source (or drain) 23 Drain (or source) 24 Gate 25 Channel 26-28 Wiring Al 29 Wiring Si 30 Display line 31-40 Insulating layer 41 Pixel

Claims (2)

[Claims] 1. An active matrix substrate incorporating a peripheral drive circuit, wherein a clock signal line in the peripheral drive circuit is wired with metal or silicide, and a transistor in the peripheral drive circuit is formed of a single crystal thin film. A signal input method characterized in that signals are input to a circuit from a plurality of locations. 2. The signal input method according to claim 1, wherein each of the scanning lines and the display lines has a plurality of drive circuits, and signals are input to each drive circuit from a plurality of locations.