JPH05206306A - High-power transistor vessel for high-frequency band - Google Patents
High-power transistor vessel for high-frequency bandInfo
- Publication number
- JPH05206306A JPH05206306A JP1421292A JP1421292A JPH05206306A JP H05206306 A JPH05206306 A JP H05206306A JP 1421292 A JP1421292 A JP 1421292A JP 1421292 A JP1421292 A JP 1421292A JP H05206306 A JPH05206306 A JP H05206306A
- Authority
- JP
- Japan
- Prior art keywords
- pedestal
- thermal expansion
- vessel
- expansion coefficient
- ceramic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、半導体装置に関し、特
に高周波数帯用高出力トランジスタ容器に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a high power transistor container for high frequency band.
【0002】[0002]
【従来の技術】従来の容器は、図3に示すように半導体
素子、チップコンデンサ、インピーダンス整合回路基板
といった半導体回路をマウントする台座部とヒートシン
クを考慮したベース部分、半導体回路を囲む側壁部で構
成されている。台座部とベース部分は従来図3の2のよ
うにCuによる一体形成で構成され、Cuベースの上に
Cuまたはセラミックの外壁が接着され、Cu台座上に
半導体回路、インピーダンス整合回路基板等がマウント
されている。2. Description of the Related Art As shown in FIG. 3, a conventional container is composed of a pedestal portion for mounting a semiconductor circuit such as a semiconductor element, a chip capacitor and an impedance matching circuit board, a base portion in consideration of a heat sink, and a side wall portion surrounding the semiconductor circuit. Has been done. The pedestal part and the base part are conventionally formed integrally with Cu as shown in FIG. 3B, the outer wall of Cu or ceramic is adhered on the Cu base, and the semiconductor circuit, impedance matching circuit board, etc. are mounted on the Cu pedestal. Has been done.
【0003】図3中、2はCu製台座部及びベース部、
3はインピーダンス整合回路基板、4は半導体素子及び
チップコンデンサ等の半導体回路、5はCuまたはセラ
ミック製側壁を示す。In FIG. 3, 2 is a Cu pedestal and a base,
Reference numeral 3 denotes an impedance matching circuit board, 4 a semiconductor circuit such as a semiconductor element and a chip capacitor, and 5 a Cu or ceramic side wall.
【0004】[0004]
【発明が解決しようとする課題】Cuの熱膨張率は約
1.7×10-5℃-1、セラミックの熱膨張率は約6.0
×10-6℃-1、GaAsの熱膨張率は約5.0×10-6
℃-1である。The coefficient of thermal expansion of Cu is about 1.7 × 10 -5 ° C -1 , and the coefficient of thermal expansion of ceramics is about 6.0.
× 10 -6 ℃ -1 , the thermal expansion coefficient of GaAs is about 5.0 × 10 -6
℃ -1 .
【0005】従来の高周波数帯用高出力トランジスタ容
器は、Cuベースにセラミック製の側壁を接着した場合
や、Cu台座に半導体回路、インピーダンス整合回路基
板をマウントした場合、異なる材質間での熱膨張率の差
が著しい。このため温度サイクル試験、熱ショック試験
といった熱環境試験に対し熱ストレスによるクラックの
発生といった問題があった。A conventional high-power transistor container for a high frequency band has a thermal expansion between different materials when a ceramic side wall is adhered to a Cu base or when a semiconductor circuit or an impedance matching circuit board is mounted on a Cu pedestal. The difference in rates is remarkable. Therefore, there is a problem that cracks are generated due to thermal stress in the thermal environment tests such as the temperature cycle test and the heat shock test.
【0006】このクラックの発生は、容器が大きく、半
導体回路、インピーダンス整合回路と台座部との接触面
積が大きい程ストレスが大きく著しくなる。The generation of these cracks becomes more remarkable as the container is larger and the contact area between the semiconductor circuit, the impedance matching circuit and the pedestal is larger.
【0007】[0007]
【課題を解決するための手段】本発明の高周波数帯用高
出力トランジスタ容器は、容器内の台座部分をCuW等
の熱膨張率がマウントする材質にほぼ等しい材質で形成
する。The high-power transistor container for high frequency band according to the present invention is formed of a material such as CuW having a thermal expansion coefficient substantially equal to that of the material of which the pedestal portion is mounted.
【0008】また、側壁と容器ベース部の接着面での熱
膨張率の差の小さい材質で形成する。Further, it is formed of a material having a small difference in coefficient of thermal expansion between the adhesive surface between the side wall and the container base.
【0009】[0009]
【実施例】次に本発明について図面を参照して説明す
る。The present invention will be described below with reference to the drawings.
【0010】図1に本発明の一実施例を示す。FIG. 1 shows an embodiment of the present invention.
【0011】図1に示すように1はCuW等熱膨張率を
考慮した材質、2はCu、3はインピーダンス整合回路
基板、4は半導体回路、5は側壁を示している。As shown in FIG. 1, 1 is a material in consideration of thermal expansion coefficient such as CuW, 2 is Cu, 3 is an impedance matching circuit board, 4 is a semiconductor circuit, and 5 is a side wall.
【0012】熱膨張率はCuで約1.7×10-5℃-1、
Wで約4.5×10-6℃-1、セラミックで約6.0×1
0-6℃-1、GaAsで約5.0×10-6℃-1となってい
る。The coefficient of thermal expansion of Cu is about 1.7 × 10 -5 ° C -1 ,
About 4.5 × 10 -6 ℃ -1 for W, about 6.0 × 1 for ceramic
The temperature is 0 -6 ° C -1 and that of GaAs is about 5.0 × 10 -6 ° C -1 .
【0013】例えばCuWで形成した台座にセラミック
製のインピーダンス整合回路基板やGaAsの半導体素
子をマウントした場合、Cu単一材質で形成された台座
にマウントした場合に比べ互いの熱膨張率の差が小さい
ため熱ストレスによって生じるインピーダンス整合回路
基板や半導体素子のクラックの発生が低減できる。これ
は容器が大きく、インピーダンス整合回路基板や半導体
回路との接触面積が大きい場合、特に有効である。For example, when a ceramic impedance matching circuit board or a GaAs semiconductor element is mounted on a pedestal made of CuW, the difference in the coefficient of thermal expansion is larger than that when mounted on a pedestal made of a single Cu material. Since it is small, it is possible to reduce the occurrence of cracks in the impedance matching circuit board and the semiconductor element caused by thermal stress. This is particularly effective when the container is large and the contact area with the impedance matching circuit board or the semiconductor circuit is large.
【0014】図2に実施例2を示す。容器の側壁がセラ
ミックの場合、セラミック側壁とベース部分との接点部
を熱膨張率を考慮した材質で形成することによって、接
点部のクラックの発生を低減する。A second embodiment is shown in FIG. When the side wall of the container is made of ceramic, the contact portion between the ceramic side wall and the base portion is made of a material in consideration of the coefficient of thermal expansion, so that the occurrence of cracks at the contact portion is reduced.
【0015】また図2で示すようにベース部のCuW等
の材質をCuではさむ構造にすることによりベース部そ
のものの熱による歪に対する強度が増し、クラックの発
生をおさえることが可能となる。Further, as shown in FIG. 2, by adopting a structure in which the material such as CuW of the base portion is sandwiched by Cu, the strength of the base portion itself against the strain due to heat is increased, and it becomes possible to suppress the generation of cracks.
【0016】[0016]
【発明の効果】以上説明したように、本発明によれば異
なる材質の接点部分の熱膨張率の差を小さくした構造に
したため、熱環境下での容器のクラックの発生、マウン
ト部材の破損が低減され、熱環境特性の良好な高周波数
帯用高出力トランジスタ容器が得られる。As described above, according to the present invention, the structure in which the difference in the coefficient of thermal expansion between the contact portions made of different materials is made small, the cracking of the container and the damage of the mounting member under the thermal environment are prevented. It is possible to obtain a high-power transistor container for a high frequency band which has a reduced thermal environment characteristic.
【図1】本発明のCuW等の台座を設けた高周波数帯用
高出力トランジスタ容器の断面図である。FIG. 1 is a cross-sectional view of a high power transistor container for a high frequency band provided with a pedestal such as CuW of the present invention.
【図2】図1の側壁がセラミックの場合の断面図であ
る。FIG. 2 is a cross-sectional view when the side wall of FIG. 1 is ceramic.
【図3】従来の高周波数帯用高出力トランジスタ容器の
断面図である。FIG. 3 is a cross-sectional view of a conventional high-power transistor container for high frequency band.
1 CuW等熱膨張率を考慮した材質 2 Cu 3 インピーダンス整合回路基板 4 半導体回路 5 側壁 1 Material considering thermal expansion coefficient such as CuW 2 Cu 3 Impedance matching circuit board 4 Semiconductor circuit 5 Side wall
Claims (1)
台座を熱膨張率がマウントする材料に近い材料で形成す
ることを特徴とする高周波数帯用高出力トランジスタ容
器。1. A high-power transistor container for a high frequency band, characterized in that a pedestal for mounting a semiconductor element, an adjusting circuit, etc. is made of a material having a coefficient of thermal expansion close to that of the mounting material.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1421292A JPH05206306A (en) | 1992-01-29 | 1992-01-29 | High-power transistor vessel for high-frequency band |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1421292A JPH05206306A (en) | 1992-01-29 | 1992-01-29 | High-power transistor vessel for high-frequency band |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH05206306A true JPH05206306A (en) | 1993-08-13 |
Family
ID=11854794
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1421292A Withdrawn JPH05206306A (en) | 1992-01-29 | 1992-01-29 | High-power transistor vessel for high-frequency band |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH05206306A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1056092A (en) * | 1996-08-09 | 1998-02-24 | Nec Corp | Semiconductor case |
-
1992
- 1992-01-29 JP JP1421292A patent/JPH05206306A/en not_active Withdrawn
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1056092A (en) * | 1996-08-09 | 1998-02-24 | Nec Corp | Semiconductor case |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6261868B1 (en) | Semiconductor component and method for manufacturing the semiconductor component | |
US6181006B1 (en) | Thermally conductive mounting arrangement for securing an integrated circuit package to a heat sink | |
JPH02244711A (en) | Semiconductor package | |
KR960012647B1 (en) | Semiconductor device and manufacture method | |
JPS6128219B2 (en) | ||
US5825089A (en) | Low thermal resistance spring biased RF semiconductor package mounting structure | |
JPH05206306A (en) | High-power transistor vessel for high-frequency band | |
JP2002289630A (en) | Power semiconductor module | |
US5825088A (en) | Low thermal resistance semiconductor package and mounting structure | |
JP2833592B2 (en) | Semiconductor container | |
JPH10190131A (en) | Semiconductor laser | |
JPH08264566A (en) | Package for mounting semiconductor element | |
JPH0513603A (en) | Semiconductor integrated circuit device | |
JP3522975B2 (en) | Semiconductor device | |
JPH06169037A (en) | Semiconductor package | |
JPH0755003Y2 (en) | Ceramic package for semiconductor devices | |
JP2551228B2 (en) | Semiconductor device | |
JP2619155B2 (en) | Hybrid integrated circuit device | |
JP2003197837A (en) | Semiconductor device for electric power | |
JPH05283555A (en) | Semiconductor device | |
JP2004221327A (en) | Semiconductor element housing package and semiconductor device | |
JPH07122668A (en) | Semiconductor device and package thereof | |
JPH0514514Y2 (en) | ||
JP2003023118A (en) | Hermetically sealing container | |
JP2003282752A (en) | Package for high frequency and power module substrate for high frequency |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 19990408 |