JPH05206305A - Integrated circuit device - Google Patents

Abstract

PURPOSE:To improve the reliability of an integrated circuit device by obtaining a small linear capacity without widening the gap between wirings on a plane and relaxing the influence of an analog signal from a digital signal. CONSTITUTION:A polysilicon 5 is formed below a metal conductor 4 of an analog signal and the formed position is a position higher than a conventional metal conductor. Also, a metal conductor 7' of a digital signal next to the analog signal is formed on a first insulating film 2 and the formed position is a position lower than the conventional metal conductor. By making a step between the metal conductor 4 of the analog signal and the metal conductor 7' of the digital signal, the gap is lengthened and then the small linear capacity is obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated circuit device, and more particularly to the structure of metal conductor wiring.

[0002]

2. Description of the Related Art Conventionally, in an integrated circuit device, the wiring interval of metal conductors for analog signals and digital signals is smaller than the wiring interval between digital signals in order to reduce the influence of analog signals on digital signals. Widely spaced.

A cross-sectional view of the structure is shown in FIG.

In FIG. 2, a silicon oxide film 2 is formed on a semiconductor substrate 1, and its surface is covered with a glassy insulating film 3.

Further, aluminum is sputtered on the entire surface and etched so as to leave aluminum in a predetermined shape. At that time, the metal conductor 4 for analog signals and the metal conductor 7 for digital signals are widely spaced from each other.

[0006]

Since a large number of analog signals and digital signals are mixed in the conventional integrated circuit device, widening the interval between the analog signal and the digital signal leads to an increase in chip size. There was a problem.

An object of the present invention is to solve the above problems and to provide an integrated circuit device in which the chip size need not be increased.

[0008]

The structure of an integrated circuit device of the present invention comprises: a first insulating film provided on a semiconductor substrate;
A polysilicon having a predetermined shape and a first metal conductor near the polysilicon are provided, a second insulating film is provided on the first insulating film and the polysilicon, and the second insulating film is provided on the polysilicon. A second metal conductor is provided on the second insulating film, and a third metal conductor is provided on the second insulating film on the first insulating film.

[0009]

1 is a sectional view showing the structure of wirings in an integrated circuit device according to an embodiment of the present invention.

In FIG. 1, a semiconductor substrate 1 is used in this embodiment.
A silicon oxide film 2 having a thickness of, for example, 5,000 (angstrom) is formed thereon, and a wiring of polysilicon 5 having a width of, for example, 1 μm is provided thereon, and the entire surface of the polysilicon 5 and the silicon oxide film 2 is, for example, 7 μm. And covered with a glassy insulating film 3 of 1,000 (angstrom).

Then, the insulating film 3 is formed by a photoetching process.
An opening is formed in the substrate, aluminum is sputtered on the entire surface, and etching is performed so as to leave aluminum in a predetermined shape to form metal conductors 4 for analog signals and metal conductors 7 for digital signals.

Further, a protective insulating film 6 is formed on the entire surface.
Thus, an integrated circuit in which the metal conductors 4 and 7 have steps is obtained.

As described above, in the integrated circuit device of the present embodiment, the polysilicon 5 is added to the F portion of the metal conductor 4 for analog signals.
Is provided and the position is higher than that of the conventional metal conductor 7.

A metal conductor 7'for a digital signal next to the analog signal is arranged on the first insulating film 2 so as to be located at a position lower than that of the conventional metal conductor 7.

By providing a step between the metal conductor 4 for analog signal and the metal conductor 7'for digital signal, the space is widened and the line capacitance is reduced.

[0016]

As described above, according to the present invention, the gap between the metal conductors is increased without increasing the gap between the metal conductors on the plane, so that the gap between the metal conductors is increased and the line capacitance is reduced. Further, the effect that the analog signal is received from the digital signal is mitigated, and the reliability of the integrated circuit device is enhanced.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a wiring structure of a metal conductor in an integrated circuit device according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view of a conventional integrated circuit device.

[Explanation of symbols]

 1 semiconductor substrate 2 oxide film 3 insulating film 4 metal conductor for analog signal 5 polysilicon 6 protective insulating film 7, 7'metal conductor for digital signal

Claims (1)

[Claims] 1. A polysilicon having a predetermined shape and a first metal conductor near the polysilicon are provided on a first insulating film provided on a semiconductor substrate, and the first insulating film is provided on the first insulating film. A second insulating film is provided on the polysilicon, a second metal conductor is provided on the second insulating film on the polysilicon, and a second insulating film is provided on the first insulating film. An integrated circuit device comprising: a third metal conductor.