JPH0520017B2 - - Google Patents
Info
- Publication number
- JPH0520017B2 JPH0520017B2 JP19531884A JP19531884A JPH0520017B2 JP H0520017 B2 JPH0520017 B2 JP H0520017B2 JP 19531884 A JP19531884 A JP 19531884A JP 19531884 A JP19531884 A JP 19531884A JP H0520017 B2 JPH0520017 B2 JP H0520017B2
- Authority
- JP
- Japan
- Prior art keywords
- data
- shift register
- signal
- clock signal
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000012546 transfer Methods 0.000 claims description 28
- 230000002093 peripheral effect Effects 0.000 description 14
- 238000010586 diagram Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 230000007257 malfunction Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000012937 correction Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000012552 review Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
Landscapes
- Small-Scale Networks (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19531884A JPS6172440A (ja) | 1984-09-18 | 1984-09-18 | デ−タ転送方式 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19531884A JPS6172440A (ja) | 1984-09-18 | 1984-09-18 | デ−タ転送方式 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6172440A JPS6172440A (ja) | 1986-04-14 |
| JPH0520017B2 true JPH0520017B2 (enExample) | 1993-03-18 |
Family
ID=16339167
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19531884A Granted JPS6172440A (ja) | 1984-09-18 | 1984-09-18 | デ−タ転送方式 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6172440A (enExample) |
-
1984
- 1984-09-18 JP JP19531884A patent/JPS6172440A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6172440A (ja) | 1986-04-14 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5361371A (en) | Microprocessor with reset execution from an arbitrary address | |
| JPH0331298B2 (enExample) | ||
| US6542569B2 (en) | Memory device command buffer apparatus and method and memory devices and computer systems using same | |
| US4387294A (en) | Shift register-latch circuit driven by clocks with half cycle phase deviation and usable with a serial alu | |
| JPH0520017B2 (enExample) | ||
| JPH0337776B2 (enExample) | ||
| US6301188B1 (en) | Method and apparatus for registering free flow information | |
| JP2009252307A (ja) | 半導体記憶装置およびそれを用いたシステム | |
| EP0256134B1 (en) | Central processing unit | |
| CN100524514C (zh) | Ddr2操作模式中附加延迟的高效率寄存器 | |
| JP3737144B2 (ja) | 割り込み要求回路および割り込み要求の処理方法 | |
| US7065669B2 (en) | System and method for providing a write strobe signal to a receiving element before both an address and data signal | |
| JPH01241913A (ja) | レーシング防止回路 | |
| JP2692469B2 (ja) | データ制御装置 | |
| US20100290266A1 (en) | Command processing circuit and phase change memory device using the same | |
| JPH04241622A (ja) | マイクロプロセッサ | |
| JP2669028B2 (ja) | コマンドレジスタ回路 | |
| JP2626526B2 (ja) | 制御データ受信回路 | |
| JPH05324119A (ja) | 情報処理装置 | |
| JPH04295944A (ja) | 演算処理装置 | |
| JPH01302918A (ja) | データ設定回路 | |
| JPH04243095A (ja) | 符号化回路 | |
| JPH0418634A (ja) | データ処理装置 | |
| KR20080114204A (ko) | 마이크로 콘트롤러의 롬 카운터 | |
| JPS62182937A (ja) | テストモ−ド設定回路 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |