JPH05198522A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To provide the manufacture of a semiconductor device which has materialized an ion implantation method and a recovery method capable of recovering more completely from the damage of crystal defect, etc., at ion implantation. CONSTITUTION:In the manufacture of a semiconductor device for forming a high-concentration impurity layer by implanting impurities into the semiconductor layer 1-2 on an insulating substrate 1-1 by an ion implantation method, this is the manufacture of a semiconductor device which recovers more completely from the defects (1-6) caused at implantation by performing the implantation of ions and the subsequent heat treatment process repeatedly dividing it into several times, and arranging it so that the quantity of implanted ions at one time may not exceed the critical dosage of ions.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device on an insulating substrate, and more particularly to a method for manufacturing a field effect transistor on an insulating substrate.

[0002]

2. Description of the Related Art In recent years, field-effect transistors (hereinafter referred to as SOI transistors) such as MOS transistors in a semiconductor layer on an insulating substrate have been actively researched as high-speed transistors and transistors on transparent substrates. ing.

The manufacturing process of a conventional SOI transistor is
This is the same process as the silicon wafer process.

FIG. 4 is a sectional view showing a manufacturing process of a conventional SOI MOS transistor. As shown in FIG. 4, a gate oxide film (4-3) is formed on a silicon wafer (4-2) by thermal oxidation. After forming the N-type polycrystalline silicon (4-4) which is the gate electrode on the gate electrode (4-4) and the gate electrode (4-4), the source / drain region ( 4-5) is formed.

As the impurities to be implanted, for example, N
Type MOS transistor, phosphorus (P ⁺ ) is implanted at an energy of 80 to 100 keV and a dose of 5 × 10 ^15.
Inject about cm ⁻² (FIG. 4A).

After that, heat treatment at about 900 ° C. is performed,
The crystal damage (4-6) received during the activation of impurities and the ion implantation is recovered (FIG. 4B).

As a result, a source / drain region having a junction depth of about 8000Å is formed by one-time ion implantation. As described above, conventionally, the source / drain regions are formed by one-time ion implantation.

[0008]

However, as in the above-mentioned conventional example, even if an attempt is made to recover the damage at the time of ion implantation by one heat treatment, the damage is not sufficiently recovered, and as a result, the source / drain regions have a high resistance. There is a problem that becomes.

This problem will be described in more detail below.

Generally, when impurities are introduced by an ion implantation method, the impurity ions lose energy while repeating collisions with silicon atoms and remain stationary, so that a large number of lattice defects are generated. The amount of defects increases as the amount of implanted ions increases. When the amount of implanted ions, which is called the critical dose amount, is exceeded, the implanted region becomes a continuous amorphous region.

FIG. 7 shows the relationship between the dose and lattice mismatch (relative value) when phosphorus is used as the impurity ion. As shown in the figure, it can be seen that the dose amount is 1 × 10 ¹⁵ cm ⁻² and the material is completely amorphized.

The critical dose amount of each ionic species is shown below.

[0013]

[Table 1] However, these defects can be recovered by heat treatment. The manner of this recovery largely differs depending on whether or not a continuous amorphous region is formed.

In the case of a low dose amount in which a continuous amorphous region is not formed, most of the defects disappear by the heat treatment at 400 ° C. or less (crystal recovery in this case is self-recovery). Has been confirmed). On the other hand, when a continuous amorphous region is formed, the recovery of crystallinity requires a heat treatment temperature of 600 ° C. or higher, and the recovery is due to the recrystallization process from the underlying crystal.

These states are shown in FIG. 2 by taking the impurity Sb as an example. When the dose is below the critical dose, the number of lattice defects is 10.
% (Totally amorphous is 100%), 400
The crystal has recovered at about ℃, 6 above the critical dose
Recovery is not achieved unless the temperature is higher than 00 ° C.

In the conventional source / drain formation of an SOI MOS transistor by ion implantation, the dose amount was extremely high at 1 × 10 ¹⁵ to 1 × 10 ¹⁶ cm ^-2 , which exceeded the critical dose amount. Therefore, the source / drain regions immediately after the ion implantation are completely amorphous.

In a transistor on a silicon wafer, a defect due to ion implantation in the source / drain regions is recrystallized from the underlying crystal, so there is no serious problem. If anything, it is possible to achieve complete crystal recovery by positively amorphizing and recrystallizing by high heat treatment. This is because a good silicon crystal region exists in the base.

On the other hand, one feature of the SOI transistor is low parasitic capacitance, which is a parasitic capacitance formed by a depletion layer below the drain by forming a drain high-concentration impurity region to the depth of the base insulating film. It is achieved by eliminating. However, in such an SOI transistor (SOI transistor in which the SOI film thickness is thinner than the junction depth of the source / drain impurities), the underlying layer is an amorphous insulating film, and thus the region amorphized by the damage of ion implantation. There is no good seed crystal to recover

Therefore, in the source / drain regions,
Crystal recovery due to solid-phase epitaxial growth does not occur, and solid-phase polycrystalline silicon becomes nucleated.

In a normal heat treatment, for example, a heat treatment at 950 ° C. for 30 minutes, polycrystal silicon having a thickness of several hundred angstroms is formed, and its resistance is increased by 3 to 20 times.

As the transistors are miniaturized and the speed is increased, increasing the resistance of the source / drain regions is a serious problem.

For example, as shown in FIG. 5, when an N-type MOS transistor is formed on a SIMOX substrate having a semiconductor layer with a thickness of 2000 Å, phosphorus (P ⁺ ) is used with the gate electrode (5-4) as a mask. Ions are implanted with a dose amount of 1.5 × 10 ¹⁵ cm ^-2 (FIG. 5A), and then heat treatment is performed at 950 ° C. for 30 minutes to form source / drain regions (5-5) (FIG. 5). (B)).

The critical dose amount of phosphorus (P ⁺ ) with respect to silicon is 1 × 10 ¹⁵ cm ^-2 , and the source / drain regions (5-5) are completely non-immediately after the implantation under the above ion implantation conditions. It has been crystallized. This is confirmed by the measurement of X-ray diffraction.

Although the crystal is recovered by the subsequent heat treatment,
It is made of polycrystalline silicon of several hundred angstroms.
This is confirmed by TEM observation. Furthermore, X
As a result of measurement of line diffraction, many planes have been confirmed. The resistivity of the area was 10 mΩ · cm. It is about one digit higher than that of normal bulk silicon.

The characteristics of the MOS transistor thus obtained are shown in FIG. Since the crystallinity of the source / drain region is not improved, the parasitic resistance is increased and the characteristics of the triode region are greatly changed. As a result, deterioration of transistor characteristics such as delay of transistor operation and non-linearity of transistor characteristics occurs.

As described above, the conventional method of ion implantation of impurities and the method of recovering the implantation damage by the subsequent heat treatment cannot perform sufficient recovery, and thus there is a problem to be solved that the characteristics of the semiconductor device such as a transistor are deteriorated. It was

An object of the present invention is to provide an ion implantation method capable of more completely recovering damage caused by crystal implantation such as crystal defects, and a method of manufacturing a semiconductor device realizing the recovery method.

[0028]

As a means for solving the above problems, the present invention is a semiconductor device in which a high-concentration impurity layer is formed by implanting impurities into a semiconductor layer on an insulating substrate by an ion implantation method. In the manufacturing method of, the impurity implantation and the subsequent heat treatment step are repeated by dividing into a plurality of times, and at the time of ion implantation of the impurities,
A method for manufacturing a semiconductor device is characterized in that the amount of ion implantation performed once does not exceed the critical dose amount of the ions.

Further, the semiconductor device is a field effect transistor, and when the source / drain regions of the transistor are formed, the implantation of the impurities and the subsequent heat treatment step are repeated in a plurality of times, and The method of manufacturing a semiconductor device according to claim 1, wherein a single ion implantation amount does not exceed a critical dose amount of the ions during the ion implantation of the impurities.

[0030]

According to the present invention, the step of ion implantation at a critical dose or less and the heat treatment is divided into two or more times and is repeatedly implanted, so that the impurity dose amount at one ion implantation is set to the critical dose amount. It was possible to suppress to below, and the source / drain regions did not become amorphous even immediately after implantation, and the subsequent heat treatment enabled self-repair of crystallinity.

When the impurity implantation amount is less than the critical dose amount, the target concentration (preferably 1 × 10 5) is obtained by one implantation.
^Although it cannot be ¹⁹ cm ⁻³ or more), the desired concentration can be obtained by repeating the above steps.

According to the present invention, for example, when a source / drain region of an SOI MOS transistor is formed as a semiconductor device, the present invention can be used to improve the crystallinity of the source / drain region and to provide a low resistance source / drain Regions can be formed.

[0033]

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is a sectional process drawing of a semiconductor device for best explaining the features of the present invention.

This embodiment will be described below with reference to FIG.

A SIMOX substrate with a film thickness of 2000 Å (1-
1) A gate insulating film (1-3) having a film thickness of 500 Å was formed on (1-2) by a thermal oxidation method.

A gate electrode (1-4) made of polycrystalline silicon having a film thickness of 4000 Å was provided (FIG. 1A).

Phosphorus (P ⁺ ) is used as an impurity at 90 keV.
-Ion implantation was performed at 0.7 × 10 ¹⁵ cm ^-2 . The critical dose of phosphorus (P ⁺ ) with respect to silicon is 1 × 10 ¹⁵ cm ^-2.
And the dose amount in this embodiment is less than that (FIG. 1).
(B)).

Therefore, the source / drain regions (1-
Since 5) is not completely amorphized, the crystallinity of the defect (1-6) was completely recovered by heat treatment at 900 ° C. for about 1 hour (FIG. 1 (c)). The above crystallinity was evaluated and confirmed by X-ray diffraction.

The above step was further repeated. As a result, the total dose is 1.5 without deteriorating the crystallinity.
A high-concentration impurity region of × 10 ¹⁵ cm ^-2 could be formed.

PSG is used as an interlayer insulating film (1-7).
(Phosphorus glass) was deposited at 6000Å and heat-treated at 900 ° C for 30 minutes.

A contact hole was opened, and AL (1-8) was vapor-deposited by a sputtering method to form a wiring.

PSG (phosphorus glass) 6000Å was deposited as a protective film (1-9) (FIG. 1 (d)).

The source / drain region (1-
In 5), it is confirmed by SIMS analysis that impurities have reached the insulating film by ion implantation. Also, X
It was also confirmed by line diffraction that the crystallinity was maintained immediately after injection.

For comparison, phosphorus is implanted at an energy of 90 ke.
X-ray diffraction of the ion-implanted material with a V · dose of 1.5 × 10 ¹⁵ cm ^-2 confirmed that the material was amorphized.

FIG. 3 shows the characteristics of the MOS transistor obtained in this embodiment. No parasitic resistance component was observed, indicating good linear characteristics. Moreover, the resistivity of the source / drain region was measured and found to be 2 mΩ · cm, which was about 1/5 of that of the conventional resistivity. (Second Embodiment) Next, a method of manufacturing a semiconductor device according to a second embodiment of the present invention will be described with reference to FIG.

On a SIMOX substrate with a film thickness of 1000 Å (1
-1) A gate insulating film (1-3) having a film thickness of 500 Å was formed on (1-2) by a thermal oxidation method.

A gate electrode (1-4) made of polycrystalline silicon having a film thickness of 4000 Å was provided (FIG. 1A).

Arsenic (A _S ⁺ ) was added as an impurity at 230 k
Ion implantation was performed at eV · 2 × 10 ¹⁴ cm ⁻² . The critical dose of arsenic (A _S ⁺ ) to silicon is 3 × 10 ¹⁴ cm ^-2.
And the dose amount in this embodiment is less than that (FIG. 1).
(B)).

Therefore, the source / drain regions (1-
Since 5) is not completely amorphized, the crystallinity of the defect (1-6) was completely recovered by heat treatment at 900 ° C. for about 1 hour (FIG. 1 (c)).

The above step was further repeated.

As a result, without deteriorating the crystallinity,
A high-concentration impurity region with a total dose of 4 × 10 ¹⁴ cm ⁻² could be formed.

Are the same as in the first embodiment. The resistivity was about 1/5 lower than that of the conventional method. (Embodiment 3) In this embodiment, in the case of Embodiment 2,
The ion implantation amount per time was lowered to 1.5 × 10 ¹⁴ cm ⁻² , and then the heat treatment was performed at 850 ° C. for 1 hour. And
By repeating this process 3 times, the total dose is 4.5.
A source / drain region of × 10 ¹⁴ cm ^-2 was formed.

As a result, even when the heat treatment temperature was lowered to about 850 ° C., the same heat treatment temperature as 900 ° C. was obtained.

Although the above-described embodiments have been described by taking the SOI MOS transistor as an example, the method of the present invention is not limited to this, and can be applied to other semiconductor devices.

[0056]

As described above, according to the present invention, when a high concentration impurity region of a semiconductor device such as a source / drain region of an SOI transistor is formed, ion implantation at a critical dose amount or less and heat treatment are repeated a plurality of times. The following effects can be obtained by introducing impurities by using these methods. Crystal defects in the high concentration region due to ion implantation of impurities,
Can be recovered more completely, eg SOI MOS
In the transistor, a low resistance source / drain region can be formed without impairing the crystallinity of the source / drain region.

By increasing the number of times of ion implantation and subsequent heat treatment and increasing the number of divisions of impurity implantation, the heat treatment temperature can be lowered and the process temperature can be lowered.

[Brief description of drawings]

FIG. 1 is a sectional view of a step of manufacturing an SOI transistor according to an embodiment of the present invention.

FIG. 2 is a diagram showing a relative value of a heat treatment temperature and a defect amount.

FIG. 3 is an SOI M produced by the manufacturing process of the present invention.
Device characteristics of the OS transistor (I _d -V _g characteristics)
Fig.

FIG. 4 Sources of transistors on a silicon wafer
6A and 6B are cross-sectional views illustrating a process of forming a drain region.

FIG. 5 is a cross-sectional view illustrating a process of forming a source / drain region of a conventional SOI transistor.

FIG. 6 is a device characteristic diagram by a method for forming a source / drain region of a conventional SOI transistor.

FIG. 7 is a graph showing the relationship between phosphorus dose and lattice mismatch (crystal defect).

[Explanation of symbols]

(1-1) (5-1) Base insulating film (SiO ₂ ) (1-2) (5-2) Silicon layer on insulating substrate (4-2) Silicon wafer (1-3) (4-3) (5-3) Gate insulating film (S
iO ₂ ) (1-4) (4-4) (5-4) Gate electrode (polycrystalline silicon) (1-5) (4-5) (5-5) Source / drain region (1-6) ( 4-6) (5-6) Defects caused by ion implantation of source / drain regions (1-7) Interlayer insulating film (PSG) (1-8) Metal wiring (AL) (1-9) Protective film (PSG)

Claims (2)

[Claims] 1. A method of manufacturing a semiconductor device in which a high-concentration impurity layer is formed by implanting impurities into a semiconductor layer on an insulating substrate by an ion implantation method, wherein the impurity implantation and subsequent heat treatment steps are performed a plurality of times. A method of manufacturing a semiconductor device, wherein the method is divided and repeated, and a single ion implantation amount does not exceed a critical dose amount of the ions during the ion implantation of the impurities. 2. The semiconductor device is a field effect transistor, and when the source / drain regions of the transistor are formed, the impurity implantation and the subsequent heat treatment step are repeated in a plurality of times, and 2. The method of manufacturing a semiconductor device according to claim 1, wherein a single ion implantation amount does not exceed a critical dose amount of the ions when the impurities are ion-implanted.