JPH05190791A - Semiconductor device - Google Patents

Abstract

PURPOSE:To enhance the characteristic of a semiconductor element and the yield of the title device by a method wherein dummy repetition patterns are formed in the boundary between repetition parts of the same pattern and pattern parts other than them. CONSTITUTION:Only parts in which the shape of resist patterns 2 in a repetition part A is uniform are used as capacitors for a DRAM cell; they are not used as the resist patterns 2 in end parts B in which a nonuniform shape is changed and in which regions have been formed to be larger than a prescribed size and are set to a state that they are left as they are as dummy patterns. As a result, even when periodic patterns are formed near the resolution limit of light, the characteristic of a cell can be made uniform. Consequently, it is possible to restrain an irregularity in the characteristic of element devices such as transistors, diodes, capacitors, resistances and the like constituting a semiconductor element. Thereby, the characteristic of the semiconductor element and the yield of the title device are enhanced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and
The present invention relates to a semiconductor device that can be applied to semiconductor elements such as RAM and SRAM, and that can improve cell characteristics and yield by making cell characteristics uniform in pattern design of semiconductor elements. In recent years, the patterns of semiconductor elements have been miniaturized, and with the miniaturization, there has been a demand for forming patterns near the resolution limit of light.

However, when the periodic pattern is formed near the resolution limit, the cell characteristics are different because the pattern shape is different between the repeating portion and the end portion of the repeating pattern or the end portion pattern is larger than the reference size. There is a drawback that the edge characteristics change and become non-uniform, and the device characteristics and the yield decrease. Therefore, there is a demand for a semiconductor device that can make cell characteristics uniform even if a periodic pattern is formed near the resolution limit of light, and can improve element characteristics and yield.

[0003]

2. Description of the Related Art In conventional photolithography technology,
Since patterning is performed at a place where there is a margin of resolution, for example, when forming a periodic pattern of a DRAM, a good repetitive resist pattern having substantially the same pattern shape can be formed with respect to a mask pattern having substantially the same pattern shape.

[0004]

However, in the above-mentioned conventional photolithography technique, as shown in FIG. 4A, when a periodic pattern is formed near the resolution limit with respect to a mask pattern having substantially the same pattern shape, Figure 4
As shown in (b), the pattern characteristics of the repeated portion A and the end portion B (which are easily deformed) of the repeated resist pattern are different, or the pattern of the end portion is larger than a predetermined size. There is a problem in that the characteristics of the device and the yield of the device are reduced due to unevenness in the parts.

Therefore, it is an object of the present invention to provide a semiconductor device in which cell characteristics can be made uniform even if a periodic pattern is formed near the resolution limit of light, and the element characteristics and yield can be improved. I am trying.

[0006]

In order to achieve the above object, a semiconductor device according to the present invention comprises a dummy repeating pattern formed at a boundary between a repeating portion of the same pattern and a pattern portion other than the repeating portion of the same pattern. It is a thing. INDUSTRIAL APPLICABILITY The present invention can be applied to a semiconductor memory device including a transistor such as DRAM and SRAM, a diode, a capacitor and a resistor. In addition, the repeating pattern can be particularly preferably applied to a semiconductor device formed by utilizing interference of lights having different phases.

[0007]

In the present invention, as shown in FIGS.
Since the resist pattern 2 of the end portion B whose shape is deformed to form an image larger or smaller than a predetermined size is not used as a dummy pattern, even if a periodic pattern is formed near the resolution limit of light, the cell characteristics are reduced. Can be made uniform. Therefore, it is possible to suppress variations in characteristics of element devices such as a transistor, a diode, a capacitor, and a resistor that form a semiconductor element.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. (First Embodiment) FIG. 1 shows a DR according to the first embodiment of the present invention.
It is a figure which shows the mask pattern and resist pattern at the time of forming the stacked capacitor pattern of AM.
In FIG. 1, reference numeral 1 denotes a mask pattern, and the size of the mask pattern 1 is 1.1 μm in length and 0.6 μm in width. The horizontal distance between the mask patterns 1 is 0.35 μm and the vertical distance between the mask patterns 1 is 0.35 μm. .. The mask pattern size is shown as one time. On a 5 × mask, this value is 5 ×. Reference numeral 2 is a resist pattern formed using the mask pattern 1 by a photolithography process using an i-line and a lens with NA = 0.55.

In this embodiment, as shown in FIG. 1A, when a periodic pattern is formed near the resolution limit with respect to the mask pattern 1 having substantially the same pattern shape, as shown in FIG. The pattern shape is different between the repeating portion A and the end portion B of the pattern 2, and the resist pattern 2 at the end portion B is imaged larger than a predetermined size. Therefore, in this embodiment, the resist pattern 2 of the repeating portion A is
Only the portion having a uniform shape is used as the capacitor of the DRAM cell, and the resist pattern 2 at the end B where the uneven shape is deformed and imaged larger than a predetermined size is not used as the capacitor but is used as a dummy pattern. Leave it as it is.

As described above, in this embodiment, since the resist pattern 2 at the end portion B whose shape is deformed to form an image larger than a predetermined size is not used as a dummy pattern, it is close to the resolution limit of light. Even if a periodic pattern is formed with, the cell characteristics can be made uniform. Therefore, device characteristics and yield can be improved. (Second Embodiment) FIG. 2 shows a phase shift mask pattern and an i line, N when forming a capacitor pattern of a DRAM using a phase shift reticle according to the second embodiment of the present invention.
It is a figure which shows a resist pattern at the time of using the lens of A = 0.55. FIG. 3 is a diagram illustrating a method of forming a black pattern at a shifter edge according to the second embodiment of the present invention.
2 and 3, the same symbols as those in FIG. 1 indicate the same or corresponding portions, 10 is a phase shift mask pattern, 11 is a shifter, and the size of this shifter 11 is 0.9 μm in length and 0.6 μm in width. Using this mask, 0.7 μm in width
Capacitor patterns of 0.4 μm can be formed at intervals of 0.2 μm. 12 is a thin line pattern group of the shifter 11, and the width of this line pattern group 12 is
The pattern interval is 0.1 μm.

In this embodiment, as shown in FIG.
The fact that a black pattern is formed at the edge portion of 11 is used.Specifically, the fact that the traveling speed of light differs between the portion with shifter 11 and the portion without shifter 11 By inverting the phase, a black pattern is formed at the edge portion of the shifter 11. When silicon oxide is used as the shifter material, the shifter thickness is 0.39
With μ, the grain phase of i-line light is inverted. Then, here, the lines and spaces are patterns thinner than the resolution limit of the imaging optical system, and in this case, the light does not reach the substrate from the portion of the line pattern group 12 and is substantially a black pattern.

In this embodiment, as shown in FIG. 2A, the shifter 11 and the line pattern group 12 having substantially the same pattern shape are used.
When a periodic pattern is formed near the resolution limit with respect to the phase shift mask pattern 10 composed of, the resist pattern 2 at the end portion B is smaller than the resist pattern 2 at the repeating portion A as shown in FIG. The image is formed. Further, the resist pattern 2 at the end portion A is formed into a large image due to the arrangement of the shifter 11.

Therefore, in this embodiment, only the portion of the repeating portion A having the uniform shape of the resist pattern 2 is used as the capacitor of the DRAM cell, and the irregular shape is deformed to form an image larger or smaller than a predetermined size. The resist patterns 2 at the ends A and B are not used as capacitors but left as dummy patterns.

As described above, in the present embodiment, the resist pattern 2 of the end portions A and B whose shape is deformed to form an image larger or smaller than a predetermined size is not used as a dummy pattern. Even if a periodic pattern is formed near the resolution limit, the cell characteristics can be made uniform. Therefore, device characteristics and yield can be improved.

[0015]

According to the present invention, even if a periodic pattern is formed near the resolution limit of light, the cell characteristics can be made uniform, and the element characteristics and the yield can be improved.

[Brief description of drawings]

FIG. 1 is a diagram showing a mask pattern and a resist pattern when forming a stacked capacitor pattern of a DRAM according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a phase shift mask pattern and a resist pattern when forming a DRAM capacitor pattern using a phase shift reticle according to a second embodiment of the present invention.

FIG. 3 is a diagram illustrating a method of forming a black pattern at a shifter edge according to a second embodiment of the present invention.

FIG. 4 is a diagram illustrating a problem of a conventional example.

[Explanation of symbols]

 1 Mask pattern 2 Resist pattern 10 Phase shift mask pattern 11 Shifter 12 Line pattern group

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location H01L 21/027 27/04 A 8427-4M

Claims (3)

[Claims] 1. A semiconductor device, wherein a dummy repeating pattern is formed at a boundary between a repeating portion of the same pattern and a pattern portion other than the repeating portion of the same pattern. 2. The semiconductor device according to claim 1, wherein the repeating pattern is formed by utilizing interference of light having different phases. 3. The repeating portion of the same pattern is D
3. The semiconductor device according to claim 1, wherein the semiconductor device has a pattern forming a RAM or an SRAM.