JP2001189254A - Reticle for alignment, exposure method and semiconductor element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To offer reticles for alignment, an exposure method and semiconductor elements, thereby reducing the number of reticles in manufacturing semiconductor elements by split alignment, without requiring reticles for the exposure corresponding to the number of split x alignment steps without increasing the manufacturing cost and without a difficult design. SOLUTION: An element pattern is divided into periodical patterns and marginal patterns, and these patterns are arranged on the same reticle in this invention. For exposure, this reticle is prepared and when the periodical pattern is exposed, the marginal pattern is masked and when the marginal pattern is exposed, the periodical pattern is masked.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an exposure reticle for manufacturing a semiconductor device having a periodic pattern,
The present invention relates to an exposure method and a semiconductor device.

[0002]

2. Description of the Related Art In recent years, semiconductor devices tend to be miniaturized and pattern dimensions are increasingly reduced. Such a semiconductor element is subjected to photolithography by a reduced exposure method. This forms an element pattern on the reticle,
The pattern is exposed and transferred to a resist on a semiconductor wafer by a reduction optical system. By employing such an exposure method, even if the pattern on the reticle has an error, it is reduced and transferred. For this reason, an error due to exposure is extremely small on an actual device, and the device is suitable for a miniaturized semiconductor.

FIG. 2 is a schematic plan view of a conventional semiconductor device pattern and a reticle pattern. (A) is the width ka,
This is a reticle 1 on which a reticle pattern 2 having a size of height kb is arranged, and (b) shows a resist element pattern 4 in which the pattern is transferred onto a semiconductor wafer 3. The reticle pattern 2 is formed on a semiconductor wafer 3 by a reduction exposure apparatus.
The top is sequentially exposed. On the semiconductor wafer 3, the reticle pattern is reduced and a plurality of element patterns 4 are transferred. Here, assuming that the reduction ratio of the exposure apparatus is k, the width of the element pattern 4 on the semiconductor wafer 3 (that is, the size of the semiconductor element) is a and the height is b.

[0004] After a resist pattern is formed on the semiconductor wafer 3, processes such as etching, diffusion, and cleaning are performed. These series of steps are repeated a plurality of times, and a plurality of semiconductor elements are manufactured from one semiconductor wafer 3. For example, if the diffusion step and the wiring forming step are performed 20 times in total, 20 types of reticles are generally prepared, and 20 exposure steps are performed.

In such an exposure apparatus, a maximum dimension (hereinafter, referred to as an illumination area) in which a pattern can be arranged on a reticle is determined by an illumination optical system (optical system for irradiating a reticle with light from a light source). . In the above conventional example, since the size of the reticle pattern is smaller than the illumination area, the reticle pattern corresponding to the pattern of the semiconductor element can be accommodated in one reticle.

However, there are cases where a semiconductor device requiring a reticle pattern having a size exceeding this illumination area is manufactured. For example, in a line sensor or the like, the sensing unit may be long in one direction. When manufacturing such a semiconductor device, a reticle pattern exceeding the illumination area is required. There is a similar demand for image sensors and some optical sensors. In such a semiconductor element, the same pattern is periodically arranged like a unit pixel.

FIG. 3 shows a reticle pattern used for a conventional divided exposure and a conventional semiconductor element pattern manufactured using the reticle pattern. (A) is a reticle pattern 2a, 2
Reticles 1a, 1b, 1 on which b, 2c, 2d are arranged
c and 1d. 2B shows a resist element pattern 4 in which the pattern has been transferred onto the semiconductor wafer 3. As shown in FIG. 3, the dimensions of the element pattern 4 formed on the semiconductor wafer 3 are a width a and a height b. Assuming that the reduction ratio of the reduction exposure apparatus is k, the dimensions of the element pattern arranged on the reticle 1 are width ka and height kb. If this dimension is larger than the illumination area, the element pattern cannot be arranged on one reticle. In such a case, as shown in FIG. 3B, the element pattern 4 is divided into a plurality of parts (here, divided into four by the width c), and the reticle corresponding to each part as shown in FIG. (Here, four reticles 1a, 1b, 1c, and 1d) are prepared. In the exposure, the exposing device sequentially performs exposure while exchanging the divided reticles to form resist element patterns 4 on the semiconductor wafer 3. Such exposure is called division exposure.

[0008]

Generally, a semiconductor device is manufactured through about 20 exposure steps. That is, about 20 types of reticles are prepared. However, if the divided exposure is performed as described above and a plurality of reticles are used in one exposure step, for example, in the case of four divisions, 80 types of reticles must be prepared, and the design is not easy. There is a problem that the manufacturing cost increases. In addition, since a large number of reticles are stored, there is another problem that the storage location and management of the reticles become complicated.

The present invention has been made in view of the above problems, and provides an exposure reticle, an exposure method, and a semiconductor element for reducing the number of reticles in divided exposure.

[0010]

An exposure apparatus is provided with a masking mechanism. The present invention makes effective use of this mechanism. That is, the exposure reticle according to claim 1 is an exposure reticle used for manufacturing a semiconductor element having a periodic pattern, wherein a pattern arranged on the reticle is a periodic pattern of the semiconductor element. The periodic pattern is divided into other peripheral patterns, and the periodic pattern and the peripheral pattern are arranged on the same reticle.

With this configuration, a plurality of patterns can be arranged on one reticle, so that the number and types of masks required are reduced. The exposure method according to claim 2, wherein in the exposure method of transferring a pattern on a reticle onto a semiconductor substrate, a periodic pattern of a semiconductor element to be manufactured is divided from other peripheral patterns,
And prepare a reticle arranged on the same reticle,
An exposure step of masking the periodic pattern and transferring the peripheral pattern onto the semiconductor substrate; and an exposure step of masking the peripheral pattern and transferring the periodic pattern onto the semiconductor substrate. .

With this configuration, it is possible to skillfully utilize a masking mechanism mounted on the exposure apparatus.
Further, a semiconductor device according to a third aspect is a semiconductor device having a periodic pattern, which is manufactured by using the reticle for exposure according to the first aspect and the exposure method according to the second aspect. It is characterized by that.

[0013]

Embodiments will be described below with reference to the drawings. FIG. 1 is a schematic plan view of a semiconductor device pattern and a reticle pattern according to the present invention.
(A) is a reticle 1 on which reticle patterns 2a, 2b and 2c having a width of kb are arranged, and (b) is a semiconductor wafer 3
The resist element pattern 4 to which the pattern has been transferred is shown above. The dimensions of the element pattern 4 are width a × height b as shown in FIG. The semiconductor element of this embodiment is a line sensor that receives light over a wide range, and is designed to have a width a of about 55 mm. Incidentally, the exposure apparatus used here is an apparatus which mounts a 5-inch square reticle and has a reduction ratio of 5 times. For this reason, it cannot cover the illumination area of the exposure apparatus.

C in the element pattern 4 is as shown in FIG.
), A portion where a plurality of unit pixels are arranged, and this portion has a periodic pattern. Further, A and B of the element pattern 4 (see FIG. 1B) are portions of the peripheral circuit arranged around the periodic pattern, and are not periodic patterns. Thus, the solid-state imaging device according to the present embodiment divides the periodic pattern into three and the other peripheral patterns A and B. Then, a reticle pattern 2 c for transferring the element pattern of the portion C onto the semiconductor wafer 3 is arranged on the reticle 1. On the other hand, the reticle patterns 2a and 2b of the peripheral circuit portion that are not periodic are also arranged on the same reticle (see FIG. 1A). Exposure equipment reduction ratio is k
(5 in this case), the dimensions of the reticle pattern of the peripheral circuit portion A are width kd and height kb, and the peripheral circuit portion B is width ke, height kb, and the reticle pattern of the periodic pattern is width kc. , Height kb. In this way, only one reticle (see FIG. 3) conventionally required is required, so that the manufacturing cost is reduced and the reticle management is simplified.

Next, a method for exposing and transferring an element pattern 4 onto a semiconductor wafer 3 using the reticle 1 of the present invention shown in FIG. First, the portion A is exposed and transferred. At this time, a portion of the reticle 1 excluding the element pattern 2a is masked by an exposure device to transfer the reticle pattern of A to a predetermined position on the semiconductor wafer 3. Then C
Is exposed and transferred. At this time, a portion excluding the element pattern 2c of the reticle 1 is masked by an exposure device, and the pattern 2c is exposed a required number of times (three times in the present embodiment).

Finally, the portion B is exposed and transferred. As in the case described above, the portion excluding 2b is masked by an exposure device to transfer the pattern B to a predetermined position on the semiconductor wafer 3. By performing the above exposure, it is possible to form an element pattern on the semiconductor wafer 3 and manufacture the semiconductor element of the present invention.

[0017]

As described above, according to the present invention, the number of reticles can be greatly reduced, and the manufacturing cost of a semiconductor device can be greatly reduced. In addition, since the number and types of reticles are reduced, storage of reticles,
Management can also be simplified.

[Brief description of the drawings]

FIG. 1 is a schematic plan view of a semiconductor device pattern and a reticle pattern according to the present invention.

FIG. 2 is a schematic plan view of a conventional semiconductor device pattern and a reticle pattern.

FIG. 3 shows a reticle pattern used for a conventional divided exposure and a pattern of a conventional semiconductor element manufactured using the reticle pattern.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Reticle 2 ... Reticle pattern 3 ... Semiconductor wafer 4 ... Element pattern

Claims (3)

[Claims] 1. An exposure reticle used for manufacturing a semiconductor device having a periodic pattern, wherein a pattern arranged on the reticle is divided into a periodic pattern of the semiconductor device and other peripheral patterns. And a reticle for exposure, wherein the periodic pattern and the peripheral pattern are arranged on the same reticle. 2. An exposure method for transferring a pattern on a reticle onto a semiconductor substrate, wherein a periodic pattern of a semiconductor element to be manufactured and other peripheral patterns are divided and arranged on the same reticle. An exposure step of masking the periodic pattern and transferring the peripheral pattern onto the semiconductor substrate; and an exposure step of masking the peripheral pattern and transferring the periodic pattern onto the semiconductor substrate. Exposure method characterized by the above-mentioned. 3. A semiconductor device having a periodic pattern, wherein the semiconductor is manufactured by using the reticle for exposure according to claim 1 and by the exposure method according to claim 2. element.