JPH05183110A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the dispersion of etching of a semiconductor device at the time of etching of polysilicon from exerting an influence upon the value of resistance and further to suppress thermal hysteresis of the device. CONSTITUTION:The title device has a first insulating film 2 formed on a semiconductor substrate 1, polysilicon 3 formed on the first insulating film, second insulating film 6 covering the polysilicon 3 and electrode 7 derived from the polysilicon 3 onto the surface of the second insulating film 6. The polysilicon 3 is etched by the use of photographic etching and ion implantation while a masking material 5a against the ion implantation is formed in the outer peripheral part of the polysilicon 3 lest ion should be implanted in that part, and the second insulating film 6 and electrode 7 are formed after a specific substance is implanted by the ion implantation in that state.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a polysilicon resistance on an insulating film formed on a semiconductor substrate.

[0002]

2. Description of the Related Art Conventionally, a structure shown in FIG. 7C is known as a semiconductor device of this type. The cross-sectional structure of FIG. 7C is formed by forming a window in the first insulating film 2 formed on the semiconductor substrate 1, the polysilicon 3, and the second insulating film 6 covering the polysilicon 3, and through this window. Has an electrode 7 which is
In the polysilicon 3, the substance introduced by the ion implantation method is uniformly distributed.

Next, a conventional manufacturing method will be described.

First, as shown in FIG. 7A, after forming a first insulating film 2 on a semiconductor substrate 1, a polysilicon 3 is grown,
After that, a specific substance is injected into the entire surface by an ion injection method, and annealing is performed after the fourth insulating film 4 is grown.

Next, as shown in FIG. 7B, the polysilicon 3 is etched by using a photolithography method. At this time, the side surface of the polysilicon 3 exposed by etching has a specific substance injected by the ion implantation method.

FIG. 7C shows a sectional structure in which a second insulating film 6 covering the polysilicon 3 and an electrode 7 are formed by photolithography.

[0007]

In the conventional semiconductor integrated circuit device described above, when the polysilicon 3 is etched, an error in the resistance layer ΔW occurs due to variations in etching,
There is a drawback that there is a large difference between the design value of the resistance and the actual measurement value of the finished product.

Furthermore, after ion implantation into the polysilicon 3, annealing is carried out at a high temperature to activate the implanted material, so that the junction becomes deeper when manufactured together with a bipolar transistor having a shallow junction, and as a result, There is a drawback that the high frequency characteristics of the bipolar transistor are deteriorated.

[0009]

According to the present invention, a semiconductor substrate is provided with an insulating film, a resistor made of polysilicon on the insulating film, and an electrode electrically connected to the resistor. In the semiconductor device having the semiconductor device, it is possible to obtain a semiconductor device in which impurities are implanted into a portion other than the outer peripheral portion of polysilicon and no impurity is implanted into the outer peripheral portion of polysilicon.

Furthermore, according to the present invention, the above-mentioned semiconductor device can be obtained in which the outer peripheral portion of the polysilicon is within a range of 0.5 μm or more and 1.5 μm or less from the side surface of the polysilicon.

[0011]

The present invention will be described below with reference to the drawings. 1 is a structural sectional view showing a first embodiment of a semiconductor device according to the present invention, and FIG. 2 is a plan view of FIG. 1C.

In the present embodiment, as shown in FIG. 1C, the first insulating film 2 formed on the semiconductor substrate 1, the polysilicon 3 formed on the first insulating film, and the polysilicon A second insulating film 6 covering the silicon 3, and an electrode 7 derived from the polysilicon 3 on the surface of the second insulating film 6.
And have. As shown in FIG. 2, a plan view of the polysilicon 3 is obtained by using a photo-etching method and an ion implantation method to inject a specific substance inside the dotted line, and a solid line shows the outer peripheral portion of the polysilicon 3 after etching. Has no injected substance. Therefore, when the polysilicon 3 is etched, the polysilicon 3 may be affected by variations in the etching.
Even if the size of the outer peripheral portion after the etching changes, it does not affect the region occupied by the substance implanted by the ion implantation method.

Next, a first embodiment of a semiconductor device manufacturing method according to the present invention will be described.

As shown in FIG. 1A, a first insulating film 2 such as an oxide film is formed on one main surface of a semiconductor substrate 1, and the first insulating film 2 is formed.
Polysilicon 3 is grown on the insulating film 2 of 1000 to 3000 angstrom. After that, the polysilicon 3 is selectively etched by using a photolithography method. Figure 1B
FIG. 3 is a sectional view of the etched polysilicon 3 which is photo-etched. This photographic etching uses a mask material 5a for ion implantation, for example, a photoresist as a mask,
The openings of the photoresist are located inside the outer periphery of the etched polysilicon 3.

In this structure, a sheet resistance of a specific substance such as As is 200Ω / by using an ion implantation method.
Implant with a dose amount so that it becomes about □. Although not shown in FIG. 1B in order to suppress charge-up at the time of ion implantation, a mask such as a photoresist in the scribe line region is opened (see FIG. 3).

FIG. 1C shows a second oxide film or the like after the ion implantation.
FIG. 6 is a cross-sectional view after forming the insulating film 6 and the electrode 7 of FIG. 1 and annealing at 900 to 1000 ° C. to activate the ion-implanted material. Annealing for this activation is
Any step may be performed after the second insulating film 6 such as an oxide film is formed. For example, in a semiconductor integrated circuit device including a bipolar transistor, it is possible to reduce the heat history by sharing the drive-in of the emitter section.

In addition to the above, the distance x shown in FIG. 2 depends on variations in etching the polysilicon 3, alignment accuracy of the mask when using the ion implantation method, and ion-implanted impurities. Considering the spread of diffusion in the lateral direction when activated, this is the distance at which impurities do not exist in the outer peripheral portion of the etched polysilicon 3, and 0.
It is preferably 5 μm or more and 1.5 μm or less. Further, it is desirable that the electrode 7 is located inside the ion-implanted region.

FIG. 4 is a sectional view showing the steps of the second embodiment of the manufacturing method according to the present invention. As shown in the first embodiment, charge-up during ion implantation can be suppressed by opening the mask material 5a in the scribe line region. But,
In order to suppress charge-up more reliably, Ti, A
After forming the first metal 5b such as 1 by a vapor deposition method or the like,
A mask material 5a for ion implantation such as photoresist is formed, and thereafter, an ion implantation method is used.

FIG. 5 is a sectional view showing a step of the third embodiment of the manufacturing method according to the present invention. As shown in the first embodiment, the material such as As implanted by the ion implantation method is the mask material 5 for the ion implantation such as photoresist.
It is selectively injected only into the open part of a, and the other parts are not injected. However, when the acceleration energy of the ion implantation method is as large as several hundreds of KeV, in order to more reliably mask the implantation material of the ion implantation, as shown in FIG.
After the insulating film 5C is formed, a mask material 5a for ion implantation such as photoresist is formed, and thereafter, an ion implantation method is used.

FIG. 6 is a sectional view showing a fourth embodiment of the manufacturing method according to the present invention. Unlike the structure method shown in the first embodiment, as shown in FIG. 6A, after the mask material 5a for the ion implantation of the photoresist or the like is formed on the polysilicon 3, the As or the like is selectively formed by the ion implantation method. Inject the substance.

Thereafter, as shown in FIG. 6B, the polysilicon 3 is etched by the photolithography method. The subsequent steps are the same as the manufacturing method of the first embodiment.

[0022]

As described above, the present invention has an effect that the resistance width error does not affect the resistance value due to the fluctuation of etching when etching polysilicon, and the fluctuation of the resistance value is suppressed to a small value. Quantitatively, as shown in Table 1, the variation of 6 to 7% in the prior art was greatly improved to about 1 to 2% by adopting the present invention.

[0023]

[Table 1]

Further, A ion-implanted into polysilicon
Annealing at 900 to 1000 [deg.] C. for activating a substance such as s may be performed in any step after forming an insulating film such as an oxide film covering polysilicon, and should be shared with annealing in other steps. This has the effect of reducing the thermal history and not deteriorating the high frequency characteristics of a bipolar transistor having a shallow junction.

[Brief description of drawings]

FIG. 1 is a structural sectional view showing a first embodiment of the present invention.

FIG. 2 is a plan view of polysilicon showing the first embodiment of the present invention.

FIG. 3 is a structural cross-sectional view showing a step of the first embodiment of the present invention.

FIG. 4 is a structural cross-sectional view showing a second embodiment of the present invention.

FIG. 5 is a structural cross-sectional view showing a third embodiment of the present invention.

FIG. 6 is a structural sectional view showing a fourth embodiment of the present invention.

FIG. 7 is a structural cross-sectional view showing a conventional technique.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 1st insulating film 3 Polysilicon 4 4th insulating film 5a Mask material for ion implantation 5b 1st metal 5c 3rd insulating film 6 2nd insulating film 7 Electrode

Claims (2)

[Claims] 1. A semiconductor device comprising an insulating film on a semiconductor substrate, a resistor made of polysilicon on the insulating film, and an electrode electrically connected to the resistor, wherein the polysilicon is provided. 6. A semiconductor device, wherein impurities are implanted into a portion other than the outer peripheral portion of the polysilicon, and no impurity is implanted into the outer peripheral portion of the polysilicon. 2. The semiconductor device according to claim 1, wherein an outer peripheral portion of the polysilicon is in a range of 0.5 μm or more and 1.5 μm or less from a side surface of the polysilicon.