JPH05183096A - Multilayer lead frame and semiconductor device using same - Google Patents

Abstract

PURPOSE:To improve electrical properties to high-speed signal by controlling the variation in power potential of a lead frame. CONSTITUTION:In a multilayer lead frame in which a signal layer, a power layer 14, an earth layer 10, etc., are stacked up, a high dielectric layer 12 consisting of a dielectric having a high dielectric constant such as strontium titanate is sandwiched between the earth layer 10 and the power layer 14. Further, an inner lead of a lead frame 20 for mounting is connected to a wiring pattern 16 on a multilayer substrate in which the wiring pattern 16 made of a conductor thin film is formed on either earth layer 10 or power layer 14 through an electrical insulating later.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer lead frame and a semiconductor device using the same.

[0002]

2. Description of the Related Art Multi-layer lead frames are used for signal layers, power layers,
It is a product formed by laminating a plurality of layers such as a ground layer, and each layer is joined with an electrically insulating layer such as polyimide interposed between the layers. FIG. 3 is an explanatory view showing the structure of a conventional multi-layer lead frame, in which a frame-shaped power supply layer 4 is bonded onto the ground layer 2 and a signal layer 6 is further bonded onto the power supply layer 4. The signal layer 6 is formed in the same manner as an ordinary lead frame having a predetermined lead pattern. Reference numeral 8 is an electrically insulating layer of polyimide. Ceramic packages are mainly used for semiconductor device packages that handle high-speed signals, but the above-mentioned multilayer lead frame has excellent electrical characteristics for high-speed signals and is a plastic package that is used for high-speed signals. is there.

By the way, recently, since signals of extremely high speed have come to be processed, the power supply current fluctuates due to switching of the internal circuit of the semiconductor element as a problem of the electrical characteristics of the multilayer lead frame. Then
The problem that the power supply voltage of the semiconductor element fluctuates due to this current fluctuation and that the fluctuation on the power supply side affects the ground side cannot be ignored. FIG. 4 shows a result of simulating a variation of the power supply potential of a semiconductor element mounted on a conventional multilayer lead frame when a plurality of circuits are simultaneously switched.
The power supply potential fluctuates greatly due to ON-OFF of the switching signal. (Solid line-input signal, broken line-output signal, alternate long and short dash line-power supply potential, dotted line-ground potential) As a method of suppressing such potential fluctuations, the electric capacitance between the power supply line and the ground line at a position close to the semiconductor element is used. There is a method of using a decoupling capacitor that suppresses fluctuations by increasing the value and absorbing fluctuations in potential with its electric capacity.

[0004]

Since the above-mentioned multilayer lead frame has an electrically insulating layer interposed between the layers, it is possible to form a capacitance acting as a decoupling capacitor by using this electrically insulating layer. is there. The applicant of the present invention has proposed a lead frame using an electrically insulating layer as this decoupling capacitor between layers (Japanese Patent Application No. 2-184993). In the conventional multi-layer lead frame, the electric capacity of the electrically insulating layer interposed between layers is about 100 pF, but a capacitance of at least about 1000 pF is necessary to make it work properly as a decoupling capacitor that acts when handling high-speed signals. It is necessary, and preferably about 10,000 pF. Figure 5 shows the simulation results when the capacitance of the decoupling capacitor is 10000pF.

Since the multilayer lead frame has an electrically insulating layer sandwiched between layers, in order to increase the electric capacity as a decoupling capacitor, the electrically insulating layer should be thinned or a substance having a large dielectric constant should be sandwiched. Good. When manufacturing a multi-layered lead frame, the signal layer, power supply layer, and ground layer are made separately, and polyimide is applied between the layers to align and stack the layers, so the electrical insulation is maintained with the conventional manufacturing method. Moreover, it is difficult to reduce the distance between layers. Further, as a method of sandwiching a substance having a large dielectric constant between layers, a method of mixing a substance having a high dielectric constant with polyimide can be considered. However, a method of mixing a substance having a high dielectric constant can effectively increase the dielectric constant. There is a problem that you cannot get it. Therefore, the present invention has been made to solve the above problems, and an object of the present invention is to easily provide a large electric capacity effectively acting between layers,
An object of the present invention is to provide a lead frame having excellent characteristics for high speed signals and a semiconductor device used for the same.

[0006]

The present invention has the following constitution in order to achieve the above object. That is, in a multilayer lead frame formed by laminating signal layers, power supply layers, ground layers, etc., a dielectric layer is sandwiched between the ground layer and the power supply layer, and one of the ground layer and the power supply layer is formed. The inner lead of a mounting lead frame is connected to the wiring pattern on a multilayer substrate in which a wiring pattern made of a conductive thin film is formed on the above layer via an electrically insulating layer. The dielectric layer is made of a high dielectric material such as strontium titanate, barium titanate, lead titanate, titanium oxide, tantalum oxide, aluminum oxide, or the ground layer or power supply layer of the multi-layer substrate radiates heat. A metal base having good properties is effective. Further, a through hole is provided penetrating the multilayer substrate in the thickness direction, and the wiring pattern is electrically connected to the ground layer or the power supply layer at the through hole portion. Further, as a semiconductor device, a semiconductor element is mounted on the multilayer lead frame, the semiconductor element and the wiring pattern are connected by wire bonding, and resin molding is performed.

[0007]

By forming a multilayer lead frame by connecting a multi-layer substrate having a built-in dielectric layer to a mounting lead frame, the dielectric layer acts as a decoupling capacitor, and the multi-layer lead frame is electrically connected to a high-speed signal. It is possible to effectively improve the characteristics. The wiring pattern provided on the multi-layer substrate can be easily formed into a fine pattern by the conductive thin film, and by using the multi-layer substrate, it is possible to suitably cope with the increase in the number of pins. In addition, the heat dissipation of the lead frame can be improved by using the metal base.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will be described below in detail with reference to the accompanying drawings. FIG. 1 shows an embodiment of the multilayer lead frame according to the present invention. In the figure, 10 is a metal base that serves as a substrate on which a semiconductor element is mounted, and 12 is a high dielectric layer formed on the metal substrate 10. The high dielectric layer 12 is a layer for acting as a decoupling capacitor between the ground layer and the power supply layer, and a material having a dielectric constant as large as possible is preferably used. For example, strontium titanate, barium titanate, lead titanate,
Titanium oxide, tantalum oxide, aluminum oxide and the like are suitable.

In the embodiment, the metal base 10 is a ground layer,
A power supply layer 14 made of a metal layer is provided on the high dielectric layer 12. As a result, the high dielectric layer 12 becomes the metal base 10.
The layer is sandwiched between the power supply layer 14 and the power supply layer 14, and the ground layer 10, the high dielectric layer 12, and the power supply layer 14 form a decoupling capacitor. Since the capacitance is proportional to the area of the portion sandwiching the dielectric and is inversely proportional to the distance between the electrodes, the high dielectric layer 12
It is preferable that the area of the portion sandwiching the high dielectric layer 12 is wide and the thickness of the high dielectric layer 12 is as thin as possible. In order to increase the area of the high-dielectric layer 12, the high-dielectric layer 12 is also formed in the bonding portion of the semiconductor element 30 in the embodiment. Reference numeral 16 is a wiring pattern formed on the upper layer of the power supply layer 14. An electrical insulating layer 18 such as polyimide is provided between the power supply layer 14 and the wiring pattern 16.
To electrically insulate. The wiring pattern 16 corresponds to the signal layer of the multilayer lead frame.

As described above, the multilayer lead frame of the embodiment has the high dielectric layer 12, the power supply layer 15, and the metal base 10.
The multilayer board on which the wiring pattern 16 is formed is joined to the mounting lead frame 20 to finally obtain a multilayer lead frame product. FIG. 2 shows an explanatory view of the multilayer lead frame product as seen from the plane direction. The metal base 10 is formed in a rectangular shape as shown in the figure, and the high dielectric layer 12 has a flat surface as shown in the figure.
It is divided and formed. The wiring pattern 16 is formed on the upper surface of the electrically insulating layer 18. The mounting lead frame 20 is formed so that the inner edge 20a surrounds the outer edge portion of the multilayer substrate, and the inner lead is bonded to the wiring pattern 16 or the power supply layer 12. 20
Reference numeral b is an inner lead connected to the power supply layer 14, that is, the power supply line, and reference numeral 20a is an inner lead connected to the signal line.

In order to set the metal base 10 to the ground potential, in the embodiment, a through hole 22 penetrating the multilayer substrate in the thickness direction is provided by drilling or the like, and the inner wall of the through hole 22 is plated to form a conductive portion. Then, the wiring pattern formed on the uppermost layer and the ground layer 10 are electrically connected, and the inner lead 20c of the ground line of the lead frame 20 is connected.
Is connected to the wiring pattern to be ground potential. To connect the semiconductor element 30 to the ground potential, the bonding portion 2
The through holes 22 are formed at four positions, the ground layer 10 and the bonding portion 24 are electrically connected at the through holes 22, and the ground potential of the semiconductor element 30 is set by wire bonding.

When the semiconductor element 30 is mounted on the lead frame of the above embodiment, the semiconductor element 30 is bonded onto the power supply layer 14 of the lead frame, and the wiring pattern 16 (including the ground potential bonding portion 24) and the power supply layer. A semiconductor device can be obtained by wire-bonding with 14 and resin molding. Since the obtained semiconductor device has the high dielectric layer 12 as a decoupling capacitor built therein, it functions as a semiconductor device having excellent electrical characteristics for high-speed signals. The high dielectric layer 1
Since No. 4 can be formed by setting an optimum electric capacitance value according to the characteristics of the electric signal to be processed, it is possible to obtain a semiconductor device having suitable characteristics.

The metal base 10 is used in the apparatus of the above embodiment.
Various methods can be used to form the high dielectric layer 12 and the like on top. For example, the high dielectric layer 12 may be formed by coating the metal base 10 with a dielectric, or by a sputtering method. High dielectric layer 1
By using a material having a large dielectric constant as 2, it is possible to easily realize an electric capacity of 10,000 pF or more. The power supply layer 14 is formed of a thin film. For example,
Copper is deposited on the high dielectric layer 12 by sputtering. Since the wiring pattern 16 is made of polyimide or the like for the electrically insulating layer 18, a copper foil or the like is laminated and etched to form a fine pattern. Instead of laminating the copper foil or the like, a thin film of copper or the like may be formed on the surface of the electrically insulating layer 18 by sputtering or the like.

In the multilayer lead frame of the above embodiment, the mounting lead frame 20 is joined to the outer edge of the wiring pattern 16 to form a lead frame, and the leads near the bonding area near the semiconductor element 30 are extremely dense. Since the portion to be formed is formed by the wiring pattern 16 in which a fine pattern can be easily formed, avoid manufacturing difficulties when forming the inner leads at a high density in the mounting lead frame. Can
It becomes possible to cope with the increase in the number of pins. Further, since the high dielectric layer 12 and the like are formed on the metal base 10 in the multilayer lead frame of the above-described embodiment, the use of a material having good heat dissipation as the metal base 10 allows a semiconductor device having excellent heat dissipation to be obtained. There is also an advantage that it can be obtained.

Although the present invention has been variously described with reference to the preferred embodiments, the present invention is not limited to the above embodiments. For example, the arrangement position of the lead pattern or the through hole 22 can be appropriately set, and various modifications such as setting the arrangement positions of the ground layer 10 and the power supply layer 14 opposite to those of the above-described embodiment are possible.

[0016]

As described above, the multi-layered lead frame according to the present invention can be provided as a lead frame having a built-in capacitor having a large electric capacity. It becomes possible to use it as an excellent semiconductor device. Also, by connecting the lead frame for mounting to a multilayer board having a conductor pattern formed using thin film conductors, it is possible to easily achieve fine wiring patterns and effectively cope with the increase in the number of pins. You can
In addition, since it has a metal base, it can be provided as a lead frame with excellent heat dissipation, and so on.

[Brief description of drawings]

FIG. 1 is an explanatory diagram showing a configuration of an example of a multilayer lead frame.

FIG. 2 is an explanatory diagram of a state in which the multilayer lead frame is viewed from the plane direction.

FIG. 3 is an explanatory diagram showing a conventional example of a multilayer lead frame.

FIG. 4 is a graph showing a result of simulating fluctuations in power supply potential of a conventional multilayer lead frame (100 pF).

FIG. 5 is a graph showing a result of simulating fluctuations in power supply potential of a multilayer lead frame (10000 pF).

[Explanation of symbols]

 2 ground layer 4 power layer 6 signal layer 10 metal base 12 high dielectric layer 14 power layer 16 wiring pattern 18 electrical insulating layer 20 lead frame 20a, 20b, 20c inner lead 22 through hole 24 bonding section

Claims (5)

[Claims] 1. A multi-layer lead frame comprising a signal layer, a power supply layer, a ground layer, etc. stacked together, wherein a dielectric layer is sandwiched between the ground layer and the power supply layer, and the ground layer or the power supply is formed. A multi-layer substrate in which a wiring pattern made of a conductive thin film is formed on one of the layers through an electrically insulating layer, and the inner leads of a mounting lead frame are connected to the wiring pattern. Lead frame. 2. The multilayer according to claim 1, wherein the dielectric layer is formed of a high dielectric material such as strontium titanate, barium titanate, lead titanate, titanium oxide, tantalum oxide, aluminum oxide or the like. Lead frame. 3. The multilayer lead frame according to claim 1, wherein the ground layer or the power supply layer of the multilayer substrate is formed of a metal base having good heat dissipation. 4. A multilayer substrate is provided with a through hole penetrating in the thickness direction, and the wiring pattern is electrically connected to the ground layer or the power supply layer at the through hole portion.
Alternatively, the multi-layer lead frame described in 3. 5. A semiconductor device in which a semiconductor element is mounted on the multilayer lead frame according to claim 1, 2, 3 or 4, the semiconductor element and the wiring pattern are connected by wire bonding and resin-molded. ..