JPH0516183B2 - - Google Patents

Info

Publication number
JPH0516183B2
JPH0516183B2 JP57060537A JP6053782A JPH0516183B2 JP H0516183 B2 JPH0516183 B2 JP H0516183B2 JP 57060537 A JP57060537 A JP 57060537A JP 6053782 A JP6053782 A JP 6053782A JP H0516183 B2 JPH0516183 B2 JP H0516183B2
Authority
JP
Japan
Prior art keywords
wiring means
semiconductor
wiring
conductive layer
functional circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57060537A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58176948A (ja
Inventor
Junichi Oono
Satoshi Konishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP57060537A priority Critical patent/JPS58176948A/ja
Publication of JPS58176948A publication Critical patent/JPS58176948A/ja
Priority to US06/763,088 priority patent/US4608668A/en
Priority to US06/834,101 priority patent/US4783424A/en
Publication of JPH0516183B2 publication Critical patent/JPH0516183B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/49—Adaptable interconnections, e.g. fuses or antifuses
    • H10W20/491—Antifuses, i.e. interconnections changeable from non-conductive to conductive
    • H10W20/492—Antifuses, i.e. interconnections changeable from non-conductive to conductive changeable by the use of an external beam, e.g. laser beam or ion beam
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/49—Adaptable interconnections, e.g. fuses or antifuses
    • H10W20/493—Fuses, i.e. interconnections changeable from conductive to non-conductive
    • H10W20/494—Fuses, i.e. interconnections changeable from conductive to non-conductive changeable by the use of an external beam, e.g. laser beam or ion beam

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP57060537A 1981-09-03 1982-04-12 半導体装置 Granted JPS58176948A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP57060537A JPS58176948A (ja) 1982-04-12 1982-04-12 半導体装置
US06/763,088 US4608668A (en) 1981-09-03 1985-08-06 Semiconductor device
US06/834,101 US4783424A (en) 1981-09-03 1986-02-21 Method of making a semiconductor device involving simultaneous connection and disconnection

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57060537A JPS58176948A (ja) 1982-04-12 1982-04-12 半導体装置

Publications (2)

Publication Number Publication Date
JPS58176948A JPS58176948A (ja) 1983-10-17
JPH0516183B2 true JPH0516183B2 (2) 1993-03-03

Family

ID=13145141

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57060537A Granted JPS58176948A (ja) 1981-09-03 1982-04-12 半導体装置

Country Status (1)

Country Link
JP (1) JPS58176948A (2)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59151454A (ja) * 1983-02-17 1984-08-29 Mitsubishi Electric Corp 半導体記憶装置
FR2554622B1 (fr) * 1983-11-03 1988-01-15 Commissariat Energie Atomique Procede de fabrication d'une matrice de composants electroniques

Also Published As

Publication number Publication date
JPS58176948A (ja) 1983-10-17

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