JPH0516174B2 - - Google Patents
Info
- Publication number
- JPH0516174B2 JPH0516174B2 JP56038491A JP3849181A JPH0516174B2 JP H0516174 B2 JPH0516174 B2 JP H0516174B2 JP 56038491 A JP56038491 A JP 56038491A JP 3849181 A JP3849181 A JP 3849181A JP H0516174 B2 JPH0516174 B2 JP H0516174B2
- Authority
- JP
- Japan
- Prior art keywords
- silicon
- nitride film
- silicon nitride
- film
- excess
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 26
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 26
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 23
- 229910052710 silicon Inorganic materials 0.000 claims description 21
- 239000010703 silicon Substances 0.000 claims description 21
- 238000000034 method Methods 0.000 claims description 10
- 239000004065 semiconductor Substances 0.000 claims description 10
- 238000000137 annealing Methods 0.000 claims description 8
- 238000004519 manufacturing process Methods 0.000 claims description 8
- -1 oxygen ions Chemical class 0.000 claims description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- 239000001301 oxygen Substances 0.000 claims description 6
- 229910052760 oxygen Inorganic materials 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 5
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 4
- 238000010438 heat treatment Methods 0.000 claims description 3
- 230000005855 radiation Effects 0.000 claims description 3
- 150000004767 nitrides Chemical class 0.000 description 8
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 7
- 229910052757 nitrogen Inorganic materials 0.000 description 5
- 238000002513 implantation Methods 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 125000004433 nitrogen atom Chemical group N* 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 238000001947 vapour-phase growth Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/3115—Doping the insulating layers
- H01L21/31155—Doping the insulating layers by ion implantation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
Description
【発明の詳細な説明】
この発明は半導体装置の製造方法、特にシリコ
ン窒化膜を有する半導体装置の製造方法に関する
ものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, particularly a method of manufacturing a semiconductor device having a silicon nitride film.
気相成長法により成長したシリコン窒化膜はそ
の成長条件により、特に成長源の流量の比によ
り、シリコン過剰又は窒素過剰状態となるが、他
の条件を考慮したシリコン窒化膜の生成条件によ
り生成した膜には一般に過剰シリコンが存在す
る。 The silicon nitride film grown by the vapor phase growth method will be in a silicon-excessive or nitrogen-excessive state depending on the growth conditions, especially the ratio of the flow rates of the growth source, but the silicon nitride film will be formed in a silicon nitride film formation condition that takes into account other conditions. There is typically excess silicon present in the film.
このために半導体装置の電気的特性で、例えば
リーク電流が大きいとか、MNOS（Metal
Nitride Oxide Silicon）型トランジスタの記憶
保持特性が大きな経時変化（劣化）を生じるなど
の欠点があつた。従来は、これらの欠点を軽減す
るため、シリコン窒化膜生成を窒素過剰の雰囲気
で行うなどシリコン窒化膜成長時の条件を工夫し
ていた。しかし上記の従来法においては前記欠点
を完全に解決することができず、所望のシリコン
窒化膜を得るには、膜の成長速度の制御、膜の均
一性の問題などのため制約が多い。 For this reason, due to the electrical characteristics of semiconductor devices, for example, leakage current is large, MNOS (Metal
Nitride Oxide Silicon (Nitride Oxide Silicon) type transistors had drawbacks such as significant changes (deterioration) in their memory retention characteristics over time. Conventionally, in order to alleviate these drawbacks, the conditions during silicon nitride film growth have been devised, such as performing silicon nitride film formation in an atmosphere containing excess nitrogen. However, the above-mentioned conventional methods cannot completely solve the above-mentioned drawbacks, and there are many restrictions in obtaining a desired silicon nitride film due to problems such as control of film growth rate and film uniformity.
本発明の目的は上記欠点を除去したシリコン窒
化膜を有する半導体装置の製造方法を提供するこ
とにある。 An object of the present invention is to provide a method for manufacturing a semiconductor device having a silicon nitride film that eliminates the above-mentioned drawbacks.
本発明の半導体装置の製造方法は、シリコン基
板上のシリコン酸化膜の上にシリコン過剰なシリ
コン窒化膜を形成する工程と、上記シリコン窒化
膜中に酸素イオンを注入した後、放射線処理また
熱処理によつて上記シリコン窒化膜をアニールす
る工程とを備えることを特徴とする。 The method for manufacturing a semiconductor device of the present invention includes a step of forming a silicon nitride film containing excess silicon on a silicon oxide film on a silicon substrate, and after implanting oxygen ions into the silicon nitride film, radiation treatment or heat treatment is performed. Therefore, the present invention is characterized by comprising a step of annealing the silicon nitride film.
本発明によれば、シリコン過剰なシリコン窒化
膜中に注入された酸素イオンはその後のアニール
工程によりこの過剰シリコン原子と結合し、また
シリコン窒化膜の窒素原子と置換し、シリコン酸
化窒化膜を形成するので、過剰シリコンのない良
質な膜を形成することができる。さらに、シリコ
ン酸化窒化膜が形成されることによりこのシリコ
ン窒化膜の電気伝導度を大幅に低下させ絶縁性を
向上させることができる。 According to the present invention, oxygen ions implanted into a silicon nitride film with excess silicon combine with the excess silicon atoms in the subsequent annealing process and replace nitrogen atoms in the silicon nitride film, forming a silicon oxynitride film. Therefore, a high quality film without excess silicon can be formed. Furthermore, by forming the silicon oxynitride film, the electrical conductivity of the silicon nitride film can be significantly reduced and the insulation properties can be improved.
第１図および第２図は本発明の前提となる参考
例による半導体装置の製造方法を工程順に示した
断面図である。第１図において、シリコン基板１
上にシリコン酸化膜２を20Å成長し、その上にさ
らに450Åのシリコン窒化膜３を成長する。この
ように形成したシリコン窒化膜は通常シリコン過
剰状態のシリコン窒化膜である。次いで、過剰シ
リコンを解消するため10KeVで加速した窒素イ
オンを２×1013／cm注入する。加速電圧および注
入量は窒化膜の状態、厚さ等を勘案して決定す
る。注入が完了した後に、Nd；YAGレーザを用
いて約1.2ジユール／cm2程度のエネルギーでアニ
ールする。このアニールは通常の熱処理で約1000
℃で10分程度行つてもよいが、放射線処理によれ
ば瞬間的にアニールを完了させることができ、他
の特性に与える影響もすくなくて済み、特性的、
プロセス的にみて有利である。 FIGS. 1 and 2 are cross-sectional views showing, in order of steps, a method for manufacturing a semiconductor device according to a reference example, which is a premise of the present invention. In FIG. 1, a silicon substrate 1
A silicon oxide film 2 with a thickness of 20 Å is grown thereon, and a silicon nitride film 3 with a thickness of 450 Å is further grown thereon. The silicon nitride film thus formed is usually a silicon nitride film in a silicon-excess state. Next, to eliminate excess silicon, nitrogen ions accelerated at 10 KeV are implanted at 2×10 13 /cm. The accelerating voltage and the implantation amount are determined by taking into account the condition, thickness, etc. of the nitride film. After the implantation is completed, annealing is performed using a Nd; YAG laser at an energy of about 1.2 Joule/cm 2 . This annealing is approximately 1000 times with normal heat treatment.
℃ for about 10 minutes, but radiation treatment can complete the annealing instantaneously and has little effect on other properties.
This is advantageous from a process standpoint.
このような処理によつて、注入された窒素イオ
ンが過剰シリコンと結合し、注入により損傷を受
けた部分も適度に修復され、過剰シリコンがな
く、かつ損傷のない良質の第２図に示すシリコン
窒化膜４が得られる。 Through this process, the implanted nitrogen ions combine with the excess silicon, and the parts damaged by the implantation are appropriately repaired, resulting in good quality silicon without excess silicon and no damage, as shown in Figure 2. A nitride film 4 is obtained.
第２図は完了後の断面図で１および２は第１図
と同じ部分を示している。 FIG. 2 is a sectional view after completion, and 1 and 2 indicate the same parts as in FIG. 1.
第３図は上述の参考例によつて得られた窒化膜
を用いて形成したMNOS型トランジスタの動作
電圧値（VT）の経時変化を、従来方法によるシ
リコン窒化膜を用いたMNOS型トランジスタの
経時変化と比較して示した図である。図中は参
考例、は従来例の特性を示している。図より明
らかなように、本発明によるMNOSは極めて安
定しているのに対し、従来例のものは大幅に変化
していることが判る。上記参考例はシリコン窒化
膜に窒素イオンを注入し、これをアニールするこ
とを特徴とする半導体装置の製造方法について述
べたが、本発明による半導体装置の製造方法によ
る注入イオンとして酸素イオンを用いてもほぼ同
様の効果を得ることができる。これは注入された
酸素イオンが窒化膜中の過剰シリコン原子と結合
し、また窒化膜の窒素原子と置換し、緻密質な二
酸化シリコンを形成し、窒化膜の欠陥を補完した
ことによると思われる。なお窒化膜に注入する酸
素の量を増すと、シリコン窒化膜の電気伝導度を
大幅に低下させることができる。 Figure 3 shows the change over time in the operating voltage value ( V It is a diagram shown in comparison with changes over time. In the figure, the reference example is shown, and the reference example shows the characteristics of the conventional example. As is clear from the figure, the MNOS according to the present invention is extremely stable, while the conventional example shows significant changes. The above reference example describes a method for manufacturing a semiconductor device characterized by implanting nitrogen ions into a silicon nitride film and annealing the same. You can also obtain almost the same effect. This seems to be due to the implanted oxygen ions combining with excess silicon atoms in the nitride film and replacing nitrogen atoms in the nitride film, forming dense silicon dioxide and compensating for defects in the nitride film. . Note that by increasing the amount of oxygen injected into the nitride film, the electrical conductivity of the silicon nitride film can be significantly reduced.
また、シリコン基板上に成長させたシリコン窒
化膜はその膜厚、電気伝導度、他の膜との関係位
置、所望の特性などに応じ、窒素あるいは酸素イ
オンの注入量、加速エネルギー、あるいは注入損
傷のアニールなどの条件を調節することができ
る。 In addition, silicon nitride films grown on silicon substrates are subject to changes in the amount of nitrogen or oxygen ion implantation, acceleration energy, or implantation damage depending on the film thickness, electrical conductivity, position relative to other films, desired characteristics, etc. conditions such as annealing can be adjusted.
以上説明したとおり本発明によれば過剰シリコ
ン状態を解消し、格子欠陥のすくない特性の安定
した良質なシリコン窒化膜をもつ半導体装置を得
ることができる。 As explained above, according to the present invention, it is possible to eliminate the excess silicon state and obtain a semiconductor device having a high quality silicon nitride film with stable characteristics and few lattice defects.
第１図および第２図は本発明の前提となる参考
例による半導体装置の製造方法の工程順断面図、
第３図は参考例のものと従来例のMNOS型トラ
ンジスタの動作電圧値（VT）の経時変化を示す
図。
１……シリコン基板、２……シリコン酸化膜、
３……過剰シリコンを含むシリコン窒化膜、４…
…過剰シリコンを含まないシリコン窒化膜。
1 and 2 are step-by-step cross-sectional views of a method for manufacturing a semiconductor device according to a reference example, which is the premise of the present invention;
FIG. 3 is a diagram showing changes over time in the operating voltage value (V T ) of the MNOS type transistor of the reference example and the conventional example. 1...Silicon substrate, 2...Silicon oxide film,
3...Silicon nitride film containing excess silicon, 4...
...Silicon nitride film that does not contain excess silicon.
Claims (1)
コン過剰なシリコン窒化膜を形成する工程と、前
記シリコン窒化膜中に酸素イオンを注入した後、
放射線処理あるいは熱処理によつて前記シリコン
窒化膜をアニールする工程とを備えることを特徴
とする半導体装置の製造方法。1. After forming a silicon nitride film containing excess silicon on a silicon oxide film on a silicon substrate, and implanting oxygen ions into the silicon nitride film,
A method for manufacturing a semiconductor device, comprising the step of annealing the silicon nitride film by radiation treatment or heat treatment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3849181A JPS57153429A (en) | 1981-03-17 | 1981-03-17 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3849181A JPS57153429A (en) | 1981-03-17 | 1981-03-17 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57153429A JPS57153429A (en) | 1982-09-22 |
| JPH0516174B2 true JPH0516174B2 (en) | 1993-03-03 |
Family
ID=12526727
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3849181A Granted JPS57153429A (en) | 1981-03-17 | 1981-03-17 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57153429A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5264724A (en) * | 1989-02-13 | 1993-11-23 | The University Of Arkansas | Silicon nitride for application as the gate dielectric in MOS devices |
| KR970003893B1 (en) * | 1993-10-25 | 1997-03-22 | 삼성전자 주식회사 | Method of isolation of the elements on the semiconductor device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5536935A (en) * | 1978-09-06 | 1980-03-14 | Hitachi Ltd | Manufacturing of semiconductor device |
| JPS55162234A (en) * | 1979-06-05 | 1980-12-17 | Agency Of Ind Science & Technol | Manufacture of semiconductor device |
-
1981
- 1981-03-17 JP JP3849181A patent/JPS57153429A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5536935A (en) * | 1978-09-06 | 1980-03-14 | Hitachi Ltd | Manufacturing of semiconductor device |
| JPS55162234A (en) * | 1979-06-05 | 1980-12-17 | Agency Of Ind Science & Technol | Manufacture of semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57153429A (en) | 1982-09-22 |
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